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    • 4. 发明申请
    • MONOLITHIC SILICON-BASED PHASED ARRAYS FOR COMMUNICATIONS AND RADARS
    • 用于通信和雷达的基于硅的硅基阵列
    • WO2005050776A2
    • 2005-06-02
    • PCT/US2004/037802
    • 2004-11-12
    • CALIFORNIA INSTITUTE OF TECHNOLOGYHASHEMI, HosseinGUAN, XiangHAJIMIRI, Ali
    • HASHEMI, HosseinGUAN, XiangHAJIMIRI, Ali
    • H01Q
    • H01Q3/26H01Q3/22H01Q3/2682H01Q3/42H01Q21/0093
    • A phased-array receiver is adapted so as to be fully integrated and fabricated on a single silicon substrate. The phased-array receiver is operative to receive a 24 GHz signal and may be adapted to include 8-elements formed in a SiGe BiCMOS technology. The phased-array receiver utilizes a heterodyne topology, and the signal combining is performed at an IF of 4.8GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC VCO generates 16 different phases of the LO. An integrated 19.2GHz frequency synthesizer locks the VCO frequency to a 75MHz external reference. Each signal path achieves a gain of 43dB, a noise figure of 7.4dB, and an IIP3 of -11dBm. The 8-path array achieves an array gain of 61dB, a peak-to-null ratio of 20dB, and improves the signal-to-noise ratio at the output by 9dB.
    • 相控阵接收器适于完全集成并制造在单个硅衬底上。 相控阵接收器可操作以接收24GHz信号,并且可适于包括以SiGe BiCMOS技术形成的8个元件。 相控阵接收机利用外差拓扑,信号组合在4.8GHz的IF下进行。 在第一个下变频混频器的LO端口实现4位分辨率的相移。 振荡LC VCO产生LO的16个不同相位。 集成的19.2GHz频率合成器将VCO频率锁定到75MHz外部参考。 每个信号路径的增益为43dB,噪声系数为7.4dB,IIP3为-11dBm。 8路阵列实现了61dB的阵列增益,20dB的峰 - 无效比,并将输出端的信噪比提高了9dB。
    • 6. 发明申请
    • COMMON GATE WITH RESISTIVE FEED-THROUGH LOW NOISE AMPLIFIER
    • 具有阻性低噪声放大器的共栅
    • WO2004062093A3
    • 2004-09-16
    • PCT/US0339174
    • 2003-12-09
    • CALIFORNIA INST OF TECHNHAJIMIRI SEYED-ALIGUAN XIANG
    • HAJIMIRI SEYED-ALIGUAN XIANG
    • H03F3/193
    • H03F3/193H03F2200/294H03F2200/372
    • A radio-frequency amplifier is provided. The radiofrequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-through capacitance Cf is connected in parallel with the input terminal and the output terminal of the transistor. A load resistance RL is connected to the output terminal. The control terminal of the transistor is biased at a fixed voltage. Part of the transistor noise follows the looped path through the feed-through resistor instead of passing on to the load, which reduces the noise figure of the amplifier. The value of gm, Rf and RL are chosen in a way to keep the input impedance of the amplifier matched to a well-defined signal source impedance.
    • 提供射频放大器。 射频放大器包括具有输入端子,输出端子,控制端子和跨导gm的晶体管。 串联连接的馈通电阻Rf和馈通电容Cf与晶体管的输入端子和输出端子并联连接。 负载电阻RL连接到输出端子。 晶体管的控制端子被偏置在固定电压。 部分晶体管噪声遵循通过馈通电阻器的环路而不是传递到负载,这降低了放大器的噪声系数。 选择gm,Rf和RL的值是为了保持放大器的输入阻抗与定义良好的信号源阻抗相匹配。