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    • 1. 发明申请
    • CALIBRATION OF CLOCK GENERATORS IN SYSTEM-ON-CHIP INTEGRATED CIRCUITS
    • 系统在芯片集成电路中的时钟发生器校准
    • WO2005088424A3
    • 2006-03-02
    • PCT/IB2005050726
    • 2005-02-28
    • KONINKL PHILIPS ELECTRONICS NVCHOUDHARY VISHAL SKATOCH ATUL
    • CHOUDHARY VISHAL SKATOCH ATUL
    • G06F1/04G06F1/10
    • G06F1/04G06F1/10
    • In a GALS based integrated circuit, the ring oscillator (400) with a programmable delay line (500), which can be configured for different delays using a control word (600). Scan patterns are loaded into the N modules at the respective launching flip-flops (100) and the resultant signal value captured by the capture flip-flops is output to a register (700). The resultant signature of values is compared with a valid signature (800). If it does not match, the delay of the ring oscillator (400) is changed by the control word (600), and the path delay test is carried out again. This process is repeated until the resultant signature (700) matches the valid signature (800) at which time, the calibration process is complete.
    • 在基于GALS的集成电路中,具有可编程延迟线(500)的环形振荡器(400),其可以被配置用于使用控制字(600)的不同延迟。 在相应的发射触发器(100)将扫描模式加载到N个模块中,并且由捕获触发器捕获的合成信号值被输出到寄存器(700)。 将所得到的值的签名与有效签名进行比较(800)。 如果不匹配,则通过控制字(600)改变环形振荡器(400)的延迟,并再次执行路径延迟测试。 重复该过程直到合成签名(700)与有效签名(800)匹配,此时校准过程完成。
    • 2. 发明申请
    • CALIBRATION OF CLOCK GENERATORS IN SYSTEM-ON-CHIP INTEGRATED CIRCUITS
    • 系统在芯片集成电路中的时钟发生器校准
    • WO2005088424A2
    • 2005-09-22
    • PCT/IB2005/050726
    • 2005-02-28
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.CHOUDHARY, Vishal, S.KATOCH, Atul
    • CHOUDHARY, Vishal, S.KATOCH, Atul
    • G06F1/04
    • G06F1/04G06F1/10
    • In a GALS based integrated circuit, the ring oscillator (400) with a programmable delay line (500), which can be configured for different delays using a control word (600). Scan patterns are loaded into the N modules at the respective launching flip-flops (100) and the resultant signal value captured by the capture flip-flops is output to a register (700). The resultant signature of values is compared with a valid signature (800). If it does not match, the delay of the ring oscillator (400) is changed by the control word (600), and the path delay test is carried out again. This process is repeated until the resultant signature (700) matches the valid signature (800) at which time, the calibration process is complete. Advantages of the present invention include: Accuracy - since on-chip real critical paths are used for measuring the delays, the clock generators can be fine-tuned to run at optimal operating frequency (closest to the maximum possible frequency); and - Simplicity - the proposed solution has no major costs in terms of silicon area; it uses existing tools (for generating test patterns for activating critical paths in a circuit) and minimum hardware for calibration.
    • 在基于GALS的集成电路中,具有可编程延迟线(500)的环形振荡器(400),其可以被配置用于使用控制字(600)的不同延迟。 在相应的发射触发器(100)将扫描模式加载到N个模块中,并且由捕获触发器捕获的合成信号值被输出到寄存器(700)。 将所得到的值的签名与有效签名进行比较(800)。 如果不匹配,则通过控制字(600)改变环形振荡器(400)的延迟,并再次执行路径延迟测试。 重复该过程直到合成签名(700)与有效签名(800)匹配,此时校准过程完成。 本发明的优点包括:精度 - 由于使用片上实际关键路径来测量延迟,所以时钟发生器可被微调以在最佳工作频率(最接近最大可能频率)运行; 和 - 简单 - 提出的解决方案在硅面积方面没有重大的成本; 它使用现有工具(用于生成用于激活电路中的关键路径的测试模式)和用于校准的最低硬件。
    • 4. 发明申请
    • CONFIGURABLE PROCESSOR
    • 可配置处理器
    • WO2003100601A2
    • 2003-12-04
    • PCT/IB2003/001731
    • 2003-04-28
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.DE OLIVEIRA KASTRUP PEREIRA, BernardoCHOUDHARY, Vishal, S.
    • DE OLIVEIRA KASTRUP PEREIRA, BernardoCHOUDHARY, Vishal, S.
    • G06F9/38
    • G06F9/30083G06F9/3885
    • A processor comprises a main controller (CTR11) and a plurality of processing units (1 - 9). Each processing unit (1 - 9) has a local controller (CTR1 - CTR9) and at least one functional unit (FU1 - FU9) controllable by the local controller (CTR1 - CTR9). The local controller (CTR1 - CTR9) of a processing unit (1 - 9) is coupled (15) to the main controller (CTR11). The processor further comprises an instruction set, having at least one instruction for increasing the activity of at least one processing unit (1 - 9). The main controller (CTR11) is arranged to process the at least one instruction for increasing the activity of at least one processing unit (1 - 9). One or more processing units (1 - 9) of the processor can be completely switched off, including the corresponding local controller (CTR1 - CTR9), since the instructions for switching on a processing unit (1 - 9) are not processed by the corresponding local controller (CTR1 - CTR9), but by the main controller (CTR11) itself.
    • 处理器包括主控制器(CTR11)和多个处理单元(1-9)。 每个处理单元(1至9)具有本地控制器(CTR1-CTR9)和至少一个由本地控制器(CTR1-CTR9)控制的功能单元(FU1-FU9)。 处理单元(1-9)的本地控制器(CTR1-CTR9)被耦合(15)到主控制器(CTR11)。 处理器还包括指令集,其具有用于增加至少一个处理单元(1-9)的活动的至少一个指令。 主控制器(CTR11)被布置成处理用于增加至少一个处理单元(1-9)的活动的至少一个指令。 由于处理单元(1-9)的接通指令不被对应的处理单元(1〜9)处理,处理器的一个或多个处理单元(1〜9)可以完全关闭,包括相应的本地控制器(CTR1-CTR9) 本地控制器(CTR1 - CTR9),但由主控制器(CTR11)本身。