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    • 2. 发明申请
    • INTEGRATED CIRCUIT WITH IMPROVED SIGNAL NOISE ISOLATION AND METHOD FOR IMPROVING SIGNAL NOISE ISOLATION
    • 具有改进的信号噪声隔离的集成电路和用于改善信号噪声隔离的方法
    • WO2006130260A2
    • 2006-12-07
    • PCT/US2006/015113
    • 2006-04-21
    • FREESCALE SEMICONDUCTOR, INC.BANERJEE, Suman, K.FERRER, EnriqueHARTIN, Olin, L.SECAREANU, Radu, M.
    • BANERJEE, Suman, K.FERRER, EnriqueHARTIN, Olin, L.SECAREANU, Radu, M.
    • H01L27/0248H01L23/552H01L2924/0002H01L2924/00
    • A system-on chip (SOC) (100) and method of isolating noise in a SOC, including a plurality of noise sensitive circuit blocks (120, 220) and ESD protected pads (302, 304, 306, 308, 310, 312, and 314). A VDD isolation pad (302) is connected to an N well ring (124) of the first noise sensitive circuit (120) to collect noise from the substrate (110) and isolate the circuit from the P well region (112). A ground protected pad (304) is connected to an isolated P well (126) of a first noise sensitive circuit (120). The ground pad (304) collects noise from the isolated P well (126) and sends it to ground. A dedicated ground isolation pad (306) is connected to a P well ring (224) of a second noise sensitive circuit (220). The dedicated ground isolation pad (306) collects noise from the P well ring (224) and sends it to ground. The dedicated ground isolation pad (306) and the ground pad (304) collect noise that would normally propagate between the first and second noise sensitive circuits (120, 220) and additional circuits that share the same substrate (110).
    • 一种片上系统(SOC)(100)以及分离SOC中的噪声的方法,包括多个噪声敏感电路块(120,220)和ESD保护焊盘(302,304,306,308,310,312,312) 和314)。 VDD隔离焊盘(302)连接到第一噪声敏感电路(120)的N阱环(124),以从基板(110)收集噪声,并将电路与P阱区域(112)隔离。 接地保护焊盘(304)连接到第一噪声敏感电路(120)的隔离P阱(126)。 接地焊盘(304)从隔离的P阱(126)收集噪声并将其发送到地面。 专用接地隔离垫(306)连接到第二噪声敏感电路(220)的P阱环(224)。 专用接地隔离垫(306)从P阱环(224)收集噪声并将其发送到地面。 专用接地隔离焊盘(306)和接地焊盘(304)收集正常地在第一和第二噪声敏感电路(120,220)之间传播的噪声以及共享相同衬底(110)的附加电路。
    • 3. 发明申请
    • ELECTRONIC DEVICE WITH CONNECTION BUMPS
    • 具有连接件的电子设备
    • WO2009094024A1
    • 2009-07-30
    • PCT/US2008/051783
    • 2008-01-23
    • FREESCALE SEMICONDUCTOR INC.SECAREANU, Radu, M.BANERJEE, Suman, K.HARTIN, Olin, L.WIPF, Sandra, J.
    • SECAREANU, Radu, M.BANERJEE, Suman, K.HARTIN, Olin, L.WIPF, Sandra, J.
    • H01L21/60H05K3/34
    • H01L24/14H01L2224/14133H01L2224/17519H01L2924/01033H01L2924/14H01L2924/19043H01L2924/3011
    • Flip-chip electronic devices (40, 70, 80, 90) employ bumps (42, 72, 82) for coupling to an external substrate. Device cells (43, 73, 83, 93) and bumps (42, 72, 82) are preferably arranged in clusters (46) where four bumps (42, 72, 82) substantially surround each device cell (43, 73, 83, 93) or form a cross with the device cell (43, 73, 83, 93) at the intersection of the cross. The bumps (42, 72, 82) are desirably spaced apart by the minimum allowable bump (42, 72, 82) pitch (L m ). Typically, each device cell (43, 73, 83, 93) contains one or more active device regions (44, 74, 86, 96) depending on the overall function. Complex devices (40, 70) are formed by an X-Y array of the clusters (46), where adjacent clusters (46) may share bumps (43, 73, 83, 93) and/or device cells (43, 73, 83, 93). In a preferred embodiment, the bumps (42, 82) form the outer perimeter (48) of the device (40, 80, 90). The maximum device temperature and overall noise is reduced.
    • 倒装芯片电子器件(40,70,80,90)使用用于耦合到外部衬底的凸块(42,72,82)。 装置单元(43,73,83,93)和凸块(42,72,82)优选地布置成簇(46),其中四个凸块(42,72,82)基本上围绕每个器件单元(43,73,83) 93)或与十字交叉点处的设备单元(43,73,83,93)形成十字。 凸起(42,72,82)期望地间隔开最小允许凸起(42,72,82)间距(Lm)。 通常,取决于整个功能,每个设备单元(43,43,83,93)包含一个或多个有源器件区域(44,47,86,96)。 复数器件(40,70)由簇(46)的XY阵列形成,其中相邻的簇(46)可共享凸块(43,43,83,93)和/或器件单元(43,43,83, 93)。 在优选实施例中,凸块(42,82)形成装置(40,80,90)的外周边(48)。 最大器件温度和总噪声降低。
    • 4. 发明申请
    • WIRELESS COMMUNICATIONS WITH ENHANCED USAGE OF SPECTRUM THROUGH EFFICIENT USE OF OVERLAPPING CHANNELS
    • 通过有效利用重叠通道增强频谱的无线通信
    • WO2008002843A3
    • 2008-02-21
    • PCT/US2007071913
    • 2007-06-22
    • WISCONSIN ALUMNI RES FOUNDMISHRA ARUNESHBANERJEE SUMANSHRIVASTAVA VIVEK V
    • MISHRA ARUNESHBANERJEE SUMANSHRIVASTAVA VIVEK V
    • H04L12/28H04W72/08H04W84/12
    • H04W72/082H04W84/12
    • An improved system and method for wireless communications, as well as a method for configuring wireless communication devices for use in such a system, are disclosed. In at least some embodiments, the system for wireless communications includes a first wireless communication device configured for communication within a first frequency range, and a second wireless communication device configured for communication within a second frequency range, where the first and second frequency ranges substantially but not entirely overlap one another. Also, in at least some embodiments, the present invention relates to a method that wireless communicating devices can use in order to co-exist or utilize wireless channels that need not be non-overlapping. By allowing wireless devices to do this, it is possible to achieve greater usage of the wireless spectrum and as a result superior performance of the wireless communication system as a whole.
    • 公开了一种用于无线通信的改进的系统和方法,以及用于配置在这种系统中使用的无线通信设备的方法。 在至少一些实施例中,用于无线通信的系统包括配置用于在第一频率范围内进行通信的第一无线通信设备和被配置用于在第二频率范围内通信的第二无线通信设备,其中第一和第二频率范围基本上但是 不完全重叠。 此外,在至少一些实施例中,本发明涉及无线通信设备可以使用以便共存或利用不必须不重叠的无线信道的方法。 通过允许无线设备这样做,可以实现无线频谱的更多使用,并且作为整体的无线通信系统的优异性能。
    • 7. 发明申请
    • INTEGRATED CIRCUIT WITH IMPROVED SIGNAL NOISE ISOLATION AND METHOD FOR IMPROVING SIGNAL NOISE ISOLATION
    • 具有改进的信号噪声隔离的集成电路和用于改善信号噪声隔离的方法
    • WO2006130260A3
    • 2009-04-30
    • PCT/US2006015113
    • 2006-04-21
    • FREESCALE SEMICONDUCTOR INCBANERJEE SUMAN KFERRER ENRIQUEHARTIN OLIN LSECAREANU RADU M
    • BANERJEE SUMAN KFERRER ENRIQUEHARTIN OLIN LSECAREANU RADU M
    • H01L29/76
    • H01L27/0248H01L23/552H01L2924/0002H01L2924/00
    • A system-on chip (SOC) (100) and method of isolating noise in a SOC, including a plurality of noise sensitive circuit blocks (120, 220) and ESD protected pads (302, 304, 306, 308, 310, 312, and 314). A VDD isolation pad (302) is connected to an N well ring (124) of the first noise sensitive circuit (120) to collect noise from the substrate (110) and isolate the circuit from the P well region (112). A ground protected pad (304) is connected to an isolated P well (126) of a first noise sensitive circuit (120). The ground pad (304) collects noise from the isolated P well (126) and sends it to ground. A dedicated ground isolation pad (306) is connected to a P well ring (224) of a second noise sensitive circuit (220). The dedicated ground isolation pad (306) collects noise from the P well ring (224) and sends it to ground. The dedicated ground isolation pad (306) and the ground pad (304) collect noise that would normally propagate between the first and second noise sensitive circuits (120, 220) and additional circuits that share the same substrate (110).
    • 一种片上系统(SOC)(100)以及分离SOC中的噪声的方法,包括多个噪声敏感电路块(120,220)和ESD保护焊盘(302,304,306,308,310,312,312) 和314)。 VDD隔离焊盘(302)连接到第一噪声敏感电路(120)的N阱环(124),以从基板(110)收集噪声,并将电路与P阱区域(112)隔离。 接地保护焊盘(304)连接到第一噪声敏感电路(120)的隔离P阱(126)。 接地焊盘(304)从隔离的P阱(126)收集噪声并将其发送到地面。 专用接地隔离垫(306)连接到第二噪声敏感电路(220)的P阱环(224)。 专用接地隔离垫(306)从P阱环(224)收集噪声并将其发送到地面。 专用接地隔离焊盘(306)和接地焊盘(304)收集正常地在第一和第二噪声敏感电路(120,220)之间传播的噪声以及共享相同衬底(110)的附加电路。