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    • 71. 发明申请
    • CAPACITANCE ARRANGEMENT AND METHOD RELATING THERETO
    • 电容布置及其相关方法
    • WO2008043395A1
    • 2008-04-17
    • PCT/EP2006/067347
    • 2006-10-12
    • TELEFONAKTIEBOLAGET LM ERICSSON (publ)GEVORGIAN, SpartakDELENIV, AnatoliLEWIN, Thomas
    • GEVORGIAN, SpartakDELENIV, AnatoliLEWIN, Thomas
    • H01G4/005H01G5/04
    • H01G4/005H01G7/06Y10T29/435
    • The present invention relates to a capacitance arrangement (10) comprising at least one parallel-plate capacitor comprising a first electrode means, a dielectric layer and a second electrode means partly overlapping each other, the equivalent capacitance of being dependent on the size of the overlapping area. A misalignment limit (Δx A ) is given. Said first electrode means comprises a first and a second electrode (4 1 ,4 2 ) arranged symmetrically with respect to a longitudinal axis (x) , said first and second electrodes have a respective first edge, which face each other, are linear and parallel such that a gap is defined there between. Said second electrode means (3) comprises a third electrode with a first section (3 1 ) and a second section (3 2 ) disposed on opposite sides of said gap interconnected by means of an intermediate section (3 3 ), which is delimited by a function F(x) depending on a first parameter k and a second parameter A. One of said two parameters is adapted to be selected hence allowing calculation of the other parameter to determine the shape and size of the second electrode means such that the capacitance of the capacitance arrangement will be misalignment invariable within the misalignment limit.
    • 本发明涉及一种电容装置(10),其包括至少一个平行电容器,其包括第一电极装置,电介质层和彼此部分重叠的第二电极装置,等效电容取决于重叠的尺寸 区。 给出了未对准极限(ΔXAA)。 所述第一电极装置包括相对于纵向轴线(x)对称地布置的第一和第二电极(4,2A,2π2),所述第一和第二电极具有 彼此面对的相应的第一边缘是线性的和平行的,使得在其间限定间隙。 所述第二电极装置(3)包括具有第一部分(3< 1>)的第三电极和设置在所述间隙的相对侧上的第二部分(3< 2& 根据第一参数k和第二参数A由功能F(x)限定的中间部分(3)的装置。所述两个参数中的一个适于被选择 允许计算另一参数以确定第二电极装置的形状和尺寸,使得电容布置的电容将在不对准极限内不变。
    • 73. 发明申请
    • FAILURE RESISTANT CERAMIC POLYMER CAPACITOR
    • 耐磨陶瓷聚合物电容器
    • WO2008040114A1
    • 2008-04-10
    • PCT/CA2007/001454
    • 2007-08-21
    • KELLY, David A.
    • KELLY, David A.
    • H01G4/12H01G4/005H01G4/008H01G4/14H01G4/30H01G4/32
    • H01G4/30H01G4/0085H01G4/14H01G4/206Y02T10/7022
    • A failure resistant capacitor, using ceramic polymer as the dielectric in a capacitor structure. The capacitor is made using at least one failure resistant electrode forming one polarity of electrode in capacitor. The dielectric layers separating the electrodes are composed at least partly of a high K ceramic material with a polymer binding agent. Each layer of the capacitor has an electrode on one side of a dielectric layer, which is then assembled such that there is at least one alternating failure resistant electrode with at least one dielectric layer separating an adjacent opposite polarity electrode. The failure resistant electrode is designed to be capable of disconnecting a defect in the dielectric layer from the rest of the capacitor structure. Alternately, the capacitor may be constructed with an electrode structure that limits the energy discharged through a defect in the dielectric layer to an amount predefined by the electrode construction. The dielectric layer is composed of a ceramic polymer dielectric which is supported by a carrier layer forming part of the capacitor electrode structure.
    • 耐电容电容器,使用陶瓷聚合物作为电容器结构中的电介质。 电容器使用至少一个在电容器中形成电极的一个极性的故障电阻电极制成。 分离电极的电介质层至少部分地由具有聚合物粘合剂的高K陶瓷材料组成。 电容器的每一层在电介质层的一侧具有电极,然后将其组装成使得至少一个具有至少一个隔离相邻极性电极的电介质层的交流故障电阻电极。 抗故障电极被设计成能够将电介质层中的缺陷与电容器结构的其余部分断开。 或者,电容器可以由电极结构构成,其将通过电介质层中的缺陷放电的能量限制为由电极结构预定义的量。 电介质层由形成电容器电极结构的一部分的载体层支撑的陶瓷聚合物电介质组成。
    • 75. 发明申请
    • LOW INDUCTANCE MULTILAYER CAPACITOR
    • 低电感多层电容器
    • WO2007011853A2
    • 2007-01-25
    • PCT/US2006/027635
    • 2006-07-17
    • ROY, Apurba
    • ROY, Apurba
    • H01G4/005
    • H01G4/012H01G4/232H01G4/30
    • A multilayer parallel plate capacitor with an extremely low inductance comprises a generally rectangular parallelepiped that includes at least one pair of generally rectangular consecutive composite layers (40A, 40B) stacked parallel to each other in the vertical direction, each composite layer (40A, 40B) of the pair comprising a dielectric substrate (41A, 41B) and a conductor plate (42A, 42B) thereon. Each conductor plate (42A, 42B) includes two or more lead portions (45A, 45B) to enable connection to terminal electrodes, and plates (42A, 42B) on consecutive composite layers (40A, 40B) are connected to terminal electrodes of opposite polarity. Each conductor plate (42A, 42B) advantageously includes one or more non-conductive regions comprising slots (44Y) in the transverse direction, and one or more non-conductive regions comprising slots (44X) in the longitudinal direction. These slots (44X, 44Y) provide directionality to the electrical currents (47A, 47B) through the plates (42A, 42B), resulting in a capacitor structure with greatly reduced inductance.
    • 具有极低电感的多层平行平板电容器包括大致长方体,其包括在垂直方向上彼此平行堆叠的至少一对大致矩形的连续复合层(40A,40B) 其中的每个复合层(40A,40B)包括介电基片(41A,41B)和其上的导体板(42A,42B)。 每个导体板(42A,42B)包括两个或更多个引线部分(45A,45B),以能够连接到端子电极,并且连续复合层(40A,40B)上的板(42A,42B)连接到极性相反的端子电极 。 每个导体板(42A,42B)有利地包括沿横向方向包括狭槽(44Y)的一个或多个非导电区域以及在纵向方向上包括狭槽(44X)的一个或多个非导电区域。 这些槽(44X,44Y)通过板(42A,42B)为电流(47A,47B)提供方向性,导致电感器结构大大降低。