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31. 发明申请

WO0219539A9 SOFT−OUTPUT DECODER 审中-公开
标题翻译：软输出解码器
公开(公告)号：WO0219539A9
公开(公告)日：2002-11-28
申请号：PCT/JP0107576
申请日：2001-08-31
申请人： SONY CORP , MIYAUCHI TOSHIYUKI , YAMAMOTO KOUHEI
发明人： MIYAUCHI TOSHIYUKI , YAMAMOTO KOUHEI
IPC分类号： G06F11/10 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/39 , H03M13/45
CPC分类号： H03M13/2957 , H03M13/27 , H03M13/2903 , H03M13/6566
摘要： The position where the code is deleted is appropriately expressed through a simple constitution of a small circuit scale. A soft−output decoding circuit (90) of an element decoder has a reception value and prior probability information selecting circuit (154) for selecting an inputted decoding reception value TSR, extrinsic information, or interleave data TEXT as information necessary for soft−output decoding. The reception value and prior probability information selecting circuit (154) replaces the data at which no code output is present because of, e.g., puncture with a symbol having a likelihood of “0” according to intrinsic erasure position information IERS supplied from an intrinsic erasure information generating circuit (152). Consequently, the reception value and prior probability information selecting circuit (154) outputs information representing that the probability that the bit at the position where no code output is present is “0” or “1” is “1/2”.
摘要翻译：代码被删除的位置通过小电路规模的简单结构适当地表示。元件解码器的软输出解码电路（90）具有接收值和先验概率信息选择电路（154），用于选择输入的解码接收值TSR，外在信息或交织数据TEXT作为软输出解码所需的信息。接收值和先验概率信息选择电路（154）由于例如根据从内在擦除提供的固有擦除位置信息IERS的符号具有“0”的符号进行穿孔而替换不存在代码输出的数据信息生成电路（152）。因此，接收值和先验概率信息选择电路（154）输出表示不存在代码输出的位置的位为“0”或“1”的概率的信息。

32. 发明申请

WO0169797A3 ENHANCED TURBO PRODUCT CODES 审中-公开
标题翻译：增强涡轮产品代码
公开(公告)号：WO0169797A3
公开(公告)日：2002-02-28
申请号：PCT/US0108101
申请日：2001-03-14
申请人： ADVANCED HARDWARE ARCHITECTURE
发明人： HEWITT ERIC JOHN , LINDSTROM BRADLEY WILLIAM , LADOW PETER SEAN , DANIELSON ALAN ROBERT
IPC分类号： G06F11/10 , H03M13/29
CPC分类号： H03M13/2963 , H03M13/2903 , H03M13/2909 , H03M13/2918 , H03M13/2921
摘要： A hyper encoder module encodes a block of data having a plurality of sub-blocks. Each sub-block includes a plurality of systematic block code codewords. A parity sub-block is added to the block. The parity sub-block is a first sub-block rotated by a predetermined number of bits. Each subsequent sub-block in the n-dimensional block is rotated by an appropriate number of bits and bit-wise XORed. An encoder method and apparatus which includes the hyper encoder module receives the block of data. A row of the block is immediately output and encoded by a first module according to a first encoding scheme. A column is encoded by a second module according to a second encoding scheme. A second set of encoded data is generated, iteratively updated and output by the second module. The hyper encoder module hyper-diagonally encodes the information bits as described above and then output.
摘要翻译：超编码器模块对具有多个子块的数据块进行编码。每个子块包括多个系统块码码字。奇偶校验子块被添加到块中。奇偶校验子块是以预定位数旋转的第一子块。 n维块中的每个后续子块被旋转适当数量的位并且进行逐位异或。包括超编码器模块的编码器方法和装置接收数据块。根据第一编码方案，块的一行立即由第一模块输出和编码。根据第二编码方案，列由第二模块编码。生成第二组编码数据，迭代地更新并由第二模块输出。超编码器模块如上所述对信息位进行超对角编码，然后输出。

33. 发明申请

WO0209380A2 A MODULATION TECHNIQUE PROVIDING HIGH DATA RATE THROUGH BAND LIMITED CHANNELS 审中-公开
标题翻译：通过带有限通道提供高数据速率的调制技术
公开(公告)号：WO0209380A2
公开(公告)日：2002-01-31
申请号：PCT/US0122851
申请日：2001-07-20
申请人： THOMSON LICENSING SA , MOHAN CHANDRA , ZHANG ZHIMING JAMES , MAJUMDAR JAYANTA
发明人： MOHAN CHANDRA , ZHANG ZHIMING JAMES , MAJUMDAR JAYANTA
IPC分类号： H04N7/173 , G06F11/10 , G06F15/00 , G06F21/24 , G09C1/00 , G11B20/10 , G11B20/14 , G11B20/18 , G11B20/22 , H03L7/091 , H03M13/03 , H03M13/13 , H03M13/23 , H03M13/29 , H04B1/707 , H04B7/005 , H04B7/24 , H04B7/26 , H04B14/00 , H04H60/72 , H04J13/00 , H04J13/16 , H04L1/00 , H04L9/00 , H04L9/08 , H04L9/10 , H04L9/32 , H04L12/24 , H04L12/54 , H04L25/03 , H04L25/49 , H04L25/497 , H04L27/10 , H04L27/156 , H04L27/18 , H04L29/06 , H04M1/247 , H04M1/66 , H04N7/26 , H04N7/52 , H04W4/06 , H04W4/12 , H04W4/14 , H04W8/02 , H04W8/16 , H04W8/20 , H04W8/24 , H04W8/26 , H04W12/06 , H04W12/10 , H04W24/00 , H04W40/22 , H04W72/04 , H04W76/02 , H04W80/06 , H04W84/12 , H04W88/02 , H04L27/00
CPC分类号： H04L65/1043 , G06F21/305 , G06F21/6209 , G06F21/74 , G06F21/88 , G06F2221/2105 , G06F2221/2115 , G11B20/10009 , G11B20/10425 , G11B20/22 , H03L7/091 , H03M7/4006 , H03M13/23 , H03M13/2903 , H03M13/2993 , H03M13/6356 , H03M13/6362 , H04B7/2628 , H04B10/25754 , H04J13/0077 , H04J13/16 , H04L1/0066 , H04L1/0068 , H04L9/085 , H04L9/304 , H04L12/4641 , H04L25/03038 , H04L25/4902 , H04L25/4904 , H04L25/497 , H04L27/156 , H04L41/06 , H04L43/0829 , H04L47/15 , H04L47/70 , H04L47/72 , H04L47/745 , H04L47/765 , H04L47/822 , H04L47/824 , H04L51/04 , H04L51/28 , H04L51/38 , H04L65/1006 , H04L65/1016 , H04M1/72533 , H04M3/42221 , H04M7/1295 , H04N19/109 , H04N19/139 , H04N19/625 , H04N19/91 , H04W4/12 , H04W4/14 , H04W8/245 , H04W8/26 , H04W28/00 , H04W28/18 , H04W28/26 , H04W40/00 , H04W52/30 , H04W72/042 , H04W76/022 , H04W88/085 , H04W88/16 , Y10S370/906 , Y10S370/907
摘要： A digital data modulator (Fig. 1) is coupled to a source (IN) of a digital data signal. An encoder (10) encodes the digital data using a variable pulse width code. A pulse signal generator (20, 25) generates pulses representing edges of the encoded digital data signal. A carrier signal generator (30, 40) generates a carrier signal having carrier pulses corresponding to the pulses from the pulse signal generator. A corresponding digital data demodulator (Fig. 3) is coupled to a source (IN) of a modulated signal having carrier pulses spaced relative to each other to represent a variable pulse width encoded digital data signal. A detector (140) generates a variable pulse width encoded signal in response to received carrier pulses. A decoder (150) decodes the variable pulse width encoded to generate the digital data signal.
摘要翻译：数字数据调制器（图1）耦合到数字数据信号的源（IN）。编码器（10）使用可变脉冲宽度码对数字数据进行编码。脉冲信号发生器（20,25）产生表示编码的数字数据信号的边沿的脉冲。载波信号发生器（30,40）产生具有对应于来自脉冲信号发生器的脉冲的载波脉冲的载波信号。对应的数字数据解调器（图3）耦合到具有相对于彼此间隔开的载波脉冲的调制信号的源（IN），以表示可变脉冲宽度编码的数字数据信号。检测器（140）响应于接收的载波脉冲产生可变脉宽编码信号。解码器（150）解码编码的可变脉冲宽度以产生数字数据信号。

34. 发明申请

WO01020787A1 PARALLEL TURBO CODER IMPLEMENTATION 审中-公开
标题翻译：并行涡轮编码器实现
公开(公告)号：WO01020787A1
公开(公告)日：2001-03-22
申请号：PCT/EP2000/008631
申请日：2000-09-04
IPC分类号： G06F11/10 , H03M13/29
CPC分类号： H03M13/6561 , H03M13/235 , H03M13/2903 , H03M13/2957
摘要： In order to achieve a turbo coder block having an increased processing speed it is proposed to carry out a parallelization of degree n. As a result each parallelized turbo coder block comprises a storage unit (I0, ..., I7) to store n samples (I(t-1), ..., I(t-n)) of an input signal I(t) to the parallelized turbo coding block and at least one storage unit (Q0, ..., Q7) to store n samples (Qj(t), ..., Qj(t-(n-1)) of at least one output signal Qj(t) (j=1,..., M) of the parallelized turbo coding block. Further, the parallelized turbo coder block comprises a bank of n delay units (X1, ..., XN) and is adapted to a parallel processing of n samples of the input signal I(t) such that at least two delay units (X1, ..., XN) of the bank directly receive subsets of the n samples (I(t-1), ..., I(t-n)) of the input signal I(t) and an output signal of at least one delay unit (X1, ..., XN) in the parallelized turbo coder block is supplied to at least two delay units in the parallelized turbo coder block.
摘要翻译：为了实现具有增加的处理速度的turbo编码器块，提出了执行度n的并行化。结果，每个并行化的turbo编码器块包括存储单元（I0，...，I7）以存储输入信号I（t）的n个采样（I（t-1），...，I（tn）并行化的turbo编码块和至少一个存储单元（Q0，...，Q7），以存储至少一个输出的n个采样（Qj（t），...，Qj（t-（n-1）并行化Turbo编码块的信号Qj（t）（j = 1，...，M），并行化turbo编码器块包括一组n个延迟单元（X1，...，XN），并适用于输入信号I（t）的n个采样的并行处理使得存储体的至少两个延迟单元（X1，...，XN）直接接收n个采样（I（t-1），... 输入信号I（t）的输出信号I I（t n）和并行化turbo编码器块中的至少一个延迟单元（X1，...，XN）的输出信号被提供给至少两个延迟单元并行涡轮编码器块。

35. 发明申请

WO00048323A1 DATA TRANSMISSION SYSTEM, DATA RECEIVER, AND DATA TRANSMITTING METHOD 审中-公开
标题翻译：数据传输系统，数据接收器和数据传输方法
公开(公告)号：WO00048323A1
公开(公告)日：2000-08-17
申请号：PCT/JP2000/000709
申请日：2000-02-09
IPC分类号： G11B20/10 , H03M13/29 , H03M13/35 , H04L1/00
CPC分类号： H04L1/0057 , G11B20/10 , G11B2020/10944 , H03M13/1515 , H03M13/27 , H03M13/2903 , H03M13/2906 , H03M13/2909 , H03M13/293 , H03M13/2939 , H03M13/2957 , H03M13/35 , H04L1/0017 , H04L1/0036 , H04L1/0045 , H04L1/0051 , H04L1/0065
摘要： A receiver capable of decoding a signal in accordance with the decoding ability of the receiver and the request about the signal to be decoded and a transmitter capable of performing such error correction and encoding are disclosed. Error-correcting/encoding means (11) of a transmitter (1) performs a predetermined error correction processing of digital transmitted data and a predetermined encoding processing of the data. The transmitted data may involve an error or errors while being transmitted through a transmission line (3). Decoding means (20) of a receiver (2) performs an error-correction processing and a decoding processing of the received data according to the degree of the error-correction processing and to that of the decoding processing. Preferably, the error-correcting/encoding means (11) encodes data by using systematic codes as an error-correction processing and an encoding processing about which the decoding means (20) can omit a simple processing or an error correction processing and decoding processing, or the error-correcting/encoding means (11) encodes data by using error-correcting codes, such as a multiplication sign, a connection sign, and turbo sign, the error characteristics of which are controllable by the number of repetitive processings by the decoding means (20).
摘要翻译：公开了一种能够根据接收机的解码能力和关于要解码的信号的请求解码信号的接收机以及能够执行这种纠错和编码的发射机。发射机（1）的纠错/编码装置（11）执行数字发送数据的预定纠错处理和数据的预定编码处理。所发送的数据可能在通过传输线（3）传输时涉及错误或错误。接收机（2）的解码装置（20）根据纠错处理的程度和解码处理的程度进行纠错处理和接收数据的解码处理。优选地，纠错/编码装置（11）通过使用系统代码作为纠错处理和解码装置（20）可以省略简单处理或纠错处理和解码处理的编码处理来对数据进行编码，或者纠错/编码装置（11）通过使用诸如乘法符号，连接符号和turbo符号的纠错码对数据进行编码，其错误特性由解码的重复处理次数控制（20）。

36. 发明申请

WO2016137234A1 TRANSMITTER AND REPETITION METHOD THEREOF 审中-公开
标题翻译：发射机和重发方法
公开(公告)号：WO2016137234A1
公开(公告)日：2016-09-01
申请号：PCT/KR2016/001820
申请日：2016-02-24
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： MYUNG, Se-ho , KIM, Kyung-joong , JEONG, Hong-sil
IPC分类号： H03M13/00 , H03M13/19
CPC分类号： H03M13/6356 , H03M13/1102 , H03M13/1111 , H03M13/1165 , H03M13/152 , H03M13/255 , H03M13/2778 , H03M13/2903 , H03M13/3761 , H03M13/3769 , H03M13/611 , H03M13/63 , H03M13/6362 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/0065 , H04L1/0067 , H04L1/0071
摘要： A transmitter is provided. The transmitter includes: a low density parity check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits; a repeater configured to select at least a part of bits constituting the LDPC codeword and add the selected bits after the input bits; and a puncturer configured to puncture at least a part of the parity bits.
摘要翻译：提供发射机。所述发射机包括：低密度奇偶校验（LDPC）编码器，其被配置为对输入比特进行编码以生成包括所述输入比特和奇偶校验比特的LDPC码字; 配置为选择构成LDPC码字的比特的至少一部分并在所述输入比特之后添加所选择的比特; 以及被配置为对所述奇偶校验位的至少一部分进行穿刺的穿刺器。

37. 发明申请

WO2014070275A1 BIT-INTERLEAVED CODED MODULATION WITH ITERATIVE DECODING AND FRACTIONAL INNER CODING 审中-公开
标题翻译：具有迭代解码和分段内编码的双字节编码调制
公开(公告)号：WO2014070275A1
公开(公告)日：2014-05-08
申请号：PCT/US2013/054819
申请日：2013-08-14
申请人： TYCO ELECTRONICS SUBSEA COMMUNICATIONS LLC
发明人： ZHANG, Hongbin , BATSHON, Hussam G.
IPC分类号： H03M13/25 , H03M13/29 , H04L1/00 , H03M13/09 , H03M13/11
CPC分类号： H03M13/29 , H03M13/098 , H03M13/1102 , H03M13/253 , H03M13/255 , H03M13/2903 , H03M13/2906 , H03M13/2957 , H04L1/0041 , H04L1/0045 , H04L1/005 , H04L1/0057 , H04L1/0063 , H04L1/007 , H04L1/0071
摘要： The present invention relates to a system (100) and method (600) for modified bit- interleaved coded modulation with iterative decoding (BICM-ID). A first group of coded and interleaved bits (207-1, 207-2, 207-i) is coded with a second. FEC code (208) and a second group of coded and interleaved bits (209-1, 209-n) is not coded with the second FEC code. The first and second groups are then mapped to a modulation format (210). The second FEC code may be a single parity check (SPC) code and the first code may be low-density parity check (LDPC) code. The coding scheme may be referred to as a BICM-ID scheme with fractional secondary coding.
摘要翻译：本发明涉及一种用于通过迭代解码（BICM-ID）修改的位交错编码调制的系统（100）和方法（600）。第一组编码和交织位（207-1,207-2,207-i）用第二组编码。 FEC码（208）和第二组编码和交织比特（209-1,209-n）不用第二FEC码进行编码。然后将第一和第二组映射到调制格式（210）。第二FEC码可以是单个奇偶校验（SPC）码，第一码可以是低密度奇偶校验（LDPC）码。编码方案可以被称为具有分数次级编码的BICM-ID方案。

38. 发明申请

WO2009021065A1 ENCODING AND DECODING USING GENERALIZED CONCATENATED CODES (GCC) 审中-公开
标题翻译：使用通用的编码（GCC）编码和解码
公开(公告)号：WO2009021065A1
公开(公告)日：2009-02-12
申请号：PCT/US2008/072373
申请日：2008-08-06
申请人： MARVELL WORLD TRADE LTD. , YANG, Xueshi , BURD, Gregory , TANG, Heng , CHAICHANAVONG, Panu , WU, Zining
发明人： YANG, Xueshi , BURD, Gregory , TANG, Heng , CHAICHANAVONG, Panu , WU, Zining
IPC分类号： H03M13/29
CPC分类号： H03M13/2945 , G06F11/1068 , H03M13/033 , H03M13/1515 , H03M13/2903 , H03M13/2906
摘要： Systems, apparatuses, and methods for encoding and decoding using generalized concatenated codes (GCC) are described. The methods include receiving data; encoding the received data to obtain first encoded data; encoding the first encoded data until a GCC encoding reaches an intermediate level; and terminating the GCC encoding at the intermediate level. Hence, the number of outer codes is reduced by replacing the last layer (s) of outer code (s) by uncoded symbols. The GCC codes may be concatenated with an outer-layer code or an inner-layer code.
摘要翻译：描述使用广义级联码（GCC）的编码和解码的系统，装置和方法。方法包括接收数据; 对所接收的数据进行编码以获得第一编码数据; 对第一编码数据进行编码，直到GCC编码达到中间级; 并终止中级的GCC编码。因此，通过用未编码的符号代替外部码的最后一层来减少外部码的数量。 GCC代码可以与外层代码或内层代码连接。

39. 发明申请

WO2008119275A1 虚拟租用线路的故障监听方法与装置审中-公开
公开(公告)号：WO2008119275A1
公开(公告)日：2008-10-09
申请号：PCT/CN2008/070349
申请日：2008-02-22
申请人：华为技术有限公司 , 刘长宝 , 子康
发明人：刘长宝 , 子康
IPC分类号： H04L12/26 , H04L12/46 , H04L12/56 , H04L29/06 , H04L1/22 , H04L12/24 , H04B1/74
CPC分类号： H04L65/1043 , G06F21/305 , G06F21/6209 , G06F21/74 , G06F21/88 , G06F2221/2105 , G06F2221/2115 , G11B20/10009 , G11B20/10425 , G11B20/22 , H03L7/091 , H03M7/4006 , H03M13/23 , H03M13/2903 , H03M13/2993 , H03M13/6356 , H03M13/6362 , H04B7/2628 , H04B10/25754 , H04J13/0077 , H04J13/16 , H04L1/0066 , H04L1/0068 , H04L9/085 , H04L9/304 , H04L25/03038 , H04L25/497 , H04L41/06 , H04L43/0829 , H04L51/04 , H04L51/28 , H04L51/38 , H04L65/1006 , H04L65/1016 , H04M1/72533 , H04M3/42221 , H04M7/1295 , H04N19/109 , H04N19/139 , H04N19/625 , H04N19/91 , H04W4/12 , H04W4/14 , H04W8/245 , H04W8/26 , H04W52/30 , H04W72/042 , H04W76/12 , H04W88/085 , Y10S370/906 , Y10S370/907
摘要： A failure monitoring method for a virtual leased line is provided, and the method includes: receiving a message sent by a local user end to an opposite user end from the virtual leased line; judging whether the received message is a link protocol message; and when the message is a link protocol message, judging whether the link protocol message is a failure message. In addition, a failure monitoring device for a virtual leased line is provided, and the device can monitor the failure occurring in any position of the link when the same media are interconnected, and can fast reroute the virtual leased line service according to the monitored failure.

40. 发明申请

WO2008042587A3 DETERMINATION OF INTERLEAVER SIZES FOR TURBO CODES 审中-公开
标题翻译：确定涡轮代码的交叉尺寸
公开(公告)号：WO2008042587A3
公开(公告)日：2008-07-10
申请号：PCT/US2007078678
申请日：2007-09-17
申请人： MOTOROLA INC , NIMBALKER AJIT , BLANKENSHIP YUFEI W , CLASSON BRIAN K
发明人： NIMBALKER AJIT , BLANKENSHIP YUFEI W , CLASSON BRIAN K
IPC分类号： H03M13/27 , H03M13/29
CPC分类号： H03M13/2789 , H03M13/275 , H03M13/2903 , H03M13/2957 , H03M13/2996 , H03M13/6566
摘要： A method and apparatus for selecting interleaver sizes for turbo codes is provided herein. During operation information block of size K is received. An interleaver size K' is determined that is related to K", where K" from a set of sizes; wherein the set of sizes comprise K" = a p x f, p
摘要翻译：本文提供了一种用于选择turbo码的交织器大小的方法和装置。在操作期间，接收大小为K的信息块。确定与K“相关的交织器尺寸K'，其中K”来自一组尺寸; 其中所述尺寸集合包括K“= a P”x f，p

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