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11. 发明申请

WO2004030049A2 A METHOD AND SYSTEM FOR ETCHING HIGH-K DIELECTRIC MATERIALS 审中-公开
标题翻译：一种用于蚀刻高K电介质材料的方法和系统
公开(公告)号：WO2004030049A2
公开(公告)日：2004-04-08
申请号：PCT/US2003/029978
申请日：2003-09-25
申请人： TOKYO ELECTRON LIMITED , CHEN, lee , LUDVIKSSON, Audunn
发明人： CHEN, lee , LUDVIKSSON, Audunn
IPC分类号： H01L21/00
CPC分类号： H01L21/28185 , H01L21/31116 , H01L21/31122 , H01L21/67069 , H01L21/67253 , H01L29/51 , H01L29/517
摘要： A system and a method to remove a layer of high-k dielectric material during the manufacturing of an integrated circuit. In one embodiment of the invention, an etch reactant is employed to form volatile etch products when reacted with high-k layers. Alternately, high-k layers can be anisotropically etched of in accordance with a patterned photoresist or hard mask, where a hyperthermal beam of neutral atoms is used to aid in the reaction of an etch reactant with a high-k layer. Alternately, a hyperthermal beam of neutral atoms or a plasma treatment can used to modify a high-k layer, and subsequently etch the modified high-k layer utilizing an etch reactant that reacts with the modified high-k layer. In still another embodiment of the invention, the hyperthermal beam of neutral atoms is used to etch a high-k layer through physical bombardment of the high-k layer.
摘要翻译：在制造集成电路期间去除高k电介质材料层的系统和方法。在本发明的一个实施方案中，当与高k层反应时，使用蚀刻反应物形成挥发性蚀刻产物。或者，高k层可以根据图案化的光致抗蚀剂或硬掩模进行各向异性蚀刻，其中使用中性原子的超热束来帮助蚀刻反应物与高k层的反应。或者，可以使用中性原子的超热束或等离子体处理来修饰高k层，随后使用与修饰的高k层反应的蚀刻反应物蚀刻修饰的高k层。在本发明的另一个实施例中，使用中性原子的超热束来通过物理轰击高k层蚀刻高k层。

12. 发明申请

WO2004003256A1 ANISOTROPIC DRY ETCHING OF CU-CONTAINING LAYERS 审中-公开
标题翻译：包含层的各向异性干蚀刻
公开(公告)号：WO2004003256A1
公开(公告)日：2004-01-08
申请号：PCT/US2003/016240
申请日：2003-06-27
申请人： TOKYO ELECTRON LIMITED , CHEN, Lee , LUDVIKSSON, Audunn
发明人： CHEN, Lee , LUDVIKSSON, Audunn
IPC分类号： C23F1/00
CPC分类号： C23F1/12 , B81C1/00492 , B81C2201/0143 , C23F4/00 , H01L21/32135 , H01L21/32136 , H01L21/76838
摘要： A method and apparatus for dry etching pure Cu and Cu-containing layers (220, 310) for manufacturing integrated circuits. The invention uses a directional beam of O-atoms with high kinetic energy (340) to oxidize the Cu and Cu-containing layers, and etching reagents (370) that react with the oxidized Cu (360) to form volatile Cu-containing etch products (390). The invention allows for low-temperature, anisotropic etching of pure Cu and Cu-containing layers in accordance with a patterned hard mask or photoresist (230, 330).
摘要翻译：用于干蚀刻用于制造集成电路的纯Cu和Cu层（220,310）的方法和装置。本发明使用具有高动能（340）的O原子的定向光束氧化含Cu和Cu的层，以及与氧化的Cu（360）反应形成挥发性含Cu蚀刻产物的蚀刻试剂（370）（390）。本发明允许根据图案化的硬掩模或光致抗蚀剂（230,330）对纯Cu和Cu层进行低温，各向异性蚀刻。

13. 发明申请

WO2003081216A2 PROCESS MONITORING USING INFRARED OPTICAL DIAGNOSTICS 审中-公开
标题翻译：使用红外光学诊断进行过程监测
公开(公告)号：WO2003081216A2
公开(公告)日：2003-10-02
申请号：PCT/US2003/006710
申请日：2003-03-17
申请人： TOKYO ELECTRON LIMITED , LUDVIKSSON, Audunn
发明人： LUDVIKSSON, Audunn
IPC分类号： G01N21/35
CPC分类号： C23C14/54 , C23C16/52 , G01N21/3504 , H01J37/32972
摘要： A method and apparatus for real-time monitoring of the substrate and the gaseous process environment in a semiconductor process step is described. The method uses infrared spectroscopy for in-situ analysis of gaseous molecular species in the process region and characterization of adsorbed chemical species on a substrate. The process monitoring can be applied to endpoint- and fault detection in etching and deposition processes, in addition to chamber cleaning and chamber condition steps.
摘要翻译：描述了用于在半导体工艺步骤中实时监测衬底和气体工艺环境的方法和设备。该方法使用红外光谱法对过程区域中的气态分子物质进行原位分析并在基底上对吸附的化学物质进行表征。除了腔室清洁和腔室条件步骤之外，过程监控还可应用于蚀刻和沉积过程中的端点和故障检测。

14. 发明申请

WO2003065132A2 METHOD AND APPARATUS FOR PROCESS MONITORING AND CONTROL 审中-公开
标题翻译：过程监控与控制方法与装置
公开(公告)号：WO2003065132A2
公开(公告)日：2003-08-07
申请号：PCT/US2003/000047
申请日：2003-01-28
申请人： TOKYO ELECTRON LIMITED , LUDVIKSSON, Audunn
发明人： LUDVIKSSON, Audunn
IPC分类号： G05B
CPC分类号： H01J37/32844 , C23C14/54 , C23C14/548 , C23C16/52 , H01J37/32623 , H01J37/32935 , H01J37/32954 , H01J37/32963 , H01J37/32972 , Y02C20/30
摘要： A method and apparatus for real-time monitoring of a gaseous environment during a semiconductor process. The method utilizes metastable electronic energy transfer to excite and ionize the chamber gaseous effluent and correlates the fluorescence signals from the excited species and mass spectroscopy analysis of the ions generated with the process status. In addition to the ability to produce excited species that fluoresce, the method has the ability to generate molecular ions from labile compounds, reduce fragmentation and operate at higher pressures than conventional ionization methods.
摘要翻译：一种在半导体工艺期间实时监测气体环境的方法和装置。该方法利用亚稳态电子能量转移来激发和离子化室气态流出物，并将来自激发物质的荧光信号和与过程状态产生的离子的质谱分析相关联。除了产生荧光物质的激发物质的能力外，该方法还具有从不稳定化合物产生分子离子的能力，减少碎片化并在比常规电离方法更高的压力下操作。

15. 发明申请

WO2016003591A1 NEUTRAL BEAM ETCHING OF CU-CONTAINING LAYERS IN AN ORGANIC COMPOUND GAS ENVIRONMENT 审中-公开
标题翻译：有机化合物气体环境中含铜层的中性束蚀刻
公开(公告)号：WO2016003591A1
公开(公告)日：2016-01-07
申请号：PCT/US2015/034170
申请日：2015-06-04
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON U.S. HOLDINGS, INC.
发明人： CHEN, Lee , LUDVIKSSON, Audunn
IPC分类号： H01L21/3065
CPC分类号： H01L21/32136 , H01L21/02063 , H01L21/28562 , H01L21/32051 , H01L21/32135 , H01L21/76807 , H01L21/76814 , H01L21/76838 , H01L21/76849 , H01L21/76879 , H01L23/53238
摘要： A method and apparatus for dry etching pure Cu and Cu-containing layers for manufacturing integrated circuits. The invention uses a directional beam of O-atoms with high kinetic energy to oxidize the Cu and Cu-containing layers, and organic compound etching reagents that react with the oxidized Cu to form volatile Cu-containing etch products. The invention allows for low-temperature, anisotropic etching of pure Cu and Cu-containing layers in accordance with a patterned hard mask or photoresist.
摘要翻译：用于干蚀刻用于制造集成电路的纯Cu和Cu层的方法和装置。本发明使用具有高动能的O原子的定向光束来氧化含Cu和Cu的层，以及与氧化的Cu反应形成挥发性含Cu蚀刻产物的有机化合物蚀刻试剂。本发明允许根据图案化的硬掩模或光致抗蚀剂对纯Cu和Cu层进行低温，各向异性蚀刻。

16. 发明申请

WO2003096411A1 A METHOD FOR FORMING CONFORMAL NITRIFIED TANTALUM SILICIDE FILMS BY THERMAL CVD FOLLOWED BY NITRIDATION 审中-公开
标题翻译：通过氮化后通过热CVD形成一致的硝基硅氧烷膜的方法
公开(公告)号：WO2003096411A1
公开(公告)日：2003-11-20
申请号：PCT/US2003/012591
申请日：2003-04-24
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON ARIZONA, INC.
发明人： LUDVIKSSON, Audunn , HILLMAN, Joseph, T.
IPC分类号： H01L21/768
CPC分类号： C23C16/42 , C23C16/56 , H01L21/28518
摘要： Method for depositing a nitrified tantalum silicide barrier film on a semiconductor device including a silicon-based substrate with recessed features by low temperature thermal CVD of tantalum silicide and subsequent nitrification. The nitrified tantalum silicide barrier film exhibits high conformality and low fluorine or chlorine impurity content. A specific embodiment of the method includes depositing tantalum silicide by TCVD from the reaction of a TaF 5 or TaCl 5 precursor vapor with silane gas on a 250°C-450°C heated substrate, then exposing the tantalum silicide to a thermal NH 3 treatment or an NH 3 - or N 2 -containing plasma treatment.
摘要翻译：在包含具有凹陷特征的硅基基板的半导体器件上沉积硝化的硅化钽阻挡膜的方法，该方法通过硅化钽的低温热CVD并随后的硝化而沉积。硝化的硅化钽阻挡膜具有高的保形性和低的氟或氯杂质含量。该方法的具体实施方案包括通过TCVD从TaF5或TaCl5前体蒸气与硅烷气体在250℃-450℃的加热衬底上的反应沉积硅化钽，然后将硅化钽暴露于热NH 3处理或NH 3 - 或含N2的等离子体处理。

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