专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

WO2007054867A2 PRODUCING A COVERED THROUGH SUBSTRATE VIA USING A TEMPORARY CAP LAYER 审中-公开
标题翻译：通过使用临时盖层生产覆盖的基板
公开(公告)号：WO2007054867A2
公开(公告)日：2007-05-18
申请号：PCT/IB2006/054082
申请日：2006-11-03
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KLOOTWIJK, Johan, H. , KEMMEREN, Antonius, L., A., M. , DEKKER, Ronald , VAN GRUNSVEN, Eric, C., E. , ROOZEBOOM, Freddy
发明人： KLOOTWIJK, Johan, H. , KEMMEREN, Antonius, L., A., M. , DEKKER, Ronald , VAN GRUNSVEN, Eric, C., E. , ROOZEBOOM, Freddy
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L21/764 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to a method for producing a substrate with at least one covered via that electrically and preferably also thermally connects a first substrate side with an opposite second substrate side. The processing involves forming a trench on a the first substrate side remains and covering the trench with a permanent layer on top of a temporary, sacrificial cap-layer, which is decomposed in a thermal process step. The method of the invention provides alternative ways to remove decomposition products of the sacrificial cap-layer material without remaining traces or contamination even in the presence of the permanent layer. This is, according to a first aspect of the invention, achieved by providing the substrate trench with an overcoat layer that has holes. The holes in the overcoat layer leave room for the removal of the decomposition products of the cap-layer material. According to the second aspect of the invention, opening the covered trench from the second substrate side and allowing the cap-layer material to be removed through that opening provides a solution. Both methods of the present invention are based on the common idea of using a temporary cap-layer even in a situation where the substrate opening is permanently covered before the removal of the temporary cap-layer.
摘要翻译：本发明涉及一种制造具有至少一个覆盖通孔的基板的方法，所述至少一个覆盖通孔电连接并优选地将第一基板侧与相对的第二基板侧热连接。所述处理涉及在第一基板侧上形成沟槽，并在热处理步骤中分解的临时牺牲盖层的顶部上保留并覆盖具有永久层的沟槽。本发明的方法提供了即使在存在永久层的情况下除去牺牲帽层材料的分解产物而不留下痕迹或污染物的替代方法。根据本发明的第一方面，这是通过为基底沟槽提供具有孔的外涂层而实现的。外涂层中的孔留下去除盖层材料的分解产物的空间。根据本发明的第二方面，从第二基板侧打开被覆盖的沟槽并且允许通过该开口去除盖层材料提供了一种解决方案。本发明的两种方法都是基于即使在去除临时盖层之前基材开口被永久地覆盖的情况下使用临时盖层的常见思想。

12. 发明申请

WO2007125510A2 ELECTRIC DEVICE COMPRISING AN IMPROVED ELECTRODE 审中-公开
标题翻译：包含改进电极的电气设备
公开(公告)号：WO2007125510A2
公开(公告)日：2007-11-08
申请号：PCT/IB2007/051598
申请日：2007-04-30
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , GUIRAUD, Lionel , LE CORNEC, Francois , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H. , CHEVRIE, David, D., R.
发明人： GUIRAUD, Lionel , LE CORNEC, Francois , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H. , CHEVRIE, David, D., R.
CPC分类号： H01L27/0805 , H01L27/10817 , H01L27/10829 , H01L27/10852 , H01L27/10861 , H01L28/40 , H01L28/82 , H01L28/90 , H01L29/6609 , H01L29/66181 , H01L29/861
摘要： The invention relates to an electric device (100) including an electric element (102), the electric element comprising a first electrode (104) having a first surface (106) and a pillar (108), the pillar extending from the first surface in a first direction (110), the pillar having a length measured from the first surface parallel to the first direction, the pillar having a cross section (112) perpendicular to the first direction and the pillar having a sidewall surface (114) enclosing the pillar and extending in the first direction, characterized in that, the pillar comprises any one of a score (116) and protrusion (118) extending along at least part of the length of the pillar for giving the pillar (108) improved mechanical stability. The electrode allows electrical elements such as capacitors, energy storage devices or diodes to be made with improved properties in a cost effective way.
摘要翻译：本发明涉及一种包括电气元件（102）的电气设备（100），该电气元件包括具有第一表面（106）和柱（108）的第一电极（104），该柱从第一表面延伸第一方向（110），所述柱具有从所述第一表面平行于所述第一方向测量的长度，所述柱具有垂直于所述第一方向的横截面（112），所述柱具有封闭所述柱的侧壁表面（114）并且沿所述第一方向延伸，其特征在于，所述支柱包括沿所述柱的长度的至少一部分延伸的刻痕（116）和突出部（118）中的任何一个，以提供所述支柱（108）改善的机械稳定性。电极允许以成本有效的方式制造诸如电容器，储能装置或二极管的电气元件，具有改进的性能。

13. 发明申请

WO2006056959A1 METHOD OF MODIFYING SURFACE AREA AND ELECTRONIC DEVICE 审中-公开
标题翻译：修改表面区域和电子设备的方法
公开(公告)号：WO2006056959A1
公开(公告)日：2006-06-01
申请号：PCT/IB2005/053905
申请日：2005-11-25
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KEMMEREN, Antonius, L., A., M. , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H. , WOLTERS, Robertus, A., M.
发明人： KEMMEREN, Antonius, L., A., M. , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H. , WOLTERS, Robertus, A., M.
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L28/84 , H01L27/1087 , H01L29/66181
摘要： In the method a first layer, particularly of amorphous silicon, is deposited on the surface of a substrate with trenches. Part of this surface is covered with a protective layer. The first layer is thereafter maskless removed with a dry etching treatment on the substrate surface while it is kept within the trench.
摘要翻译：在该方法中，特别是非晶硅的第一层被沉积在具有沟槽的衬底的表面上。该表面的一部分被保护层覆盖。此后，第一层通过在衬底表面上进行干蚀刻处理而被除去，同时保持在沟槽内。

14. 发明申请

WO2004047181A1 RADIATION-EMITTING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：辐射发射半导体器件及其制造方法
公开(公告)号：WO2004047181A1
公开(公告)日：2004-06-03
申请号：PCT/IB2003/004810
申请日：2003-10-28
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , KLOOTWIJK, Johan, H. , SLOTBOOM, Jan, W.
发明人： KLOOTWIJK, Johan, H. , SLOTBOOM, Jan, W.
IPC分类号： H01L29/73
CPC分类号： H01L29/7313 , H01L33/0004
摘要： The invention relates to a radiation-emitting semiconductor device (10) with a semiconductor body (1) and a substrate (2), wherein the semiconductor body (1) comprises a vertical bipolar transistor with an emitter region (3), a base region (4) and a collector region (5), which regions are each provided with a connection region (6, 7, 8), and the border between the base region (4) and the collector region (5) forms a pn-junction and, in operation, at a reverse bias of the pn-junction or at a sufficiently large collector current, avalanche multiplication of charge carriers occurs whereby radiation is generated in the collector region (5). According to the invention, the collector region (5) has a thickness through which transmission of the generated radiation occurs, and the collector region (5) borders on a free surface of the semiconductor body (1). In this way, less of the generated radiation is lost by absorption and the radiation generated is more readily available to serve as an optical signal for, for example, another part of the device (10) or for another device (10). A second sub-region (5B) in the collector region (5) may be made for example with the aid of a gate electrode (11) with which a conducting channel can be induced in the semiconductor body (1). Preferably, a radiation conductor (14) is present on the surface of the latter. The invention further comprises a method of manufacturing a device (10) according to the invention.
摘要翻译：本发明涉及具有半导体本体（1）和衬底（2）的辐射发射半导体器件（10），其中半导体本体（1）包括具有发射极区（3）的垂直双极晶体管，基极区（4）和集电极区域（5），这些区域各自设置有连接区域（6,7,8），并且基极区域（4）和集电极区域（5）之间的边界形成pn结并且在操作中，在pn结的反向偏压或集电极电流充足的情况下，发生电荷载流子的雪崩倍增，从而在集电极区域（5）中产生辐射。根据本发明，集电区（5）具有产生辐射的透射的厚度，并且集电区（5）与半导体本体（1）的自由表面接合。以这种方式，所产生的辐射的少量通过吸收而损失，并且所产生的辐射更容易用作用作例如装置（10）的另一部分或另一装置（10）的光信号。集电极区域（5）中的第二子区域（5B）可以例如借助于在半导体本体（1）中可以被引导导电沟道的栅电极（11）制成。优选地，辐射导体（14）存在于其上的辐射导体（14）的表面上。本发明还包括一种制造根据本发明的装置（10）的方法。

15. 发明申请

WO2007141722A1 CHARGE PUMP DC-DC CONVERTER COMPRISING SOLID STATE BATTERIES 审中-公开
标题翻译：充电泵DC-DC转换器包含固态电池
公开(公告)号：WO2007141722A1
公开(公告)日：2007-12-13
申请号：PCT/IB2007/052072
申请日：2007-06-01
申请人： NXP B.V. , REEFMAN, Derk , ROOZEBOOM, Freddy , NOTTEN, Petrus, H., L. , KLOOTWIJK, Johan, H.
发明人： REEFMAN, Derk , ROOZEBOOM, Freddy , NOTTEN, Petrus, H., L. , KLOOTWIJK, Johan, H.
IPC分类号： H02M3/07 , H01M6/40
CPC分类号： H02M3/073 , H01M10/0436 , H01M10/0525 , H01M10/0562 , H01M10/425
摘要： An electronic device is provided which comprises a DC-DC converter. The DC-DC converter comprises at least one solid-state rechargeable battery (B1, B2) for storing energy for the DC-DC conversion and an output capacitor (C2).
摘要翻译：提供一种包括DC-DC转换器的电子设备。 DC-DC转换器包括用于存储用于DC-DC转换的能量的至少一个固态可再充电电池（B1，B2）和输出电容器（C2）。

16. 发明申请

WO2008139392A2 DC-TO-DC CONVERTER COMPRISING A RECONFIGURABLE CAPACITOR UNIT 审中-公开
标题翻译：包含可重构电容单元的DC-DC转换器
公开(公告)号：WO2008139392A2
公开(公告)日：2008-11-20
申请号：PCT/IB2008/051823
申请日：2008-05-08
申请人： NXP B.V. , KLOOTWIJK, Johan, H. , BERGVELD, Hendrik, J. , ROOZEBOOM, Freddy , REEFMAN, Derk , RUIGROK, Jaap
发明人： KLOOTWIJK, Johan, H. , BERGVELD, Hendrik, J. , ROOZEBOOM, Freddy , REEFMAN, Derk , RUIGROK, Jaap
IPC分类号： H02M3/07
CPC分类号： H01L27/0805 , H02M3/07
摘要： The present invention relates to a configurable trench multi-capacitor device comprising a trench in a semiconductor substrate. The trench has a lateral extension exceeding 10 micrometer and a trench filling includes a number of at least four electrically conductive capacitor-electrode layers. A switching unit is provided that comprises a plurality of switching elements electrically interconnected between different capacitor-electrode layers of the trench filling. A control unit is connected with the switching unit and configured to generate and provide to the switching unit respective control signals for forming a respective one of a plurality of multi-capacitor configurations using the capacitor-electrode layers of the trench filling.
摘要翻译：本发明涉及一种包括半导体衬底中的沟槽的可配置沟槽多电容器器件。沟槽的横向延伸超过10微米，沟槽填充物包括多个至少四个导电电容器电极层。提供一种开关单元，其包括在沟槽填充物的不同电容器 - 电极层之间电连接的多个开关元件。控制单元与开关单元连接，并且被配置为使用沟槽填充的电容器电极层，生成并向开关单元提供各自的控制信号，以形成多个多电容器配置中的相应一个。

17. 发明申请

WO2008139393A1 INTEGRATION SUBSTRATE WITH A ULTRA-HIGH-DENSITY CAPACITOR AND A THROUGH-SUBSTRATE VIA 审中-公开
标题翻译：具有超高密度电容器和通过基板的集成基板通过
公开(公告)号：WO2008139393A1
公开(公告)日：2008-11-20
申请号：PCT/IB2008/051824
申请日：2008-05-08
申请人： NXP B.V. , KLOOTWIJK, Johan, H. , ROOZEBOOM, Freddy , RUIGROK, Jaap , REEFMAN, Derk
发明人： KLOOTWIJK, Johan, H. , ROOZEBOOM, Freddy , RUIGROK, Jaap , REEFMAN, Derk
IPC分类号： H01L23/498 , H01L27/08
CPC分类号： H01L27/0805 , H01L23/481 , H01L28/90 , H01L2224/73204
摘要： An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least four electrically conductive capacitor-electrode layers in an alternating arrangement with dielectric layers. - The capacitor-electrode layers are alternatingly connected to a respective one of two capacitor terminals provided on the first or second substrate side. The trench capacitor and the through-substrate via are formed in respective trench openings and via openings in the semiconductor substrate, which have an equal lateral extension exceeding 10 micrometer. This structure allows, among other advantages, a particularly cost-effective fabrication of the integration substrate because the via openings and the trench openings in the substrate can be fabricated simultaneously.
摘要翻译：用于封装系统的集成衬底包括贯穿衬底通孔和沟槽电容器，其中沟槽填充物包括与电介质层交替布置的至少四个导电电容器电极层。 - 电容器电极层交替地连接到设置在第一或第二基板侧上的两个电容器端子中的相应一个。沟槽电容器和通孔基板通孔形成在半导体衬底中的相应的沟槽开口和通孔中，其具有超过10微米的相等的横向延伸。除了其它优点之外，这种结构允许一体化衬底的特别成本有效的制造，因为可以同时制造衬底中的通孔开口和沟槽开口。

18. 发明申请

WO2009133500A1 METHOD OF FORMING A NANOCLUSTER-COMPRISING DIELECTRIC LAYER AND DEVICE COMPRISING SUCH A LAYER 审中-公开
标题翻译：形成包含电介质层的纳米聚合物的方法和包含这种层的器件
公开(公告)号：WO2009133500A1
公开(公告)日：2009-11-05
申请号：PCT/IB2009/051656
申请日：2009-04-22
申请人： NXP B.V. , KOCHUPURACKAL, Jinesh,, B., P. , BESLING, Wim , KLOOTWIJK, Johan, H. , WOLTERS, Robertus, A., M. , ROOZEBOOM, Freddy
发明人： KOCHUPURACKAL, Jinesh,, B., P. , BESLING, Wim , KLOOTWIJK, Johan, H. , WOLTERS, Robertus, A., M. , ROOZEBOOM, Freddy
IPC分类号： H01L21/28 , C23C14/08 , C23C16/40 , H01L21/314 , H01L29/423 , H01L29/51
CPC分类号： H01L29/792 , B82Y10/00 , C23C16/30 , C23C16/45531 , H01L21/28273 , H01L21/28282 , H01L21/3141 , H01L29/42332 , H01L29/7883
摘要： A method of forming a dielectric layer (330) on a further layer (114, 320) of a semiconductor device (300) is disclosed. The method comprises depositing a dielectric precursor compound and a further precursor compound over the further layer (114, 320), the dielectric precursor compound comprising a metal ion from the group consisting of Yttrium and the Lanthanide series elements, and the further precursor compound comprising a metal ion from the group consisting of group IV and group V metals; and chemically converting the dielectric precursor compound and the further precursor compound into a dielectric compound and a further compound respectively, the further compound self-assembling during said conversion into a plurality of nanocluster nuclei (335) within the dielectric layer (330) formed from the first dielectric precursor compound. The nanoclusters may be dielectric or metallicinnature. Consequently, a dielectric layer is formed that has excellent charge trapping capabilities. Such a dielectric layer is particularly suitable for use in semiconductor devices such as non-volatile memories.
摘要翻译：公开了一种在半导体器件（300）的另一层（114,320）上形成介电层（330）的方法。该方法包括在另一层（114,320）上沉积电介质前体化合物和另外的前体化合物，所述电介质前体化合物包含由钇和镧系元素组成的组中的金属离子，并且所述另外的前体化合物包含由IV族和V族金属组成的组中的金属离子; 以及分别将所述电介质前体化合物和所述另外的前体化合物化学转化为电介质化合物和另外的化合物，所述另外的化合物在所述转化成由所述介电层（330）形成的所述介电层（330）内的多个纳米团簇核（335）中自组装第一电介质前体化合物。纳米团簇可以是电介质或金属材料。因此，形成具有优异的电荷俘获能力的电介质层。这种电介质层特别适用于诸如非易失性存储器的半导体器件。

19. 发明申请

WO2007132423A2 ASSEMBLY, CHIP AND METHOD OF OPERATING 审中-公开
标题翻译：组装，芯片和操作方法
公开(公告)号：WO2007132423A2
公开(公告)日：2007-11-22
申请号：PCT/IB2007/051821
申请日：2007-05-14
申请人： NXP B.V. , REEFMAN, Derk , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H.
发明人： REEFMAN, Derk , ROOZEBOOM, Freddy , KLOOTWIJK, Johan, H.
IPC分类号： H01L25/16 , H01L23/552 , H01L23/538
CPC分类号： H01L27/0805 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L23/49575 , H01L23/5223 , H01L23/5227 , H01L23/642 , H01L23/645 , H01L25/16 , H01L2224/05571 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/01087 , H01L2924/1461 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00014
摘要： The chip (100) comprises a network of trench capacitors (102) and an inductor (114), wherein the trench capacitors (102) are coupled in parallel with a pattern of interconnects (113A,B,..) that is designed so as to limit generation of eddy current induced by the inductor (114) in the interconnects (113A,B,..). This allows the use of the chip (100) as a portion of a DC-DC converter, that is integrated in an assembly of a first chip and this - second chip (100). The inductor of this integrated DC-DC converter may be defined elsewhere within the assembly.
摘要翻译：芯片（100）包括沟槽电容器（102）和电感器（114）的网络，其中沟槽电容器（102）与互连图案（113A，B，...）并联耦合，该图案被设计为以限制由互连（113A，B，...）中的电感器（114）感应的涡流的产生。这允许使用芯片（100）作为DC-DC转换器的一部分，其集成在第一芯片和该第二芯片（100）的组件中。该集成DC-DC转换器的电感器可以在组件内的其他地方定义。

20. 发明申请

WO2003015177A1 BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURING SAME 审中-公开
标题翻译：双极晶体管及其制造方法
公开(公告)号：WO2003015177A1
公开(公告)日：2003-02-20
申请号：PCT/IB2002/002680
申请日：2002-06-27
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人： HUIZING, Hendrik, G., A. , SLOTBOOM, Jan, W. , LYUBOSHENKO, Igor , KLOOTWIJK, Johan, H. , VAN RIJS, Freerk , MELAI, Joost
IPC分类号： H01L29/737
CPC分类号： H01L29/7378 , H01L29/0821 , H01L29/7371
摘要： The bipolar transistor comprises a collector region (1) of a semiconductor material with a first doping type, an emitter region (2) with a first doping type, and a base region (3) of a semiconductor material with a second doping type, opposite to the first doping type, which base region is arranged between the emitter region (2) and the collector region (1), and a semiconductor area (4) extending between the collector region (1) and the base region (3). The collector region (1) is doped such that the semiconductor area (4) is fully depleted and the magnitude of the intrinsic electric field in the semiconductor area (4) is at least substantially independent of the applied doping types and the doping concentration in the semiconductor area (4). The method of manufacturing the bipolar transistor comprises the step of epitaxially growing a semiconductor layer (6) over a collector region (1) and doping the epitaxial layer (6) in situ, after which the base region (3) is deposited epitaxially. The comparatively thin semiconductor area (4) between the base region (3) and the collector region (1) allows ultrafast bipolar transistors with a high cutoff frequency and an improved breakdown voltage to be manufactured. The product of the cutoff frequency and the collector-emitter breakdown voltage of these bipolar transistors exceeds the Johnson limit.
摘要翻译：双极晶体管包括具有第一掺杂类型的半导体材料的集电极区域（1），具有第一掺杂类型的发射极区域（2）和具有第二掺杂类型的半导体材料的基极区域（3）到第一掺杂类型，该基极区域布置在发射极区域（2）和集电极区域（1）之间，以及在集电极区域（1）和基极区域（3）之间延伸的半导体区域（4）。掺杂集电极区域（1）使得半导体区域（4）完全耗尽并且半导体区域（4）中的本征电场的大小至少基本上与施加的掺杂类型和掺杂浓度半导体区域（4）。制造双极晶体管的方法包括在集电极区域（1）上外延生长半导体层（6）并原位掺杂外延层（6）的步骤，然后外延地沉积基极区域（3）。在基极区域（3）和集电极区域（1）之间的较薄的半导体区域（4）允许制造具有高截止频率和改善的击穿电压的超快双极型晶体管。这些双极晶体管的截止频率和集电极 - 发射极击穿电压的乘积超过约翰逊限制。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式