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1. 发明申请

US20040265686A1 Electronic equipment and method for extracting battery or electric component thereof 审中-公开
标题翻译：用于提取电池或其电气部件的电子设备和方法
公开(公告)号：US20040265686A1
公开(公告)日：2004-12-30
申请号：US10871250
申请日：2004-06-18
发明人： Seiya Amatatsu , Nobutatsu Takahashi
IPC分类号： H01M002/10 , H05K001/11 , H05K001/14
CPC分类号： H01M2/1044 , H05K1/147
摘要： Electronic equipment and a method for extracting a battery from the electronic equipment, in which when the electronic equipment is to be disposed of, the battery can be easily pulled out of an opening having a small area. A battery is set through a strip-shaped elastic connecting member made of a flexible printed circuit between the battery and the main board; the battery is joined and placed with a lid that closes an opening; and when the battery is to be disposed of, the lid is opened, the battery is pulled out of casing, and the strip-shaped elastic connecting member is tugged so as to be cut, so that the main board and the battery are separated.
摘要翻译：电子设备和从电子设备中提取电池的方法，其中当要放置电子设备时，电池可以容易地从具有小面积的开口中拉出。电池通过由电池和主板之间的柔性印刷电路制成的带状弹性连接件设置; 电池连接并放置有封闭开口的盖子; 并且在要放电的情况下，打开盖子，将电池从外壳拉出，将该带状的弹性连接部件拉拔以进行切断，使主板和电池分离。

2. 发明申请

US20040262040A1 Printed-wiring board and electronic device 失效
标题翻译：印刷电路板和电子设备
公开(公告)号：US20040262040A1
公开(公告)日：2004-12-30
申请号：US10894456
申请日：2004-07-16
发明人： Naomi Ishizuka , Eiichi Kono
IPC分类号： H05K001/11
CPC分类号： H05K1/116 , H05K3/3447 , H05K3/3463 , H05K3/429 , H05K2201/09454 , H05K2201/09781
摘要： The present invention provides a board ensuring no peel-off of a wall and a land, even if a part is soldered to the board with lead-free solder. The board 10 is comprised of N (Nnull3) layer patterns electrically insulated from one another, and is formed with a through-hole 14 into which an electrode 19 of an electronic part 18 is to be inserted. An external land 15 is formed on a surface of each of the first and N-th layer patterns. An electrically conductive layer 17 is formed on an inner wall of the through-hole 14 such that the electrically conductive layer is electrically connected to the external land 15 of each of the first and N-th layer patterns. The electronic part 18 is fixed in the through-hole 14 with lead-free solder 20 filled in the through-hole 14. At least one internal land 16 extending from the electrically conductive layer 17 is formed in the same layer as a M-th layer pattern (2nullMnull(N-1)). The internal land 16 is not electrically connected to the M-th layer pattern.
摘要翻译：本发明提供一种确保墙壁和焊盘不会剥离的板，即使用无铅焊料将部件焊接到板上也是如此。板10由彼此电绝缘的N（N> = 3）层图案组成，并且形成有通孔14，电子部件18的电极19将被插入到该通孔14中。在第一和第N层图案中的每一个的表面上形成外部平台15。导电层17形成在通孔14的内壁上，使得导电层电连接到第一和第N层图案中的每一个的外部焊盘15。电子部件18通过填充在通孔14中的无铅焊料20固定在通孔14中。从导电层17延伸的至少一个内部区域16形成为与第M个相同的层层图案（2 <= M＆LE;（N-1））。内部平台16不与M层图案电连接。

3. 发明申请

US20040262034A1 Printed board and electronic apparatus 失效
标题翻译：印刷电路板和电子设备
公开(公告)号：US20040262034A1
公开(公告)日：2004-12-30
申请号：US10878058
申请日：2004-06-29
申请人： TOHOKU PIONEER CORPORATION
发明人： Masato Togashi
IPC分类号： H05K001/11
CPC分类号： H05K3/28 , H01L27/32 , H05K3/0094 , H05K2201/0195
摘要： A printed board includes an electrically insulating board, a conductor layer made of an electrically conducting pattern, and at least one of a resist layer and an ink layer, each made of an electrically insulating solid pattern. The electrically insulating board has one surface on which electronic parts will be mounted, and the other surface on which the conductor layer is formed and covered with at least one of the resist layer and the ink layer. An organic EL display device includes the printed board, and a housing having a planar structure. The surface on which the conductor layer of the printed board is covered with at least one of the resist layer and the ink layer, each made of the electronically insulating solid pattern is arranged so as to face a planar portion of the housing having the planar structure.
摘要翻译：印刷电路板包括电绝缘板，由导电图案制成的导体层，以及由电绝缘固体图形构成的抗蚀剂层和油墨层中的至少一个。电绝缘板具有一个表面，电子部件将安装在该表面上，另一个表面上形成有导体层，并且覆盖有抗蚀剂层和油墨层中的至少一个。有机EL显示装置包括印刷电路板和具有平面结构的壳体。印刷电路板的导体层被至少一层抗电层和油墨层覆盖的表面均由电绝缘性固体图形构成，以面对具有平面结构的壳体的平面部分。

4. 发明申请

US20040238214A1 [SUBSTRATE AND PROCESS FOR FABRICATING THE SAME] 有权
标题翻译： [用于制造它的基板和工艺]
公开(公告)号：US20040238214A1
公开(公告)日：2004-12-02
申请号：US10707015
申请日：2003-11-14
发明人： Po-Chih Liu
IPC分类号： H05K001/11 , H05K003/46
CPC分类号： H01L21/4857 , H01L21/4853 , H05K3/108 , H05K3/243 , H05K3/28 , H05K3/421 , H05K3/4602 , H05K2201/09481 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2203/054 , H05K2203/1461 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A substrate comprises at least a semi-finished substrate, a circuit line, a contact and a solder mask layer. The circuit line and the contact are formed on the semi-finished substrate. The circuit line and the contact are connected together non-integrally. The solder mask layer is formed over the semi-finished substrate to cover the circuit line. The solder mask layer has an opening in which the contact is formed.
摘要翻译：基板至少包括半成品基板，电路线，接触件和焊接掩模层。在半成品基板上形成电路线和触点。电路线和触点非整体连接在一起。焊接掩模层形成在半成品衬底上以覆盖电路线。焊接掩模层具有形成接触的开口。

5. 发明申请

US20040231884A1 Circuit board assembly employing solder vent hole 失效
标题翻译：电路板组件采用焊剂通气孔
公开(公告)号：US20040231884A1
公开(公告)日：2004-11-25
申请号：US10849478
申请日：2004-05-19
发明人： Kenneth Daryl Wong , Sean L. Bell
IPC分类号： H05K007/20 , H05K001/11
CPC分类号： H05K3/44 , H05K3/0061 , H05K3/341 , H05K2201/09063 , H05K2201/09554 , H05K2201/10666 , H05K2203/1178 , Y02P70/613 , Y10T29/49126 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165
摘要： A printed circuit board assembly employing a solder vent hole adjacent solder filled interconnect vias connecting to a conductive pallet, is disclosed. The solder vent hole allows gases to escape from an otherwise sealed cavity during solder reflow, relieving positive pressure and thereby allowing solder to flow into it. By providing an escape path for trapped air and gases generated during solder paste reflow, the out-gassing pressure and weight of the molten solder is sufficient to allow the solder paste to flow into the cavity.
摘要翻译：公开了一种印刷电路板组件，其采用与连接到导电托盘的焊料填充的互连通孔相邻的焊剂通气孔。焊锡通气孔允许气体在回流焊接过程中从另一个密封的空腔中逸出，减轻正压，从而允许焊料流入其中。通过为焊膏回流期间产生的被捕获的空气和气体提供逃生路径，熔融焊料的排气压力和重量足以使焊膏流入空腔。

6. 发明申请

US20040226745A1 Electroplating solution, method for manufacturing multilayer printed circuit board using the same solution, and multilayer printed circuit board 有权
标题翻译：电镀液，使用相同溶液的多层印刷电路板的制造方法以及多层印刷电路板
公开(公告)号：US20040226745A1
公开(公告)日：2004-11-18
申请号：US10864400
申请日：2004-06-10
申请人： IBIDEN CO., LTD.
发明人： Honchin En
IPC分类号： H05K001/11
CPC分类号： H05K3/423 , C25D3/38 , H05K1/113 , H05K3/108 , H05K3/3457 , H05K3/388 , H05K3/4602 , H05K3/4661 , H05K2201/09563 , Y10T29/49155
摘要： The objective of present invention is to provide an electroplating solution capable of forming the upper face of a via-hole and the upper face of a conductor circuit in the same layer in approximately the same plane at the time of manufacturing a multilayer printed circuit board. The electroplating solution of the present invention is characterized by containing 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a levelling agent and a brightener.
摘要翻译：本发明的目的是提供一种电镀溶液，其能够在制造多层印刷电路板时在大致相同的平面上形成通孔的上表面和导体电路的上表面在同一层中。本发明的电镀液的特征在于，含有硫酸铜50〜300g / L，硫酸30〜200g / L，氯离子25〜90mg / L，氯离子1〜1000mg / L 添加剂至少包含流平剂和增白剂。

7. 发明申请

US20040222015A1 PRINTED CIRCUIT BOARD MANUFACTURING METHOD AND PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板制造方法和印刷电路板
公开(公告)号：US20040222015A1
公开(公告)日：2004-11-11
申请号：US10709752
申请日：2004-05-26
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Kohichi Ohsumi , Kenji Terada , Kohichi Yamazaki
IPC分类号： H05K001/11 , H05K003/40 , H05K003/42
CPC分类号： H05K3/427 , H05K3/064 , H05K3/108 , H05K3/4602 , H05K2201/0959 , H05K2203/1394 , Y10T29/49155 , Y10T29/49165
摘要： The present invention provides a method of manufacturing printed a circuit board capable of formation of via holes having a low aspect ratio and formation of fine lines, and a printed circuit board manufactured by the method. The method of manufacturing a printed circuit board 10 according to the present invention includes a step of selectively forming a plating layer 16 for lands 22a and 22b on a metal foil 14 on the printed circuit board 10, a step of adjusting the thickness of the plating layer 16, and a step of forming the metal foil 14 into lines 14a. The aspect ratio of via holes 28 formed on lands 22a and 22b can be adjusted by adjusting the thickness of the lands 22a and 22b.
摘要翻译：本发明提供一种制造能够形成具有低纵横比的通孔和形成细线的印刷电路板的方法，以及通过该方法制造的印刷电路板。根据本发明的制造印刷电路板10的方法包括在印刷电路板10上的金属箔14上选择性地形成用于焊盘22a和22b的镀层16的步骤，调整镀层厚度的步骤层16，以及将金属箔14形成为管线14a的步骤。可以通过调节焊盘22a和22b的厚度来调节形成在焊盘22a和22b上的通孔28的纵横比。

8. 发明申请

US20040211594A1 Vertical routing structure 审中-公开
标题翻译：垂直路由结构
公开(公告)号：US20040211594A1
公开(公告)日：2004-10-28
申请号：US10737412
申请日：2003-12-15
发明人： Kwun-Yao Ho , Moriss Kung
IPC分类号： H05K001/11 , H05K003/42
CPC分类号： H01L23/49827 , H01L23/49816 , H01L23/49822 , H01L2924/0002 , H01L2924/15311 , H05K3/3436 , H05K3/3468 , H05K3/4007 , H05K3/4069 , H05K3/429 , H05K2201/0367 , H05K2201/09572 , H05K2201/0959 , H05K2201/09845 , H05K2201/10666 , Y02P70/613 , Y10T29/49165 , H01L2924/00
摘要： A vertical routing structure for a multi-layered substrate having a lamination structure therein. The lamination structure has at least a through hole that links up both surfaces of the lamination structure. The vertical routing structure comprises a conductive rod and a conductive layer. The conductive rod is formed inside the through-hole with the ends protruding above the respective upper and lower surface of the lamination structure. The conductive layer is positioned in the space between the interior sidewall of the through-hole and the conductive rod. The vertical routing structure on the substrate is able to reduce the area for laying the required circuits or increase the wiring density in a given area.
摘要翻译：一种用于其中具有层压结构的多层基板的垂直布线结构。层压结构至少具有连接层压结构的两个表面的通孔。垂直布线结构包括导电棒和导电层。导电杆形成在通孔的内部，端部突出在层叠结构的相应的上表面和下表面的上方。导电层位于通孔的内侧壁与导电棒之间的空间中。基板上的垂直布线结构能够减少放置所需电路的面积或增加给定区域中的布线密度。

9. 发明申请

US20040211589A1 High conducting thin-film nanoprobe card and its fabrication method 有权
标题翻译：高导电薄膜纳米探针卡及其制作方法
公开(公告)号：US20040211589A1
公开(公告)日：2004-10-28
申请号：US10455447
申请日：2003-06-06
申请人： INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
发明人： Min-Chieh Chou , Ya-Ju Huang , Horng-Chieh Wang
IPC分类号： H05K003/00 , H05K001/11
CPC分类号： B82Y10/00 , G01R1/0735 , G01R3/00 , H05K3/4007 , Y10S977/953 , Y10T29/49147 , Y10T29/49176
摘要： A conducting thin-film nanoprobe card fabrication method includes the steps of: (a) arranging nanotubes on a substrate in vertical; (b) covering the nanotubes with a liquid polymeric resin and then hardening the polymeric resin to form a conducting nanomembrane; (c) removing a part of the polymeric resin from the conducting nanomembrane to expose one end of each nanotube to outside; (d) removing the substrate and preparing a ceramic substrate having contacts at one side and metal bumps at the other side and plated through holes electrically respectively connected with the contacts and the metal bumps; (e) mounting the nanomembrane on the ceramic substrate to hold the nanotubes in contact with the contacts of the ceramic substrate, and (f) forming recessed holes in the nanomembrane by etching and inserting a metal rod in each recessed hole to form a respective probe.
摘要翻译：导电薄膜纳米探针卡制造方法包括以下步骤：（a）在垂直于基底上布置纳米管; （b）用液体聚合物树脂覆盖纳米管，然后硬化聚合树脂以形成导电纳米膜; （c）从导电纳米膜中去除一部分聚合物树脂以将每个纳米管的一端暴露于外部; （d）去除衬底并制备在一侧具有接触的陶瓷衬底和另一侧的金属凸块，并且电镀通孔，电孔分别与触点和金属凸块连接; （e）将纳米膜安装在陶瓷基片上以使纳米管保持与陶瓷基片的触点接触，（f）通过在每个凹孔中蚀刻并插入金属棒形成相应的探头，在纳米膜中形成凹陷孔。

10. 发明申请

US20040182603A1 [INNER LAYER STRUCTURE OF A CIRCUIT BOARD] 审中-公开
标题翻译： [电路板内层结构]
公开(公告)号：US20040182603A1
公开(公告)日：2004-09-23
申请号：US10604474
申请日：2003-07-24
发明人： Tz-Jang Tseng , Tsung-Chin Chiu
IPC分类号： H05K001/11
CPC分类号： H05K3/462 , H05K2201/09536 , H05K2201/0959 , H05K2201/096
摘要： The present invention provides an inner layer structure of a circuit board. The inner layer structure of the present invention uses column-shaped or conned-shaped bumps to replace the conventional PTH process, and uses the bumps as media to electrically connect two adjacent patterned conducting layers. Hence, inner layer structure of the present invention can effectively simplify the layout design and the fabrication complexity, and increase the layout density of the circuit board.
摘要翻译：本发明提供电路板的内层结构。本发明的内层结构使用柱状或连接形状的凸块代替传统的PTH工艺，并且使用凸块作为介质来电连接两个相邻的图案化导电层。因此，本发明的内层结构可以有效地简化布局设计和制造复杂性，并且增加电路板的布局密度。

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