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1. 发明申请

US20040228396A1 Modular, jitter-tolerant data acquisition and processing systems 失效
标题翻译：模块化，抖动容忍的数据采集和处理系统
公开(公告)号：US20040228396A1
公开(公告)日：2004-11-18
申请号：US10437320
申请日：2003-05-13
发明人： Reed Glenn Wood JR.
IPC分类号： H04B001/38 , H04L005/16
CPC分类号： H04L7/0079
摘要： Modular, jitter-tolerant, data acquisition and processing systems are disclosed. An exemplary embodiment comprises a receiving portion having a first module configured to receive a serial bit stream and recover a serial data stream and a first clocking signal from the serial bit stream. The receiving portion also comprises a second module configured to receive the serial data stream and the first clocking signal and generate a parallel data stream and a second clocking signal.
摘要翻译：公开了模块化，抖动容忍的数据采集和处理系统。一个示例性实施例包括具有第一模块的接收部分，其被配置为从串行比特流接收串行比特流并恢复串行数据流和第一时钟信号。接收部分还包括被配置为接收串行数据流和第一时钟信号并产生并行数据流和第二时钟信号的第二模块。

2. 发明申请

US20040213336A1 Micro-modem 审中-公开
标题翻译：微调制解调器
公开(公告)号：US20040213336A1
公开(公告)日：2004-10-28
申请号：US10270433
申请日：2002-10-15
发明人： Daljit S. Jandu
IPC分类号： H04B001/38 , H04L005/16
CPC分类号： H04L27/2602
摘要： The patent application for this special modem has it's root in Reimann Hypothesis, Prime Number Theorem, The Birch and Swinnerton-Dyer Conjecture, Hodge Conjecture, Ramanujan Conjecture as well as P-NP problem. These are well known conjectures/problems in the mathematics and there is 1 million prize on each by Clay Mathematics Institute (www.claymath.org). The insights are possible only when solving these or related conjectures The wave generation in any amplifier input/output and it's optimization is the result of pull-push characteristics which felicitates the non-Euclidian approach of solving the data communication and networking problems. The electronic components e.g. XOR gates etc. are used for digitization of the wave, if required.
摘要翻译：这个专用调制解调器的专利申请源于Reimann假设，Prime Number定理，Birch和Swinnerton-Dyer猜想，Hodge猜想，Ramanujan猜想以及P-NP问题。这些是众所周知的数学猜想/数学问题，每年由Clay Mathematics Institute（www.claymath.org）获得100万奖。只有在解决这些或相关猜想时，只有在解决这些或相关猜测时，才能看到这些见解。任何放大器输入/输出中的波形生成及其优化都是推动非欧几里德解决数据通信和网络问题的推挽特性的结果。电子部件例如如果需要，XOR门等用于数字化波。

3. 发明申请

US20040202241A1 Smart DSL systems for LDSL 审中-公开
标题翻译：用于LDSL的智能DSL系统
公开(公告)号：US20040202241A1
公开(公告)日：2004-10-14
申请号：US10714867
申请日：2003-11-18
申请人： Globespan Virata Incorporated
发明人： Patrick Duvaut , Lujing Cai , Massimo Sorbara
IPC分类号： H04B001/38 , H04L005/16
CPC分类号： H04L12/2854
摘要： A nullSmart DSL Systemnull for addressing the performance objectives of LDSL and examples of smart systems for LDSL are disclosed. In accordance with embodiments of the invention, there is disclosed a method for implementing smart DSL for LDSL systems. Embodiments of the method may comprise presenting a number of spectral masks that are available on the LDSL system, and selecting from the number of spectral masks an upstream mask and a downstream mask wherein the upstream mask and the downstream mask exhibit complimentary features.
摘要翻译：公布了用于解决LDSL性能目标的“智能DSL系统”和LDSL智能系统的示例。根据本发明的实施例，公开了一种用于实现LDSL系统的智能DSL的方法。该方法的实施例可以包括呈现在LDSL系统上可用的多个频谱掩模，以及从频谱掩模的数量中选择上游掩模和下游掩模，其中上游掩码和下游掩模表现出互补特征。

4. 发明申请

US20040161024A1 Direct digital access arrangement circuitry and method for connecting to phone lines 失效
标题翻译：用于连接到电话线的直接数字接入安排电路和方法
公开(公告)号：US20040161024A1
公开(公告)日：2004-08-19
申请号：US10780219
申请日：2004-02-17
申请人： Silicon Laboratories, Inc.
发明人： Jeffrey W. Scott , Navdeep S. Sooch , David R. Welland
IPC分类号： H04M011/00 , H04L005/16 , H04B015/00
CPC分类号： H04M1/573 , H04L7/033 , H04L25/0266 , H04L25/06 , H04M1/76 , H04M3/007 , H04M11/06 , H04M19/001 , H04M19/02
摘要： An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.
摘要翻译：提供了一种适用于电话，医疗仪器，工业过程控制和其他应用的隔离系统。本发明的优选实施例包括电容隔离屏障，通过数字信号传送数字信号。该系统提供跨越隔离屏障的通信手段，其高度免疫幅度和相位噪声干扰。可以在隔离屏障的一侧采用时钟恢复电路，从跨屏障通信的数字信号提取定时信息，并且滤除在屏障处引入的相位噪声的影响。 Δ-Σ转换器可以设置在隔离屏障的两侧以在模拟和数字域之间转换信号。隔离电源也可以设置在屏障的隔离侧上，由此响应于穿过隔离屏障接收的数字数据产生直流电流。最后，提供双向隔离系统，由此使用单对隔离电容器实现数字信号的双向通信。在优选实施例中，跨屏障通信的数字数据由与其他数字控制，信令和成帧信息在时间上多路复用的数字delta-sigma数据信号组成。

5. 发明申请

US20040136449A1 Method and apparatus for increasing soft modem capacity 失效
标题翻译：增加软调制解调器容量的方法和装置
公开(公告)号：US20040136449A1
公开(公告)日：2004-07-15
申请号：US10746606
申请日：2003-12-23
发明人： Robert David Wachel
IPC分类号： H04L005/16
CPC分类号： H04L12/66
摘要： A method and apparatus for reducing processing requirements of a pool of soft modems is disclosed. In one embodiment, the method comprises queuing one or more retrain requests and responding to the queued retrain requests within a period of time to one or more modems that correspond to the queued retrain requests.
摘要翻译：公开了一种用于减少软调制解调器池的处理要求的方法和装置。在一个实施例中，该方法包括将一个或多个重新训练请求排队并在一段时间内对与排队的重新训练请求相对应的一个或多个调制解调器对排队的重新训练请求进行响应。

6. 发明申请

US20040136447A1 Echo cancellation for a packet voice system 有权
标题翻译：分组语音系统的回波消除
公开(公告)号：US20040136447A1
公开(公告)日：2004-07-15
申请号：US10736349
申请日：2003-12-15
发明人： Wilfrid LeBlanc
IPC分类号： H04B001/38 , H04L005/16 , H04M009/08
CPC分类号： H04M11/062 , G10L19/0208 , G10L19/24 , H04L5/06 , H04L47/32 , H04L49/90
摘要： An apparatus and methods supporting improved echo cancellation in a packet network is disclosed. An embodiment of the present invention may permit a split-band communication system operating in a narrowband mode to provide improved suppression of hybrid echo generated by the conversion of signals from a packet network to a two-wire analog circuit. By detecting the presence of signal characteristics outside of the relatively narrower bandwidth to be communicated, such an embodiment may more accurately detect the occurrence of speech received from a party on a relatively wider bandwidth communication circuit. The accurate detection of speech permits more effective suppression of any hybrid echo remaining after echo cancellation. An embodiment of the present invention may also have application in other systems that detect signals received via a path having a bandwidth greater than that to be transmitted.
摘要翻译：公开了一种在分组网络中支持改进的回波消除的装置和方法。本发明的实施例可以允许以窄带模式操作的分离带通信系统通过将信号从分组网络转换为双线模拟电路而产生的混合回声提供改进的抑制。通过检测要传送的相对较窄带宽之外的信号特性的存在，这样的实施例可以更准确地检测在相对较宽带宽通信电路上从一方接收的语音的发生。语音的准确检测允许更有效地抑制回声消除后剩余的任何混合回波。本发明的实施例还可以应用于检测经由具有大于要发送的带宽的路径接收的信号的其他系统中。

7. 发明申请

US20040109498A1 System and method for accelerated clock synchronization of remotely distributed electronic devices 失效
标题翻译：远程分布式电子设备加速时钟同步的系统和方法
公开(公告)号：US20040109498A1
公开(公告)日：2004-06-10
申请号：US10294661
申请日：2002-11-15
发明人： Kevin Miller , Anders Hebsgaard
IPC分类号： H04N007/173 , H04B001/38 , H04L005/16
CPC分类号： H03L7/10 , H03L2207/06 , H04J3/0638 , H04J3/0664 , H04L69/28 , H04N7/56 , H04N21/4305
摘要： A timing recovery system and method for accelerated clock synchronization of remotely distributed electronic devices is provided. The system includes a phase locked loop, a linear estimator and control logic. The method includes sampling a clock signal received from an electronic device, applying a linear estimation technique to estimate the frequency and phase of the received signal and providing those estimates to a phase locked loop to accelerate the phase locked loop acquisition rate and secure signal lock quickly.
摘要翻译：提供了一种用于远程分布式电子设备的加速时钟同步的定时恢复系统和方法。该系统包括锁相环，线性估计器和控制逻辑。该方法包括对从电子设备接收的时钟信号进行采样，应用线性估计技术来估计接收信号的频率和相位，并将这些估计提供给锁相环，以加速锁相环获取速率并快速保护信号锁定。

8. 发明申请

US20040086030A1 System and method supporting auto-recovery in a transceiver system 有权
标题翻译：支持收发系统自动恢复的系统和方法
公开(公告)号：US20040086030A1
公开(公告)日：2004-05-06
申请号：US10313258
申请日：2002-12-05
发明人： Kang Xiao , Mario Caresosa , Hongtao Jiang , Randall Stolaruk
IPC分类号： H04L005/16 , H04B001/38
CPC分类号： H04J3/0685 , H04J3/04 , H04J3/0688 , H04J2203/0089
摘要： A method and apparatus are disclosed to aid a transceiver chip, in a serial data communications system, in recovering from a system-side, out-bound data clocking problem. If a problem with a primary clock signal, used to clock data from a system-side of a transceiver chip through at least a part of an out-bound data path of the transceiver chip, is detected, then a more reliable secondary clock signal is substituted for the primary clock signal. Once it is determined that the primary clock signal has recovered, the primary clock signal is switched back to and certain discrete circuits of the out-bound data path of the transceiver chip are automatically reset in hardware without the need for system level intervention to avoid any problems due to clock glitches on the primary clock signal during the switching.
摘要翻译：公开了一种方法和装置，用于帮助串行数据通信系统中的收发器芯片从系统侧的出站数据计时问题中恢复。如果检测到用于通过收发器芯片的出站数据路径的至少一部分对收发器芯片的系统侧的数据进行时钟的主时钟信号的问题，则更可靠的辅助时钟信号是代替主时钟信号。一旦确定主时钟信号已恢复，则主时钟信号被切换回并且收发器芯片的出站数据路径中的某些离散电路在硬件中自动重置，而不需要系统级干预来避免任何在切换期间由于时钟信号引起的主时钟信号引起的问题。

9. 发明申请

US20040057509A1 System and method for establishing an xdsl data transfer link 失效
标题翻译：用于建立xdsl数据传输链路的系统和方法
公开(公告)号：US20040057509A1
公开(公告)日：2004-03-25
申请号：US09869215
申请日：2003-08-11
发明人： Boaz Porat , Christian Eleischhacker , Michael Staber , Hubert Weingerger
IPC分类号： H04B001/38 , H04L005/16
CPC分类号： H04L12/12 , Y02D50/40 , Y02D50/44
摘要： An xDSL data transfer system for data transfer comprising at least one xDSL user modem (4) connected via a data transfer medium (8) to a corresponding xDSL modem (9) within a central office, wherein the xDSL user modem (4) generates a pulse length modulated wake-up signal for switching the corresponding xDSL modem (9) within the central office (10) from a sleep mode to an operation mode.
摘要翻译：一种用于数据传输的xDSL数据传输系统，包括至少一个经由数据传送介质（8）连接到中心局内的对应的xDSL调制解调器（9）的xDSL用户调制解调器（4），其中xDSL用户调制解调器（4）用于将中心局（10）内的相应xDSL调制解调器（9）从休眠模式切换到操作模式的脉冲长度调制唤醒信号。

10. 发明申请

US20040057507A1 Link estimation in a communication system 审中-公开
标题翻译：通信系统中的链路估计
公开(公告)号：US20040057507A1
公开(公告)日：2004-03-25
申请号：US10253298
申请日：2002-09-24
发明人： Ron Rotstein , Randy L. Ekl , Mark J. Johnson
IPC分类号： H04L005/16
CPC分类号： H04L1/0001
摘要： A first device (102/104) receives a first message (300) from a second device (104/102) over a communication link (106). The first device also receives a first transmit power level (202/212) by which the first message was transmitted and a first interference level (204/208) as perceived by the second device. The first device calculates at least one transmission parameter by which a second message will be transmitted to the second device based on the first transmit power level and the first interference level.
摘要翻译：第一设备（102/104）通过通信链路（106）从第二设备（104/102）接收第一消息（300）。第一设备还接收第一发送功率电平（202/212），通过该第一发送功率电平发送第一消息，以及由第二设备察觉的第一干扰电平（204/208）。第一设备基于第一发射功率电平和第一干扰电平计算至少一个传输参数，通过该传输参数将第二消息发送到第二设备。

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