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1. 发明申请

US20040160974A1 Method and system for rapid channel change within a transport stream 审中-公开
标题翻译：传输流内快速通道改变的方法和系统
公开(公告)号：US20040160974A1
公开(公告)日：2004-08-19
申请号：US10366781
申请日：2003-02-13
发明人： Christopher Jensen Read , David H. Bessel
IPC分类号： H04L012/28 , H04J003/04
CPC分类号： H04N5/50 , H04N5/4401 , H04N21/23424 , H04N21/434 , H04N21/4384 , H04N21/44016 , H04N21/482
摘要： Embodiments of the present invention relate to a method and system for changing programs in a digital transport stream carrying multiple channels which comprises receiving a digital television transport stream that has a plurality of multiplexed channels, de-multiplexing the plurality of channels, detecting I-frames of each channel and storing the most recent I-frame from each channel in a buffer. When a channel change is desired, the stored I-frame associated with the desired channel is obtained and decoded so that subordinate P-frames and B-frames in the desired channel can be immediately decoded in reference to the I-frame. By presenting the stored I-frame, there is no delay while waiting for a next transmitted I-frame in order to commence decoding and immediately presenting the selected channel to the display.
摘要翻译：本发明的实施例涉及一种用于改变承载多个信道的数字传输流中节目的方法和系统，包括接收具有多个复用信道的数字电视传输流，对多个信道进行解复用，检测I帧并将来自每个通道的最新I帧存储在缓冲器中。当期望频道改变时，获得与所需频道相关联的所存储的I帧并进行解码，从而可以参照I帧立即解码所需频道中的下级P帧和B帧。通过呈现所存储的I帧，在等待下一个发送的I帧时没有延迟，以便开始解码并立即将所选择的频道呈现给显示器。

2. 发明申请

US20040095966A1 Remultiplexing apparatus 失效
标题翻译：多路复用装置
公开(公告)号：US20040095966A1
公开(公告)日：2004-05-20
申请号：US10692686
申请日：2003-10-27
申请人： Mitsubishi Denki Kabushiki Kaisha
发明人： Yoshiaki Kato , Yuka Fujita , Tokumichi Murakami
IPC分类号： H04J003/04
CPC分类号： H04H60/73 , H04N21/234 , H04N21/23608 , H04N21/23611 , H04N21/2365 , H04N21/242 , H04N21/4302 , H04N21/4344 , H04N21/4347 , H04N21/8547
摘要： The remultiplexing apparatus comprises a control information selecting means for selecting a packet containing program control information from the inputted bit stream, a program control information editing means for editing contents of the selected program control information and generating new program control information corresponding to an outputted bit stream, and a remultiplexing means for multiplexing again the packet containing media information in the inputted bit stream and the program control information generated by the program control information editing means.
摘要翻译：再分配装置包括：控制信息选择装置，用于从输入的比特流中选择包含节目控制信息的分组;程序控制信息编辑装置，用于编辑所选择的节目控制信息的内容，并产生与输出比特流相对应的新节目控制信息以及再次复用装置，用于再次复用输入的比特流中包含媒体信息的分组和由节目控制信息编辑装置产生的节目控制信息。

3. 发明申请

US20040071171A1 Natural data ordering of a multiplexed high speed bit stream 审中-公开
标题翻译：多路复用高速位流的自然数据排序
公开(公告)号：US20040071171A1
公开(公告)日：2004-04-15
申请号：US10393639
申请日：2003-03-21
发明人： Ali Ghiasi
IPC分类号： H04J003/02 , H04J003/04
CPC分类号： H04J3/047 , H03M9/00
摘要： A multiple bit stream interface interfaces a first transmit data multiplexing integrated circuit and a second transmit data multiplexing integrated circuit. The multiple bit stream interface includes an interface plurality of transmit bit streams each of which carries a respective bit stream at an interface bit rate and in a natural order. The interface further includes a transmit data clock operating at a frequency corresponding to one-half of the interface bit rate. The first transmit data multiplexing integrated circuit receives a first plurality of transmit bit streams from a communication ASIC at a first bit rate. The second transmit data multiplexing integrated circuit produces a single bit stream output at a line bit rate. The interface plurality of transmit bit streams is divided into a first group and a second group, wherein the first group is carried on first group of lines and the second group is carried on a second group of lines. The transmit data clock is carried on a line that is centered with respect to the first group of lines and the second group of lines such that it resides between the first group of lines and the second group of lines. The interface may also interface a first receive data demultiplexing integrated circuit and a second receive data demultiplexing integrated circuit.
摘要翻译：多比特流接口将第一发送数据多路复用集成电路和第二发送数据多路复用集成电路接口。多比特流接口包括多个发送比特流的接口，每个发送比特流以接口比特率和自然顺序携带相应的比特流。该接口还包括以对应于接口比特率的一半的频率工作的发送数据时钟。第一发送数据复用集成电路以第一比特率从通信ASIC接收第一多个发送比特流。第二发送数据复用集成电路以线路比特率产生单个比特流输出。所述多个发送比特流的接口被分成第一组和第二组，其中所述第一组在第一组线路上承载，并且所述第二组在第二组线路上承载。发送数据时钟在相对于第一组线路和第二组线路居中的线路上承载，使得它位于第一组线路组与第二组线路组之间。接口还可以将第一接收数据解复用集成电路和第二接收数据解复用集成电路接口。

4. 发明申请

US20040066804A1 Method for multiplexing different bit rate sources 失效
标题翻译：复用不同比特率源的方法
公开(公告)号：US20040066804A1
公开(公告)日：2004-04-08
申请号：US10432528
申请日：2003-11-21
发明人： Maunu Holma
IPC分类号： H04J003/04
CPC分类号： H04Q11/0478 , H04L2012/5656
摘要： This invention relates to the multiplexing of multiple sources in a multiplexer. A special arrangement is used for calculating an efficient peak capacity value that guarantees good performance for an outgoing link. The invention uses a method with two phases. The first phase precalculates the capacity of the outgoing link with different numbers of incoming links having equal packet size, and forms a table from the results of the precalculation. In the second phase, the peak capacity needed for the outgoing link is calculated using the precalculated tables.
摘要翻译：本发明涉及复用器中多个源的复用。一种特殊的安排用于计算有效的峰值容量值，保证出站链路的良好性能。本发明使用具有两个阶段的方法。第一阶段使用具有相等的分组大小的不同数量的传入链路来预先计算出出链路的容量，并根据预先计算的结果形成表。在第二阶段，使用预先计算的表计算输出链路所需的峰值容量。

5. 发明申请

US20040028085A1 Signal line selection and polarity change of natural bit ordering in high-speed serial bit stream multiplexing and demultiplexing integrated circuits 有权
标题翻译：高速串行比特流复用和解复用集成电路中信号线选择和自然位排序的极性变化
公开(公告)号：US20040028085A1
公开(公告)日：2004-02-12
申请号：US10349450
申请日：2003-01-22
发明人： Mohammad Nejad , Daniel Schoch
IPC分类号： H04J003/04
CPC分类号： H04J3/047 , H04J3/0685
摘要： A bit stream multiplexer and a bit stream demultiplexer of the present invention couples a communication Application Specific Integrate Circuit (ASIC) to a high-speed bit stream media. The bit stream multiplexer includes a first transmit data multiplexing integrated circuit having an input that receives a first plurality of bit streams at a first bit rate from the communication ASIC and an output that produces a second plurality of bit streams at a second bit rate, the second plurality having fewer bit streams than said first plurality. It further includes a second transmit data multiplexing integrated circuit having an input that receives the second plurality of bit streams at the second bit rate and an output that produces a single bit stream at a line bit rate, the single bit stream having a predetermined bit order. The bit stream demultiplexer includes similar demultiplexing integrated circuits. These circuits include an interface that may be ordered, have signal line polarities altered, or bit asserted states altered depending upon the particular implementation.
摘要翻译：本发明的比特流多路复用器和比特流解复用器将通信专用集成电路（ASIC）耦合到高速比特流媒体。比特流多路复用器包括第一发射数据复用集成电路，其具有从通信ASIC以第一比特率接收第一多个比特流的输入和以第二比特率产生第二多个比特流的输出，第二多个具有比所述第一多个更少的比特流。它还包括第二发射数据多路复用集成电路，其具有接收第二比特率的第二多个比特流的输入和以线路比特率产生单个比特流的输出，该单比特流具有预定比特顺序。比特流解复用器包括类似的解复用集成电路。这些电路包括可以被排序的接口，信号线极性改变，或者根据具体实现改变位置位状态。

6. 发明申请

US20040022277A1 System and method of network traffic assignment on muiltiple parallel links between IP/MPLS routers 有权
标题翻译： IP / MPLS路由器之间的并行连接网络流量分配的系统和方法
公开(公告)号：US20040022277A1
公开(公告)日：2004-02-05
申请号：US10209571
申请日：2002-07-31
发明人： Anwar Waild , Indra Widjaja
IPC分类号： H04J003/04 , H04L012/26
CPC分类号： H04L45/50 , H04L45/00 , H04L45/245 , Y02D50/30
摘要： In the operation of an MPLS network or the like, a network node receives a plurality of packets assigned to a label switched path (LSP) which exits the node on a link bundle. The node forwards the received packets such that packets assigned to the LSP are distributed over two or more distinct component links of the bundle.
摘要翻译：在MPLS网络等的操作中，网络节点接收分配给在链路束上离开节点的标签交换路径（LSP）的多个分组。节点转发接收到的分组，使得分配给LSP的分组分布在分组的两个或多个不同组件链路上。

7. 发明申请

US20040004977A1 Flexible filtering 有权
标题翻译：灵活过滤
公开(公告)号：US20040004977A1
公开(公告)日：2004-01-08
申请号：US10421317
申请日：2003-04-22
申请人： STMicroelectronics Limited
发明人： William Robbins , David Wilkins
IPC分类号： H04J003/04
CPC分类号： H04N21/434
摘要： There is disclosed a circuit and method for demultiplexing in a receiver a digital data stream including at least two types of data, so as to retain only those parts of the digital data stream required by the receiver. In one particular application, such a receiver is used in a television system having a digital set-top-box receiver. A first control circuit extracts a packet identifier from an input data packet in the digital data stream, and generates a signal in dependence on whether the input data packet is of the first or second type. Sets of information associated with the first types of data packets and required by the receiver are stored in a memory under the control of a second control circuit. A third control circuit, responsive to receipt of the first type of input data packet, determines whether at least part of the input data packet matches the stored sets of information, and sets a match signal responsive thereto.
摘要翻译：公开了一种用于在接收机中解复用包括至少两种数据的数字数据流的电路和方法，以便仅保留接收机所需的数字数据流的那些部分。在一个特定应用中，这种接收机用在具有数字机顶盒接收机的电视系统中。第一控制电路从数字数据流中的输入数据包中提取分组标识符，并根据输入数据分组是第一类还是第二类产生信号。在第二控制电路的控制下，与第一类型的数据分组相关联并且由接收机所要求的信息集存储在存储器中。响应于接收到第一类型的输入数据分组的第三控制电路确定输入数据分组的至少一部分是否与存储的信息组匹配，并且响应于此设置匹配信号。

8. 发明申请

US20030193973A1 Receiving apparatus for digital broadcasting signal and receiving/recording/reproducing apparatus thereof 有权
标题翻译：用于数字广播信号的接收装置及其接收/记录/再现装置
公开(公告)号：US20030193973A1
公开(公告)日：2003-10-16
申请号：US10435248
申请日：2003-05-12
发明人： Satoru Takashimizu , Yuji Yamamoto , Kenji Katsumata , Takumi Okamura , Takuya Matsumoto , Shuko Sei , Yuji Hatanaka
IPC分类号： H04J003/04
CPC分类号： H04N21/23608 , H04H60/27 , H04N5/4401 , H04N5/76 , H04N5/775 , H04N5/913 , H04N9/8042 , H04N21/2383 , H04N21/433 , H04N21/4333 , H04N21/4334 , H04N21/434 , H04N21/4341 , H04N21/4343 , H04N21/4344 , H04N21/4382 , H04N2005/91321
摘要： In a digital broadcasting signal receiving/recording/reproducing apparatus, a recorded program can be immediately reproduced without performing complicated operations. Only a desired program and information related to the desired program are separated to be extracted from the digital broadcasting signal. Then, the separated/extracted broadcasting signal is supplied to a recording/reproducing apparatus. In the recording/ reproducing apparatus, the supplied broadcasting signal is recorded, and the recorded program can be immediately reproduced without complicated manipulating operations during the signal reproducing operation.
摘要翻译：在数字广播信号接收/记录/再现装置中，可以立即再现记录的节目，而不进行复杂的操作。只有期望的节目和与期望节目相关的信息被分离以从数字广播信号中提取。然后，分离/提取的广播信号被提供给记录/再现装置。在记录/再现装置中，记录所提供的广播信号，并且可以在信号再现操作期间没有复杂的操纵操作立即再现所记录的节目。

9. 发明申请

US20030169783A1 Transport processor for processing multiple transport streams 有权
标题翻译：用于处理多个传输流的传输处理器
公开(公告)号：US20030169783A1
公开(公告)日：2003-09-11
申请号：US10094048
申请日：2002-03-08
发明人： Louis F. Coffin III , Deepak Prakash , James A. Lundblad , Victor A. Tirva , Geroncio G. Galicia , Paul B. Brown , James A. Baldwin
IPC分类号： H04J003/04
CPC分类号： H04N21/42615 , H04N21/434 , H04N21/4385 , H04N21/43853
摘要： A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations ofthe processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.
摘要翻译：一种用于从一个或多个传输流处理多个视频节目的处理装置。处理装置具有包括多个传送处理器单元的传送处理电路。传输处理器单元利用具有包含用于分组类型的处理和硬件状态信息的解复用上下文条目的公共传输处理器存储器单元。每个传输处理器单元包括用于识别要从传输流获取的数据分组的传输接口，用于处理所获取的数据分组的解复用处理器，以及用于处理的数据分组的存储器处理操作的解复用DMA单元。索引链接允许传输处理器单元从传送处理器存储器单元访问信息。该方法使用索引来从传输处理器存储器单元访问解复用上下文条目。相关DMA索引用于访问来自传输处理器存储器单元的存储器处理信息。

10. 发明申请

US20030169782A1 Data transmission apparatus data reception apparatus, data transmission method, data reception method, and transfer system 失效
标题翻译：数据发送装置数据接收装置，数据发送方法，数据接收方法和传送系统
公开(公告)号：US20030169782A1
公开(公告)日：2003-09-11
申请号：US10311774
申请日：2003-05-08
发明人： Gen Ichimura
IPC分类号： H04J003/04
CPC分类号： H04L12/40052 , H04L12/40058 , H04L12/40071 , H04L12/40117 , H04L12/6418
摘要： A technique for transmitting audio data with a varying channel count has been implemented. On the transmission side, data of n channels is divided into blocks each defined for m channels where nnullm. In addition, prior to a transmission of the audio data, a transmitted-data stream matching a predetermined transmission format is generated to include determination information used for determining which portions of each of the blocks are allocated to which portions of each block contain no valid data. On the reception side, on the other hand, the determination information included in the received transmitted-data stream matching the predetermined transmission format is used to identify the unused channels not assigned to valid data in each of the blocks composing the transmitted-data stream so as to allow data of valid channels to be extracted from the stream.
摘要翻译：已经实现了用于发送具有变化的信道数的音频数据的技术。在发送侧，n个信道的数据被划分为各个m个通道中定义的块，其中n <= m。此外，在传输音频数据之前，产生与预定传输格式相匹配的传输数据流，以包括用于确定每个块的哪些部分被分配给每个块的哪些部分不包含有效数据的确定信息。另一方面，在接收侧，使用包含在与预定发送格式相匹配的接收的发送数据流中的确定信息来识别在构成发送数据流的每个块中未分配给有效数据的未使用信道，因此以允许从流中提取有效信道的数据。

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