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1. 发明公开

US20240250692A1 CONTINUOUS-TIME DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER 审中-公开
公开(公告)号：US20240250692A1
公开(公告)日：2024-07-25
申请号：US18157409
申请日：2023-01-20
申请人： Analog Devices, Inc.
发明人： Daniel CANNIFF , Mariana Tosheva Markova
IPC分类号： H03M1/50 , H03M1/70
CPC分类号： H03M1/50 , H03M1/70
摘要： Aspects of the disclosure provide an integrated circuit. The integrated circuit includes an ADC with a continuous time integrator. The continuous time integrator includes an amplifier having an amplifier input and an amplifier output, a capacitor coupled between the amplifier input and the amplifier output, and a resistor. The resistor provides a first current for an integration in response to an analog input. The ADC also includes a DAC configured to generate a second current at an DAC output based on a digital output of the ADC and includes a switch circuit with a first switch circuit terminal coupled with the DAC output and a second switch circuit terminal coupled with the amplifier input. The switch circuit is configured to couple the DAC output with the amplifier input for a summation of the second current with the first current for the integration based on an integration control signal.

2. 发明公开

US20240183954A1 TECHNIQUES FOR A LASER DRIVER CIRCUIT WITH ANALOG MIXER AND OFFSET 审中-公开
公开(公告)号：US20240183954A1
公开(公告)日：2024-06-06
申请号：US18061640
申请日：2022-12-05
申请人： AEVA, INC.
发明人： Garret Phillips , Murat Ozbas , Bryce Bradford
IPC分类号： G01S7/4912 , G01S7/4911 , H03M1/70
CPC分类号： G01S7/4912 , G01S7/4911 , H03M1/70
摘要： A frequency-modulated continuous-wave (FMCW) light detection and ranging (LIDAR) system includes an optical source to generate an optical beam at a chirp rate based on a control signal. The system includes a receiver to capture at least a portion of the optical beam and generate a beat frequency based on the chirp rate. The system also includes mixer circuitry to calculate a difference value between the beat frequency and a reference frequency. The system also includes combination circuitry to combine the difference value with an offset voltage to generate an adjusted control signal that is configured to minimize the difference value to maintain the chirp rate.

3. 发明公开

US20240097701A1 DIGITAL-TO-ANALOG CONVERTER AND CORRESPONDING DIGITAL-TO-ANALOG CONVERSION METHOD 审中-公开
公开(公告)号：US20240097701A1
公开(公告)日：2024-03-21
申请号：US18463844
申请日：2023-09-08
申请人： STMicroelectronics (Rousset) SAS
发明人： Michel Cuenca , Didier Davino
IPC分类号： H03M1/70
CPC分类号： H03M1/70
摘要： One embodiment provides a digital-to-analog converter that includes an output amplifier configured to be powered with a controllable power supply voltage and a ground reference voltage. The output amplifier is configured to generate an analog output signal having a dynamic range centered on a common-mode voltage. The output amplifier includes a common-mode adaptation circuit configured to position a level of the common-mode voltage at a level located in a middle portion of an interval of voltages located between the power supply voltage and the ground reference voltage, according to an effective level of the power supply voltage.

4. 发明授权

US11736075B2 High accuracy output voltage domain operation switching in an operational amplifier 有权
公开(公告)号：US11736075B2
公开(公告)日：2023-08-22
申请号：US17220086
申请日：2021-04-01
申请人： MACOM Technology Solutions Holdings, Inc.
发明人： Andre Rossberg
IPC分类号： H03F1/02 , H03F3/217 , H03M1/70
CPC分类号： H03F3/2175 , H03F1/0261 , H03M1/70
摘要： An amplifier circuit is capable of switching between a unipolar output voltage domain and a bipolar output voltage domain. The amplifier circuit comprises an operational amplifier with a feedback circuit that is configurable using switches. By controlling the switches, the amplifier's feedback circuit can switched between two different arrangements having a positive and a negative signal gain, respectively. The amplifier circuit is designed such that the noise gain is the same in both operating modes, allowing a single noise compensation approach to be used for both operating modes. Since configurability of the circuit is achieved using static switches, the amplifier circuit maintains high accuracy and experiences no appreciable impact on power consumption as a result of implementing the switching.

5. 发明申请

US20220271842A1 LINEARIZED OPTICAL DIGITAL-TO-ANALOG MODULATOR 有权
公开(公告)号：US20220271842A1
公开(公告)日：2022-08-25
申请号：US17736876
申请日：2022-05-04
申请人： Ramot at Tel Aviv University Ltd.
发明人： Yossef EHRLICHMAN , Ofer AMRANI , Shlomo RUSCHIN
IPC分类号： H04B10/516 , G02F1/01 , G02F7/00 , G02F1/225 , H04B10/50 , H04B10/25 , H04B10/2575 , H04B10/556 , H03M1/70 , H04B10/54 , H03M1/00
摘要： In a system for converting digital data into a modulated optical signal, an electrically controllable device, including a modulator having one or more actuating electrodes, provides an analog-modulated optical signal that is modulated in response to output data bits of a digital-to-digital mapping. A digital-to-digital conversion provides the mapping of input data words to the output data bits. The mapping enables adjustments to correct for non-linearities and other undesirable characteristics, thereby improving signal quality.

6. 发明申请

US20200091927A1 DAC AND OSCILLATION CIRCUIT 审中-公开
公开(公告)号：US20200091927A1
公开(公告)日：2020-03-19
申请号：US16470037
申请日：2017-12-14
申请人： SONY SEMICONDUCTOR SOLUTIONS CORPORATION
发明人： YOSHINOBU KAWASAKI , KENTARO YASUNAKA , TAKASHI MASUDA
IPC分类号： H03M1/70 , H03B5/12
摘要： The present technology relates to a DAC (Digital to Analog Converter) and an oscillation circuit that allow widening of a range of a voltage to be output from the DAC. A plurality of first switches is connected to a voltage-dividing resistor and each configured to output, as a first voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of first switches. A plurality of second switches is connected to the voltage-dividing resistor and each configured to output, as a second voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of second switches. The present technology can be applied to, for example, a VCO (Voltage-Controlled Oscillator) and the like that oscillates a signal with a frequency according to a voltage to be output from a DAC.

7. 发明授权

US10090854B1 Digital-to-analog converter and method for correcting gain mismatch between a first segment and a second segment of a digital-to-analog converter 有权
公开(公告)号：US10090854B1
公开(公告)日：2018-10-02
申请号：US15704152
申请日：2017-09-14
申请人： Intel Corporation
发明人： Martin Clara
IPC分类号： H03M1/66 , H03M1/68 , H03M1/08 , H03M1/10 , H03M1/70
摘要： A method for correcting gain mismatch between a first segment and a second segment of a digital-to-analog converter is provided. The first segment generates a first contribution to an analog output signal of the digital-to-analog converter based on a first number of bits of a digital input word for the digital-to-analog converter, wherein the second segment generates a second contribution to the analog output signal based on a second number of bits of the digital input word. The method includes extending a numeric range of a second control word for the second segment by a predefined number of bits, wherein the second control word is indicative of the second number of bits. Further, the method includes multiplying the second control word by a correction value that is based on information about a gain error of the first segment. The method additionally includes digitally filtering the multiplied first control word. After the digital filtering, the method further includes reducing the numeric range of the multiplied second control word by the predefined number of bits to generate a modified second control word for the second segment. Additionally, the method includes supplying the modified second control word as input to the second segment.

8. 发明授权

US10063249B2 Audio circuit for suppressing DC shock noise 有权
公开(公告)号：US10063249B2
公开(公告)日：2018-08-28
申请号：US15133817
申请日：2016-04-20
申请人： ROHM CO., LTD.
发明人： Mitsuteru Sakai
IPC分类号： H03G3/00 , H03M1/66 , H03F3/20 , H03M1/70 , H03F3/187 , H03F3/213 , H03F3/68 , H03M1/74 , H03G3/30
CPC分类号： H03M1/66 , H03F3/187 , H03F3/20 , H03F3/213 , H03F3/68 , H03F2200/03 , H03F2200/375 , H03G3/3005 , H03M1/70 , H03M1/742
摘要： A D/A converter converts digital audio data DIN into analog differential audio signals VP and VN. A differential to single-ended conversion circuit converts the differential audio signals VP and VN into a single-ended audio signal VSE. A volume circuit receives the single-ended audio signal VSE, and amplifies the single-ended audio signal VSE with a gain that corresponds to a volume value. A reference voltage source generates a reference voltage VREF commonly referred by the differential to single-ended conversion circuit and the volume circuit. In a calibration operation, a calibration circuit controls the D/A converter so as to shift at least one from among the differential audio signals VP and VN such that the difference between the output voltage VSE of the differential to single-ended conversion circuit and the reference voltage VREF approaches zero.

9. 发明授权

US09515626B2 Digital/analogue conversion 有权
标题翻译：数字/模拟转换
公开(公告)号：US09515626B2
公开(公告)日：2016-12-06
申请号：US14436648
申请日：2013-10-10
申请人： Cirrus Logic International Semiconductor Limited
发明人： John Paul Lesso
IPC分类号： H03M1/00 , H03G3/00 , H03M1/06 , H03M1/66 , H03M1/08 , H03M1/70
CPC分类号： H03G3/001 , H03M1/0624 , H03M1/0626 , H03M1/0863 , H03M1/66 , H03M1/70
摘要： The application relates to digital to analogue conversion circuits having dynamic gain control. A digital variable gain element (102) may apply gain to an input digital signal (DIN) upstream of a DAC (101) to make better use of the input range of the DAC and an analogue variable gain element (103) applies a compensating analogue gain. Again controller (201) has a gain allocation module (204) for controlling the allocation of gain between said digital and analogue variable gain elements in response to changes in a signal level of the input digital audio signal. In the present invention the gain allocation module is operable in first and second modes of operation where the response to reductions in signal level is slower in the first mode than in the second mode of operation. A low-level detector (202) monitors the input digital audio signal so as to detect a low-level part of the signal and the gain controller changes from the first mode to the second mode following detection of a low-level part of the input digital audio signal. The response of the gain allocation module in the second mode is preferably fast enough such that the digital gain can be changed to a target setting suitable for the low-level part of the signal before it is received at the digital gain element.
摘要翻译：该应用涉及具有动态增益控制的数模转换电路。数字可变增益元件（102）可以对DAC（101）上游的输入数字信号（DIN）施加增益，以更好地利用DAC的输入范围，并且模拟可变增益元件（103）应用补偿模拟获得。再次，控制器（201）具有增益分配模块（204），用于响应于输入数字音频信号的信号电平的变化来控制所述数字和模拟可变增益元件之间的增益分配。在本发明中，增益分配模块可在第一和第二操作模式中操作，其中对第一模式的信号电平降低的响应比在第二操作模式中更慢。低电平检测器（202）监视输入数字音频信号，以便在检测到输入的低电平部分之后检测信号的低电平部分，并且增益控制器从第一模式改变到第二模式数字音频信号。增益分配模块在第二模式中的响应优选地足够快，使得数字增益可以在其在数字增益元件被接收之前被改变为适合于信号的低电平部分的目标设置。

10. 发明授权

US09484947B1 Variable length dynamic element matching in digital-to-analog converters 有权
标题翻译：数模转换器中的可变长度动态元件匹配
公开(公告)号：US09484947B1
公开(公告)日：2016-11-01
申请号：US14869154
申请日：2015-09-29
申请人： ANALOG DEVICES, INC.
发明人： Khiem Quang Nguyen
IPC分类号： H03M1/06 , H03M1/70 , H03M1/08 , H03M1/74 , H03M1/00
CPC分类号： H03M1/70 , H03M1/00 , H03M1/002 , H03M1/066 , H03M1/747 , H03M3/338 , H03M3/50
摘要： Embodiments of the disclosure provide improved mechanisms for applying DEM techniques to a DAC comprising a plurality of cells. Disclosed mechanisms include keeping track of the amplitude of input digital signal over a certain time period to determine a range of amplitudes of a portion of the input signal, and, when converting the digital values of that portion to analog values and applying a particular DEM technique, limiting the number of DAC cells on which a DEM technique is applied only to a number that is necessary for generating the analog output corresponding to the tracked portion, which number is determined based on the tracked amplitudes and could be smaller than the total number of DAC cells. In this manner, mismatch error may be reduced for smaller input signal amplitudes. Whenever possible, unused DAC cells may be put into a power saving mode, providing the advantage of reduced power consumption.
摘要翻译：本公开的实施例提供了用于将DEM技术应用于包括多个单元的DAC的改进机制。公开的机制包括在一定时间段内跟踪输入数字信号的幅度以确定输入信号的一部分的幅度范围，并且当将该部分的数字值转换为模拟值并应用特定的DEM技术限制将DEM技术应用于其上的DAC单元的数量仅限于产生与被跟踪部分相对应的模拟输出所需的数量，该数目是基于跟踪幅度确定的，并且可以小于 DAC单元。以这种方式，对于较小的输入信号幅度，可能会降低失配误差。只要有可能，未使用的DAC单元可以进入省电模式，提供降低功耗的优点。

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