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1. 发明授权

US09515626B2 Digital/analogue conversion 有权
标题翻译：数字/模拟转换
公开(公告)号：US09515626B2
公开(公告)日：2016-12-06
申请号：US14436648
申请日：2013-10-10
申请人： Cirrus Logic International Semiconductor Limited
发明人： John Paul Lesso
IPC分类号： H03M1/00 , H03G3/00 , H03M1/06 , H03M1/66 , H03M1/08 , H03M1/70
CPC分类号： H03G3/001 , H03M1/0624 , H03M1/0626 , H03M1/0863 , H03M1/66 , H03M1/70
摘要： The application relates to digital to analogue conversion circuits having dynamic gain control. A digital variable gain element (102) may apply gain to an input digital signal (DIN) upstream of a DAC (101) to make better use of the input range of the DAC and an analogue variable gain element (103) applies a compensating analogue gain. Again controller (201) has a gain allocation module (204) for controlling the allocation of gain between said digital and analogue variable gain elements in response to changes in a signal level of the input digital audio signal. In the present invention the gain allocation module is operable in first and second modes of operation where the response to reductions in signal level is slower in the first mode than in the second mode of operation. A low-level detector (202) monitors the input digital audio signal so as to detect a low-level part of the signal and the gain controller changes from the first mode to the second mode following detection of a low-level part of the input digital audio signal. The response of the gain allocation module in the second mode is preferably fast enough such that the digital gain can be changed to a target setting suitable for the low-level part of the signal before it is received at the digital gain element.
摘要翻译：该应用涉及具有动态增益控制的数模转换电路。数字可变增益元件（102）可以对DAC（101）上游的输入数字信号（DIN）施加增益，以更好地利用DAC的输入范围，并且模拟可变增益元件（103）应用补偿模拟获得。再次，控制器（201）具有增益分配模块（204），用于响应于输入数字音频信号的信号电平的变化来控制所述数字和模拟可变增益元件之间的增益分配。在本发明中，增益分配模块可在第一和第二操作模式中操作，其中对第一模式的信号电平降低的响应比在第二操作模式中更慢。低电平检测器（202）监视输入数字音频信号，以便在检测到输入的低电平部分之后检测信号的低电平部分，并且增益控制器从第一模式改变到第二模式数字音频信号。增益分配模块在第二模式中的响应优选地足够快，使得数字增益可以在其在数字增益元件被接收之前被改变为适合于信号的低电平部分的目标设置。

2. 发明授权

US09571927B2 Digital/analogue conversion 有权
标题翻译：数字/模拟转换
公开(公告)号：US09571927B2
公开(公告)日：2017-02-14
申请号：US14437685
申请日：2013-10-10
申请人： Cirrus Logic International Semiconductor Limited
发明人： John Paul Lesso
IPC分类号： H02B1/00 , H04R3/00 , H03M1/66 , H03M3/00
CPC分类号： H04R3/00 , H03M1/66 , H03M3/374 , H03M3/50
摘要： This application relates to digital-to-analogue conversion with improved noise performance. Embodiments relate to digital-to-analogue conversion circuits (300) for converting a digital audio signal to an analogue audio signal having a digital-to-analogue converter (104) operable at a plurality of DAC clock rates. A first clock controller (301-1) controls the DAC clock rate based on an indication of the amplitude of the audio signal. The DAC clock rate (CK1) may be increased for low amplitude signal, where noise is important, to reduce the in-band thermal noise of the DAC. At higher amplitudes, when noise is less audible, the DAC clock rate may be reduced to avoid distortion. The amplitude of the audio signal may be monitored by a digital level detector (302) or in some cases by an analogue level detector (303). The DAC may be an oversampling DAC with an input interpolator (101) The conversion circuit may also include a word-length reduction module (102) and a dynamic error matching module (103) whose clock rates may also be varied based on the signal.
摘要翻译：该应用涉及具有改进的噪声性能的数模转换。实施例涉及用于将数字音频信号转换为模拟音频信号的数模转换电路（300），模拟音频信号具有可以多个DAC时钟速率工作的数模转换器（104）。第一时钟控制器（301-1）基于音频信号的幅度的指示来控制DAC时钟速率。对于噪声很重要的低幅度信号，DAC时钟频率（CK1）可能会增加，以降低DAC的带内热噪声。在较高的幅度下，当噪声较小时，DAC时钟频率可能会降低，以避免失真。音频信号的幅度可以由数字电平检测器（302）监视，或者在某些情况下由模拟电平检测器（303）监视。 DAC可以是具有输入内插器的过采样DAC（101）。转换电路还可以包括字长减小模块（102）和动态误差匹配模块（103），其时钟速率也可以基于该信号而变化。

3. 发明申请

US20160157017A1 SIGNAL PROCESSING FOR MEMS CAPACITIVE TRANSDUCERS 有权
标题翻译：用于MEMS电容式传感器的信号处理
公开(公告)号：US20160157017A1
公开(公告)日：2016-06-02
申请号：US14787052
申请日：2014-04-23
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LIMITED
发明人： John Paul Lesso , Emmanuel Philippe Christian Hardy , James Thomas Deas , Toru Ido
IPC分类号： H04R3/06 , H04R19/04 , H03M1/06 , H04R19/00
CPC分类号： H04R3/06 , G01D3/02 , G01D5/24 , G01D5/24476 , G01P15/125 , G01P2015/0865 , H03M1/0609 , H03M1/12 , H03M3/352 , H03M3/458 , H04R19/005 , H04R19/04 , H04R29/004 , H04R2201/003 , H04R2499/11
摘要： This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (Scorr); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.
摘要翻译：本申请涉及用于处理由MEMS电容换能器产生的感测信号以补偿这种感测信号中的失真的电路。电路具有用于接收感测信号的输入端（204）和用于基于所述感测信号输出输出信号的输出端（205）之间的信号路径。补偿电路（206,207）被配置为在沿着信号路径的第一点处监视信号并产生校正信号（Scorr）; 并且基于所述校正信号沿着所述信号路径在至少第二点处修改信号。校正信号作为沿着信号路径的第一点处的信号的值的函数产生，以便将补偿分量引入补偿感测信号中的失真分量的输出信号中。信号路径中的第一点可以在信号路径中的第二点之前或之后。可以在信号路径的模拟或数字部分中执行监视，并且在任一情况下，修改可以应用于信号路径的模拟或数字部分。

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