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1. 发明授权

US4200812A Frequency converter delivering constant width output pulses within variable duty cycles 失效
标题翻译：变频器在可变占空比范围内提供恒定宽度的输出脉冲
公开(公告)号：US4200812A
公开(公告)日：1980-04-29
申请号：US868863
申请日：1978-01-12
申请人： Manfred Fichter
发明人： Manfred Fichter
IPC分类号： H03K25/04 , H03K1/18 , H03K4/02 , H03K25/06
CPC分类号： H03K25/04
摘要： In the disclosed frequency converter, a pulse shaper receives pulses at the input frequency and changes their pulse widths to a predetermined value. An integrator integrates the reshaped pulses. An ultra high resistance triggering stage applies the voltage output of the integrator to a monostable multivibrator which is fired each time the voltage output of the integrator exceeds a predetermined value. The multivibrator forms pulses which turn on a discharge circuit that rapidly resets the integrator with each multivibrator output pulse. The multivibrator output pulses appear at the attenuated frequency which is established by, and can be infinitely varied by, stepless change of the predetermined pulse widths.
摘要翻译：在所公开的变频器中，脉冲整形器以输入频率接收脉冲并将其脉冲宽度改变为预定值。积分器整合重构脉冲。超高电阻触发级将积分器的电压输出应用于单稳态多谐振荡器，该单稳态多谐振荡器每当积分器的电压输出超过预定值时被触发。多谐振荡器形成脉冲，其接通放电电路，以使用每个多谐振荡器输出脉冲快速复位积分器。多谐振荡器输出脉冲以衰减频率出现，该衰减频率由预定脉冲宽度的无级变化建立并且可无限变化。

2. 发明授权

US3644834A Frequency divider circuits 失效
标题翻译：频率分路电路
公开(公告)号：US3644834A
公开(公告)日：1972-02-22
申请号：US3644834D
申请日：1970-03-27
申请人： EMI LTD
发明人： TAYLOR JOHN HARRY , HARRIS ROGER STEPHEN
IPC分类号： H03B19/00 , H03K25/06
CPC分类号： H03B19/00
摘要： A frequency divider circuit for producing an output signal from an input signal of periodicity t is provided, including means for deriving an intermediate signal which defines alternate intervals N.t and M.t., where N and M are integers, means for extending the ends of alternate intervals by P.t/2., where P is an odd integer, so as to produce a further intermediate signal, and means for generating said output signal in response to said further intermediate signal. Such a frequency divider circuit is disclosed which is adapted for providing field synchronizing pulses from line frequency pulses.

3. 发明授权

US5900749A Threshold voltage level generator for time division duplex communications 失效
标题翻译：用于时分双工通信的阈值电压电平发生器
公开(公告)号：US5900749A
公开(公告)日：1999-05-04
申请号：US856358
申请日：1997-05-14
申请人： Alan F. Hendrickson , Peter E. Sheldon
发明人： Alan F. Hendrickson , Peter E. Sheldon
IPC分类号： H03K5/08 , H04L25/06 , H03K5/00 , H03K25/06
CPC分类号： H04L25/065 , H03K5/082 , H04L25/062
摘要： A circuit for generating a threshold voltage level from a time division duplex analog data signal. The circuit comprises a sample/hold circuit and an amplifier. The sample/hold circuit is arranged to sample the threshold voltage level during a reception interval and hold the threshold voltage level during a transmission interval. The amplifier includes an operational amplifier coupled to the sample/hold circuit for amplifying the analog data signal during a reception interval and amplifying the threshold voltage level during a transmission interval. A transconductance device is coupled to the operational amplifier, and a plurality of load legs are respectively coupled to a plurality of bias legs. A first selected pair of the respectively coupled load legs and bias legs is coupled to the transconductance device, and a second selected pair of the respectively coupled load legs and bias legs coupled to the output of the amplifier to provide the threshold voltage level.
摘要翻译：一种用于从时分双工模拟数据信号产生阈值电压电平的电路。电路包括采样/保持电路和放大器。采样/保持电路被布置成在接收间隔期间对门限电压电平进行采样，并在发送间隔期间保持阈值电压电平。放大器包括耦合到采样/保持电路的运算放大器，用于在接收间隔期间放大模拟数据信号，并在发送间隔期间放大阈值电压电平。跨导装置耦合到运算放大器，并且多个负载支路分别耦合到多个偏置支路。分别耦合的负载支路和偏置支路的第一选择的一对耦合到跨导装置，以及耦合到放大器的输出端的分别耦合的负载支路和偏置支路的第二选定对，以提供阈值电压电平。

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