专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5994717A Thin-film transistor and method for fabricating same and liquid crystal display device 有权
标题翻译：薄膜晶体管及其制造方法和液晶显示装置
公开(公告)号：US5994717A
公开(公告)日：1999-11-30
申请号：US149128
申请日：1998-09-08
申请人： Makoto Igarashi , Takuya Watanabe
发明人： Makoto Igarashi , Takuya Watanabe
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L29/417 , H01L29/45 , H01L29/786 , H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/70
CPC分类号： H01L29/78696 , H01L29/41733 , H01L29/66765 , H01L29/458
摘要： A thin-film transistor including a gate electrode provided on a substrate, a gate insulation film provided on the gate electrode, an operative semiconductor film provided on the gate insulation film, and a channel protection film provided on the operative semiconductor film. Semiconductor contact portions are disposed so that they are covered by the channel protection film on either side of the operative semiconductor film. A source electrode and a drain electrode are connected to the semiconductor contact portions on either side of the channel protection film. The thin-film transistor can minimize the stray capacitance due to the overlapping of the source and drain electrodes with the gate electrode and is excellent in the contact characteristic. Also, a method for fabricating a thin-film transistor is disclosed.
摘要翻译：一种薄膜晶体管，包括设置在基板上的栅极电极，设置在栅电极上的栅极绝缘膜，设置在栅极绝缘膜上的工作半导体膜，以及设置在工作半导体膜上的沟道保护膜。半导体接触部分被布置成使得它们被操作半导体膜的任一侧上的沟道保护膜覆盖。源电极和漏极连接到沟道保护膜两侧的半导体接触部分。薄膜晶体管可以由于源极和漏极与栅电极的重叠而使杂散电容最小化，并且接触特性优异。另外，公开了一种制造薄膜晶体管的方法。

2. 发明授权

US08461668B2 Power management integrated circuit 有权
标题翻译：电源管理集成电路
公开(公告)号：US08461668B2
公开(公告)日：2013-06-11
申请号：US13111396
申请日：2011-05-19
申请人： Jong Min Kim , Jae Hyun Yoo
发明人： Jong Min Kim , Jae Hyun Yoo
IPC分类号： H01L21/44 , H01L31/70 , H01L21/70
CPC分类号： H01L21/70 , H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： A Power Management Integrated Circuit (PMIC) that includes a substrate, a high-side (HS) region on the substrate, a low-side (LS) region spaced from the first region, a device isolation layer interposed between the HS region and the LS region, a metal interconnection connected to the HS region across the device isolation layer and configured to permit a high-voltage current to flow in the HS region, and at least one electric field shield between the metal interconnection and the device isolation layer. Since the electric field shield is disposed under the metal interconnection, a sufficient breakdown voltage can be ensured for the HS region and the LS region.
摘要翻译：一种电源管理集成电路（PMIC），其包括衬底，衬底上的高侧（HS）区域，与第一区域间隔开的低侧（LS）区域，设置在HS区域和第二区域之间的器件隔离层 LS区域，跨过器件隔离层连接到HS区域并且被配置为允许高压电流在HS区域中流动的金属互连以及金属互连和器件隔离层之间的至少一个电场屏蔽。由于电场屏蔽设置在金属互连下方，因此可以确保HS区域和LS区域的足够的击穿电压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式