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1. 发明申请

US20030107936A1 Semiconductor memory device employing temperature detection circuit 有权
标题翻译：采用温度检测电路的半导体存储器件
公开(公告)号：US20030107936A1
公开(公告)日：2003-06-12
申请号：US10317544
申请日：2002-12-12
发明人： In-Chul Jung , Sun-Seok Yang
IPC分类号： G11C007/04
CPC分类号： G11C7/04 , G11C11/406
摘要： A temperature detection circuit is provided. A first delay unit has a first delay time that varies based on a temperature. The first delay unit receives a reference signal and generates a first delayed reference signal. A second delay unit has a second delay time that varies based on the temperature, wherein the second delay time varies less than the first delay time for a given temperature variance. The second delay unit to receives the reference signal and generates a second delayed reference signal. A temperature detecting unit receives the first and second delayed reference signals and generates a temperature detection signal based on the first and second delayed reference signals.
摘要翻译：提供温度检测电路。第一延迟单元具有基于温度而变化的第一延迟时间。第一延迟单元接收参考信号并产生第一延迟参考信号。第二延迟单元具有基于温度变化的第二延迟时间，其中对于给定的温度变化，第二延迟时间变化小于第一延迟时间。第二延迟单元，用于接收参考信号并产生第二延迟参考信号。温度检测单元接收第一和第二延迟参考信号，并且基于第一和第二延迟参考信号产生温度检测信号。

2. 发明申请

US20030103401A1 WRITE CURRENT COMPENSATION FOR TEMPERATURE VARIATIONS IN MEMORY ARRAYS 有权
标题翻译：用于记忆阵列温度变化的写入电流补偿
公开(公告)号：US20030103401A1
公开(公告)日：2003-06-05
申请号：US09998216
申请日：2001-12-03
发明人： Lung T. Tran , Manoj K. Bhattacharyya
IPC分类号： G11C007/04
CPC分类号： G11C11/16
摘要： A memory device includes a memory array having a substrate, an array of memory cells disposed over the substrate, row conductors coupled to the memory cells, and column conductors coupled to the memory cells. The memory device also includes current sources that generate variable write currents in response to temperature changes in the memory array. The variable write currents are generated to accommodate the change in coercivities of the memory cells as the temperature of the array changes. A current source can include a temperature sensor that provides a continuous, immediate output to the current sensor to ensure accurate adjustment of a write current generated by the current source. There is no need to halt operation of the memory device to calibrate the current source. In addition, the current source provides an accurate adjustment to the write current because the temperature used by the temperature sensor to generate the output may be taken contemporaneously with generation of the write current.
摘要翻译：存储器件包括具有衬底的存储器阵列，设置在衬底上的存储器单元的阵列，耦合到存储器单元的行导体和耦合到存储器单元的列导体。存储器件还包括响应于存储器阵列中的温度变化产生可变写入电流的电流源。随着阵列温度的变化，产生可变写入电流以适应存储器单元的矫顽力变化。电流源可以包括温度传感器，其向电流传感器提供连续的即时输出，以确保精确地调整由电流源产生的写入电流。不需要停止存储器件的操作来校准电流源。此外，电流源提供对写入电流的精确调整，因为温度传感器用于产生输出的温度可以同时产生写入电流。

3. 发明申请

US20040071029A1 Crystal oscillator emulator 有权
标题翻译：晶振仿真器
公开(公告)号：US20040071029A1
公开(公告)日：2004-04-15
申请号：US10272247
申请日：2002-10-15
发明人： Sehat Sutardja
IPC分类号： G11C007/04
CPC分类号： H03L1/026 , H03B5/04 , H03L1/025 , H03L7/08
摘要： A device for generating an output signal having a frequency. The device having a die temperature and including a first temperature sensor to sense a first temperature. A non-volatile memory to store calibration information for controlling the output signal frequency as a function of the first temperature. A semiconductor oscillator to generate the output signal as a function of the calibration information.
摘要翻译：一种用于产生具有频率的输出信号的装置。所述装置具有管芯温度并且包括用于感测第一温度的第一温度传感器。一种用于存储用于控制作为第一温度的函数的输出信号频率的校准信息的非易失性存储器。一个半导体振荡器，用于根据校准信息产生输出信号。

4. 发明申请

US20030227809A1 Temperature-adjusted pre-charged reference for an integrated circuit 1T/1C ferroelectric memory 审中-公开
标题翻译：集成电路1T / 1C铁电存储器的温度调节预充电参考
公开(公告)号：US20030227809A1
公开(公告)日：2003-12-11
申请号：US10163323
申请日：2002-06-05
发明人： Kurt S. Schwartz
IPC分类号： G11C007/04
CPC分类号： G11C7/04 , G11C11/22
摘要： A temperature-dependent reference works by pre-charging a standard linear CMOS or ferroelectric reference capacitor to a pre-charge voltage that is dependent on temperature. At cold temperatures the pre-charge voltage is higher, resulting in a larger voltage on the reference bit-line. At warm temperatures the pre-charge voltage is lower, resulting in a smaller voltage on the reference bit-line. Both the precise temperature slope and offset pre-charge voltage are selectable.
摘要翻译：温度依赖参考通过将标准线性CMOS或铁电参考电容器预充电到依赖于温度的预充电电压来实现。在寒冷的温度下，预充电电压较高，导致参考位线上的电压较大。在温暖的温度下，预充电电压较低，导致参考位线上的电压较小。可以选择精确的温度斜率和偏移预充电电压。

5. 发明申请

US20010001599A1 Memory structure utilizing four transistor load less memory cells and a bias generator 失效
标题翻译：存储结构利用四个晶体管负载较少的存储单元和一个偏置发生器
公开(公告)号：US20010001599A1
公开(公告)日：2001-05-24
申请号：US09732631
申请日：2000-12-08
发明人： Ken W. Marr
IPC分类号： G11C007/04
CPC分类号： G11C11/418
摘要： The present invention is a current-mirror-based bias generator for a load less four transistor SRAM as well as associated methods of controlling or modifying the current conducted by the access transistors of such an SRAM. The present invention may be thought of as an adjustable temperature coefficient, bias generator that references, via a current mirror, a reference bank of SRAM cells. The bank of reference cells provides an indication of the necessary conduction characteristics (e.g., gate to source voltage) of the access transistors under various conditions. By applying a bias voltage to the word line the desired current is sourced from the digit line. The bank of reference SRAM cells inherently compensates for process variations. The adjustable temperature coefficient bias generator allows the current sourced by the digit lines to vary greatly as a result of temperature variations. Thus, the present invention compensates for both process variations and temperature variations.
摘要翻译：本发明是一种用于负载少于四个晶体管SRAM的基于电流镜的偏置发生器，以及控制或修改由这种SRAM的存取晶体管传导的电流的相关方法。本发明可以被认为是可调温度系数，偏置发生器，其通过电流镜参考SRAM单元的参考组。参考单元组在各种条件下提供存取晶体管所必需的导通特性（例如，栅 - 源电压）的指示。通过对字线施加偏置电压，所需电流来自数字线。参考库SRAM单元固有地补偿了工艺变化。可调节温度系数偏置发生器允许由数字线引起的电流由于温度变化而极大地变化。因此，本发明补偿了工艺变化和温度变化。

6. 发明申请

US20040008557A1 Magnetic memory having a temperature compensated write circuit 有权
公开(公告)号：US20040008557A1
公开(公告)日：2004-01-15
申请号：US10194767
申请日：2002-07-12
发明人： Frederick A. Perner , Manoj Bhattacharyya
IPC分类号： G11C007/04
CPC分类号： G11C7/04 , G11C11/16
摘要： A magnetic memory is disclosed. In one embodiment, the magnetic memory includes a magnetic memory cell, a conductor which crosses the magnetic memory cell and a circuit coupled to the conductor configured to apply a modified magnetic field to the magnetic memory cell in response to temperature variations in the magnetic memory cell.

7. 发明申请

US20030026154A1 Reference voltage generating circuit of nonvolatile ferroelectric memory device 有权
标题翻译：非易失性铁电存储器件参考电压发生电路
公开(公告)号：US20030026154A1
公开(公告)日：2003-02-06
申请号：US10207197
申请日：2002-07-30
申请人： Hynix Semiconductor Inc.
发明人： Hee Bok Kang , Hun Woo Kye , Duck Ju Kim , Je Hoon Park
IPC分类号： G11C007/04
CPC分类号： G11C11/22 , G11C7/14
摘要： A reference voltage generating circuit of a non-volatile ferroelectric memory device includes a temperature compensating control circuit that increases and outputs a level of a signal to a reference capacitor node according to an increase in temperature when a reference control signal is at a high level, a plurality of ferroelectric capacitors connected in parallel, each of first electrodes of the plurality of ferroelectric capacitors are commonly connected to a ground voltage terminal and each of second electrodes of the plurality of ferroelectric capacitors are commonly connected to the reference capacitor node, and a plurality of switching blocks controlled by a reference wordline signal, each having drain terminals commonly connected to the reference capacitor node, source terminals connected to a corresponding bitline.
摘要翻译：非易失性强电介质存储器件的参考电压产生电路包括：温度补偿控制电路，当温度补偿控制信号处于高电平时，根据温度上升，增加信号电平并将其输出到参考电容器节点; 并联连接的多个铁电电容器，多个铁电电容器的每个第一电极共同连接到接地电压端子，并且多个铁电电容器中的每个第二电极共同连接到参考电容器节点，并且多个由参考字线信号控制的开关块，其各自具有共同连接到参考电容器节点的漏极端子，源极端子连接到对应的位线。

8. 发明申请

US20010002890A1 A method of regulating a voltage difference between a word line and a digit line of a load less, four transistor memory cell 失效
标题翻译：一种调节负载较小四晶体管存储单元的字线和数字线之间的电压差的方法
公开(公告)号：US20010002890A1
公开(公告)日：2001-06-07
申请号：US09732533
申请日：2000-12-08
发明人： Ken W. Marr
IPC分类号： G11C007/04 , G11C029/00
CPC分类号： G11C11/418
摘要： The present invention is a current-mirror-based bias generator for a load less four transistor SRAM as well as associated methods of controlling or modifying the current conducted by the access transistors of such an SRAM. The present invention may be thought of as an adjustable temperature coefficient, bias generator that references, via a current mirror, a reference bank of SRAM cells. The bank of reference cells provides an indication of the necessary conduction characteristics (e.g., gate to source voltage) of the access transistors under various conditions. By applying a bias voltage to the word line the desired current is sourced from the digit line. The bank of reference SRAM cells inherently compensates for process variations. The adjustable temperature coefficient bias generator allows the current sourced by the digit lines to vary greatly as a result of temperature variations. Thus, the present invention compensates for both process variations and temperature variations.
摘要翻译：本发明是一种用于负载少于四个晶体管SRAM的基于电流镜的偏置发生器，以及控制或修改由这种SRAM的存取晶体管传导的电流的相关方法。本发明可以被认为是可调温度系数，偏置发生器，其通过电流镜参考SRAM单元的参考组。参考单元组在各种条件下提供存取晶体管所必需的导通特性（例如，栅 - 源电压）的指示。通过对字线施加偏置电压，所需电流来自数字线。参考库SRAM单元固有地补偿了工艺变化。可调节温度系数偏置发生器允许由数字线引起的电流由于温度变化而极大地变化。因此，本发明补偿了工艺变化和温度变化。

9. 发明申请

US20010001600A1 Method of controlling the conduction of the access transistors of a load less, four transistor memory cell 失效
标题翻译：控制负载较小的四晶体管存储单元的存取晶体管的导通的方法
公开(公告)号：US20010001600A1
公开(公告)日：2001-05-24
申请号：US09732535
申请日：2000-12-08
发明人： Ken W. Marr
IPC分类号： G11C007/04
CPC分类号： G11C11/418
摘要： The present invention is a current-mirror-based bias generator for a load less four transistor SRAM as well as associated methods of controlling or modifying the current conducted by the access transistors of such an SRAM. The present invention may be thought of as an adjustable temperature coefficient, bias generator that references, via a current mirror, a reference bank of SRAM cells. The bank of reference cells provides an indication of the necessary conduction characteristics (e.g., gate to source voltage) of the access transistors under various conditions. By applying a bias voltage to the word line the desired current is sourced from the digit line. The bank of reference SRAM cells inherently compensates for process variations. The adjustable temperature coefficient bias generator allows the current sourced by the digit lines to vary greatly as a result of temperature variations. Thus, the present invention compensates for both process variations and temperature variations.
摘要翻译：本发明是一种用于负载少于四个晶体管SRAM的基于电流镜的偏置发生器，以及控制或修改由这种SRAM的存取晶体管传导的电流的相关方法。本发明可以被认为是可调温度系数，偏置发生器，其通过电流镜参考SRAM单元的参考组。参考单元组在各种条件下提供存取晶体管所必需的导通特性（例如，栅 - 源电压）的指示。通过对字线施加偏置电压，所需电流来自数字线。参考库SRAM单元固有地补偿了工艺变化。可调节温度系数偏置发生器允许由数字线引起的电流由于温度变化而极大地变化。因此，本发明补偿了工艺变化和温度变化。

10. 发明申请

US20040179414A1 Temperature compensated RRAM circuit 有权
标题翻译：温度补偿RRAM电路
公开(公告)号：US20040179414A1
公开(公告)日：2004-09-16
申请号：US10384985
申请日：2003-03-10
申请人： Sharp Laboratories of America, Inc.
发明人： Sheng Teng Hsu
IPC分类号： G11C007/04
CPC分类号： G11C13/004 , G11C7/04 , G11C7/062 , G11C7/067 , G11C7/14 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C2013/0054 , G11C2213/31 , G11C2213/72 , G11C2213/79
摘要： A temperature compensated RRAM sensing circuit to improve the RRAM readability against temperature variations is disclosed. The circuit comprises a temperature dependent element to control the response of a temperature compensated circuit to generate a temperature dependent signal to compensate for the temperature variations of the resistance states of the memory resistors. The temperature dependent element can control the sensing signal supplied to the memory resistor so that the resistance states of the memory resistor are compensated against temperature variations. The temperature dependent element can control the reference signal supplied to the comparison circuit so that the output signal provided by the comparison circuit is compensated against temperature variations. The temperature dependent element is preferably made of the same material and process as the memory resistors.
摘要翻译：公开了一种温度补偿RRAM检测电路，用于提高RRAM对温度变化的可读性。该电路包括温度依赖元件，用于控制温度补偿电路的响应，以产生与温度相关的信号，以补偿存储电阻器的电阻状态的温度变化。温度依赖元件可以控制提供给存储电阻的感测信号，使得存储电阻器的电阻状态得到抵消温度变化的补偿。温度依赖元件可以控制提供给比较电路的参考信号，使得由比较电路提供的输出信号补偿温度变化。温度依赖元件优选地由与存储电阻器相同的材料和工艺制成。

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