专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06025730A Direct connect interconnect for testing semiconductor dice and wafers 失效
标题翻译：直接连接互连，用于测试半导体晶片和晶圆
公开(公告)号：US06025730A
公开(公告)日：2000-02-15
申请号：US818456
申请日：1997-03-17
申请人： Salman Akram , James M. Wark , Warren M. Farnworth
发明人： Salman Akram , James M. Wark , Warren M. Farnworth
IPC分类号： G01R1/04 , G01R31/28 , G01R1/73
CPC分类号： G01R31/2886 , G01R1/0408
摘要： An interconnect and system for testing semiconductor dice, and a test method using the interconnect are provided. The interconnect includes a substrate having patterns of contact members for electrically contacting the dice. The interconnect also includes patterns of conductors for providing electrical paths to the contact members. In addition, the interconnect includes contact receiving cavities configured to retain electrical connectors of a testing apparatus in electrical communication with the conductors. A die level test system includes the interconnect mounted to a temporary package for a singulated die. In the die level test system, the interconnect provides direct electrical access from testing circuitry to the die. A wafer level test system includes the interconnect mounted to a probe card fixture of a wafer probe handler. In the wafer level test system, the contact receiving cavities can be configured to support and align the interconnect to the probe card fixture.
摘要翻译：提供了用于测试半导体晶片的互连和系统，以及使用该互连的测试方法。互连包括具有用于电接触骰子的接触构件图案的衬底。互连还包括用于向接触构件提供电路径的导体图案。此外，互连件包括被配置为保持与导体电连通的测试装置的电连接器的接触接收腔。芯片级测试系统包括安装到用于单个模具的临时封装的互连。在芯片级测试系统中，互连提供从测试电路到芯片的直接电接入。晶片级测试系统包括安装到晶片探测器处理器的探针卡夹具上的互连。在晶片级测试系统中，触点接收腔可以被配置为支撑并将互连对准到探针卡固定装置。

2. 发明授权

US07091734B2 Electroconductive contact unit 失效
标题翻译：导电接触单元
公开(公告)号：US07091734B2
公开(公告)日：2006-08-15
申请号：US10482303
申请日：2002-07-01
申请人： Toshio Kazama
发明人： Toshio Kazama
IPC分类号： G01R1/73
CPC分类号： H01R13/2421 , C23C28/023 , G01R1/06722 , H01R13/03 , H01R2201/20
摘要： In the electroconductive contact unit of the present invention, an electroconductive needle member 2 is made of a noble metal alloy having a high hardness and wear resistance, and formed with a gold plated layer 8 via a Ni under layer 7, and a flat surface 2e is formed by a tip portion thereof so as to expose the material of the needle member. Thereby, the durability of the needle member is ensured and the electroconductivity of the electric path between the needle member and coil spring is minimized on account of the gold plated layer. Even when the contact surface is soiled by solder deposition after repeated applications to contact objects such as solder balls, simply grinding the contact surface and revealing a new surface, the contact resistance between the contact surface and contact object can be kept unchanged by grinding so that the test can be conducted with the benefit of low resistance at all times.
摘要翻译：在本发明的导电性接触单元中，导电性针状部件2由硬度高，耐磨性高的贵金属合金构成，通过Ni底层7形成有镀金层8，平坦面2 e由其顶端形成，以露出针构件的材料。由此，确保了针构件的耐久性，并且由于镀金层，针构件和螺旋弹簧之间的电通路的导电性最小化。即使在重复使用接触物体（例如焊球）之后，通过焊料沉积使接触表面污染，只需研磨接触表面并露出新的表面，接触表面和接触物体之间的接触电阻可以通过研磨保持不变，使得可以始终以低电阻的优点进行试验。

3. 发明授权

US5552701A Docking system for an electronic circuit tester 失效
标题翻译：电子线路测试仪对接系统
公开(公告)号：US5552701A
公开(公告)日：1996-09-03
申请号：US441563
申请日：1995-05-15
申请人： David R. Veteran , Joel D. Bickford , Julius K. Botka
发明人： David R. Veteran , Joel D. Bickford , Julius K. Botka
IPC分类号： G01R31/26 , G01R31/28 , H01L21/66 , G01R1/73 , G01R1/04 , G01R1/067 , G01R15/12
CPC分类号： G01R31/2851 , G01R31/2889 , G01R31/2887
摘要： An electronic circuit test system for measuring the response to electrical signals applied to an electronic circuit under test is provided with a docking system for facilitating mechanical and electrical connections. A docking cone is mounted to a fixture board of the electronic circuit test system. The docking cone enters a tunnel in a test head of the electronic circuit test system as the fixture board is moved toward the test head. The docking cone guides connectors mounted to the fixture board into connection with mating connectors mounted to a load board and a connector support disk comprising the test head. The docking system increases the repeatability and reliability of mechanical and electrical connections and reduces the risk of damage to electrical connectors of the electronic circuit test system.
摘要翻译：用于测量应用于被测电子电路的对电信号的响应的电子电路测试系统设置有用于促进机械和电气连接的对接系统。对接锥体安装到电子电路测试系统的夹具板上。当夹具板向测试头移动时，对接锥体进入电子电路测试系统的测试头中的隧道。对接锥引导器将安装到固定板的连接器连接到安装到负载板的配合连接器和包括测试头的连接器支撑盘。对接系统增加了机械和电气连接的重复性和可靠性，并降低了损坏电子电路测试系统电连接器的风险。

4. 发明授权

US07081767B2 Electroconductive contact unit 失效
标题翻译：导电接触单元
公开(公告)号：US07081767B2
公开(公告)日：2006-07-25
申请号：US10482301
申请日：2002-07-01
申请人： Toshio Kazama
发明人： Toshio Kazama
IPC分类号： G01R1/73
CPC分类号： G01R1/06722 , C23C28/023 , G01R1/06738 , G01R1/06761 , G01R3/00 , H01R13/03 , H01R13/2421 , H01R2201/20
摘要： In the electroconductive contact unit of the present invention, a gold plated layer 8 is formed over the surface of an electroconductive needle member 2 via a Ni under layer 7a, and a layer of iridium (titanium nitride, rhodium or hafnium nitride) is formed on the gold plated layer 8 of the needle portion 2a by sputtering, via an Ni under layer 7b. Thereby, the tip portion is provided with an improved resistance to oxidization and wear without using any special material for the needle member, and the durability of the needle member is improved so that the running cost can be minimized.
摘要翻译：在本发明的导电性接触单元中，通过Ni底层7a在导电性针状构件2的表面上形成镀金层8，形成铱（氮化钛，铑或氮化铪）层通过Ni底层7b通过溅射在针部分2a的镀金层8上。由此，在不使用针状构件的特殊材料的情况下，使尖端部具有改善的耐氧化性和耐磨损性，能够提高针构件的耐久性，能够最大限度地降低运行成本。

5. 发明授权

US6046599A Method and device for making connection 失效
标题翻译：连接方法和设备
公开(公告)号：US6046599A
公开(公告)日：2000-04-04
申请号：US765661
申请日：1997-03-04
申请人： Tommy Long , Mohamed Sabri , J. Lynn Saunders
发明人： Tommy Long , Mohamed Sabri , J. Lynn Saunders
IPC分类号： G01R31/28 , G01R1/73
CPC分类号： G01R31/2886
摘要： A contact device having a plurality of nominally coplanar first contact elements makes electrical contact with corresponding nominally coplanar second contact elements of an electronic device when the contact device and the electronic device are positioned so that the plane of the first contact elements is substantially parallel to the plane of the second contact elements and relative displacement of the devices is effected in a direction substantially perpendicular to the plane of the first contact elements and the plane of the second contact elements. The contact device comprises a stiff substrate having a major portion with fingers projecting therefrom in cantilever fashion, each finger having a proximal end at which it is connected to the major portion of the substrate and an opposite distal end and there being one or two contact elements on the distal end of each finger. A mechanical ground is positioned away from the fingers towards the proximal end, and deflection resulting from contact between the probe member and the electronic device is shared between the fingers and a portion of the substrate not including the fingers. Methods utilizing such a contact device also are disclosed.
摘要翻译： PCT No.PCT / US96 / 07359 Sec。 371日期1997年3月4日 102（e）1997年3月4日PCT PCT 1996年5月20日PCT公布。公开号WO96 / 36884 日期1996年11月21日当接触器件和电子器件被定位成使得第一接触元件的平面被定位时，具有多个名义上共面的第一接触元件的接触器件与电子器件的对应的名义上共面的第二接触元件电接触基本上平行于第二接触元件的平面，并且器件的相对位移在基本上垂直于第一接触元件的平面和第二接触元件的平面的方向上实现。接触装置包括具有主要部分的刚性基底，其中指状物以悬臂方式从其突出，每个指状物具有近端，在该近端处连接到基底的主要部分和相对的远端，并且存在一个或两个接触元件在每个手指的远端。机械接地远离指状物朝向近端定位，并且由探针构件和电子设备之间的接触引起的偏转在指状物和不包括手指的基底的一部分之间共享。还公开了利用这种接触装置的方法。

6. 发明授权

US6043669A Wireless test fixture 失效
标题翻译：无线测试夹具
公开(公告)号：US6043669A
公开(公告)日：2000-03-28
申请号：US947753
申请日：1997-10-09
申请人： Keith C. Carroll
发明人： Keith C. Carroll
IPC分类号： G01R1/073 , H05K3/32 , G01R1/73
CPC分类号： H05K3/326 , G01R1/0735
摘要： A printed circuit board test fixture includes a plurality of flexible printed circuits having circuit traces on one side for interconnecting the test probe pin assemblies of the fixture with the interface connector pins for the interface panel of the fixture. The flexible circuits are folded in the fixture housing to provide spaced apart non-contacting layers of first contact areas for connection to the test probe pin assemblies and spaced apart non-contacting layers of second contact areas for connection to the interface connector pins. The layers of flexible circuit of each contact area receive the test probe pin assemblies and interface connector pins which secure the layers of flexible circuit in the fixture. The test probe pin assemblies and the interface connector pins make electrical and mechanical engagement with terminal apertures in the layers of flexible circuit. The layers further include through holes allowing the test probe pin assemblies and interface connector pins to pass through layers of the flexible circuit without making electrical contact with these layers. This permits circuit traces to be used on each of the layers of flexible circuit for selected test probe pin assembly and interface connector pin connected pairs.
摘要翻译：印刷电路板测试夹具包括多个柔性印刷电路，其具有一侧上的电路迹线，用于将固定装置的测试探针引脚组件与用于固定装置的接口面板的接口连接器引脚相互连接。柔性电路折叠在固定壳体中以提供间隔开的第一接触区域的非接触层，用于连接到测试探针销组件和间隔开的第二接触区域的非接触层，用于连接到接口连接器引脚。每个接触区域的柔性电路层接收测试探针销组件和接口连接器针脚，固定夹具中的柔性电路层。测试探头针组件和接口连接器引脚与柔性电路层中的端子孔电气和机械接合。这些层还包括通孔，允许测试探针销组件和接口连接器引脚穿过柔性电路的层而不与这些层电接触。这允许在选择的测试探针针组件和接口连接器引脚连接对上的每个柔性电路层上使用电路迹线。

7. 发明授权

US6025731A Hybrid interconnect and system for testing semiconductor dice 失效
标题翻译：混合互连和半导体骰子测试系统
公开(公告)号：US6025731A
公开(公告)日：2000-02-15
申请号：US821468
申请日：1997-03-21
申请人： David R. Hembree , Salman Akram , Warren M. Farnworth , Alan G. Wood , James M. Wark , Derek Gochnour
发明人： David R. Hembree , Salman Akram , Warren M. Farnworth , Alan G. Wood , James M. Wark , Derek Gochnour
IPC分类号： G01R1/04 , G01R1/073 , G01R1/73
CPC分类号： G01R1/0466 , G01R1/0735
摘要： An interconnect is provided for making electrical connections with a semiconductor die. The interconnect includes a substrate having integrally formed contact members, configured to electrically contact corresponding contact locations on the die. The interconnect also includes a pattern of conductors formed separately from the substrate, and then bonded to the substrate, in electrical communication with the contact members. The conductors can be mounted to a multi layered tape similar to TAB tape, or alternately bonded directly to the substrate. In addition, each conductor can include an opening aligned with a corresponding contact member, and filled with a conductive material, such as a conductive adhesive or solder. The conductive material electrically connects the contact members and conductors, and provides an expansion joint to allow expansion of the conductors without stressing the contact members. Also provided are a system for testing dice that includes the interconnect, and a system for testing wafers wherein the interconnect is formed as a probe card.
摘要翻译：提供用于与半导体管芯进行电连接的互连。互连包括具有整体形成的接触构件的基板，其构造成电接触管芯上相应的接触位置。互连还包括与衬底分开形成的导体图案，然后与接触构件电气连接到衬底。导体可以安装到类似于TAB带的多层胶带上，或者可以直接粘合到基底上。此外，每个导体可以包括与对应的接触构件对准的开口，并且填充有诸如导电粘合剂或焊料的导电材料。导电材料电连接接触构件和导体，并且提供膨胀接头以允许导体的膨胀而不会压紧接触构件。还提供了一种用于测试包括互连的骰子的系统，以及用于测试晶片的系统，其中互连形成为探针卡。

8. 发明授权

US5557214A Micro beam probe semiconductor test interface 失效
标题翻译：微光束探头半导体测试接口
公开(公告)号：US5557214A
公开(公告)日：1996-09-17
申请号：US384001
申请日：1995-02-06
申请人： C. Kenneth Barnett
发明人： C. Kenneth Barnett
IPC分类号： G01R1/073 , G01R1/73 , H01R43/00
CPC分类号： G01R1/073 , Y10T29/49222
摘要： Apparatus is disclosed for interfacing a semiconductor test circuit and a semiconductor device under test, wherein the interface is a silicon structure test probe having conductor paths which extend along cantilevered parallelogram micro beams having contact bumps on the free ends of the beams arranged in a pattern which registers with a test pad pattern on the semiconductor device under test. The parallelogram beams provide test pad contact with substantially no scrubbing action. The silicon structure provides testing over wide environmental ranges because the test probe structure reacts to environmental conditions in the same way as the silicon semiconductor device under test. A method for fabricating the silicon structure test probe is disclosed which includes fabrication in the silicon structure of semiconductor circuit drivers and receivers for the conducting paths.
摘要翻译：公开了用于连接半导体测试电路和被测半导体器件的装置，其中该界面是具有导体路径的硅结构测试探针，该导体路径沿悬臂式平行四边形微梁延伸，该微梁在以图案布置的图案中布置的梁的自由端上具有接触凸块在测试的半导体器件上注册测试焊盘图案。平行四边形梁提供测试垫接触，基本上没有擦洗作用。硅结构提供了在宽环境范围内的测试，因为测试探针结构以与测试的硅半导体器件相同的方式对环境条件起反应。公开了一种用于制造硅结构测试探针的方法，其包括在用于导电路径的半导体电路驱动器和接收器的硅结构中制造。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式