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    • 3. 发明授权
    • System and algorithm for multipath mitigation
    • 多径缓解的系统和算法
    • US09264082B2
    • 2016-02-16
    • US13914691
    • 2013-06-11
    • BAE Systems Information And Electronic Systems Integration Inc.
    • Gary R. Lomp
    • H03D1/06H03D11/04H03K5/01H03K6/04H04B1/10H04L7/00H04L25/08
    • H04B1/1081H04L25/03057H04L2025/03484H04L2025/03605H04L2025/03681
    • A system and method for optimally combining multi-path signals is presented. A first signal is received that traveled a first path from a transmitter to a receiving location and a second signal is received that traveled a different second path from the transmitter to the same receiving location. The paths are different so that the first and second signals contain the same signal data but the first signal has a first distortion that is different than a second distortion in the second signal. According to an objective function, the method adaptively generates a first weight value and a second weight value. The first and second weight values are applied to the respective first and second signals to produce respective first and second weighted signals. The first and second weighted signals are linearly combined producing a combined signal with a combined signal degradation.
    • 提出了一种用于最佳组合多路径信号的系统和方法。 接收到从发射机到接收位置行进第一路径的第一信号,并且接收到将不同的第二路径从发射机行进到同一接收位置的第二信号。 路径是不同的,使得第一和第二信号包含相同的信号数据,但是第一信号具有与第二信号中的第二失真不同的第一失真。 根据目标函数,该方法自适应地产生第一权重值和第二权重值。 将第一和第二加权值应用于相应的第一和第二信号以产生相应的第一和第二加权信号。 第一和第二加权信号被线性组合,产生具有组合信号劣化的组合信号。
    • 6. 发明申请
    • RECEIVER CIRCUIT
    • 接收电路
    • US20150280948A1
    • 2015-10-01
    • US14662859
    • 2015-03-19
    • FUJITSU LIMITED
    • Takanori Nakao
    • H04L25/08H04L7/00H04L25/03
    • H04L25/08H04L7/0058H04L25/03057H04L25/03885H04L27/01H04L2025/0349H04L2025/03681
    • An n-tap (n≧2 (in the case of FIG. 1, n=2)) DFE equalizes a received signal on the basis of a determination result of a signal which has been received, and outputs a determination result of the received signal after equalization. An adjustment section generates a plurality of filter patterns for observation of an inter-symbol interference amount by changing values of n bits included in the plurality of filter patterns. The adjustment section then compares each of the plurality of filter patterns generated with an output data string corresponding to the determination result of the received signal after equalization and adjusts tap coefficients set for n (in the case of FIG. 1, 2) taps included in the DFE on the basis of adjustment values corresponding to values of the n bits included in a filter pattern which matches the output data string.
    • n抽头(n≥2(在图1的情况下,n = 2))DFE根据接收到的信号的确定结果对接收信号进行均衡,并输出接收到的信号的确定结果 均衡后的信号。 调整部通过改变包含在多个滤波器图案中的n位的值,生成用于观察符号间干扰量的多个滤波器模式。 然后,调整部分将生成的多个滤波器模式中的每一个与均衡后的接收信号的确定结果相对应的输出数据串进行比较,并调整为n(在图1,2的情况下)设置的抽头系数 基于与输出数据串匹配的过滤器图案中包括的n位的值的调整值的DFE。
    • 9. 发明申请
    • DECISION FEEDBACK EQUALIZERS AND OPERATING METHODS THEREOF
    • 决策反馈均衡器及其操作方法
    • US20140146868A1
    • 2014-05-29
    • US14172026
    • 2014-02-04
    • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    • Yung-Chow PENGYu-Chun LIN
    • H04L25/03
    • H04L25/03885H04L25/03006H04L25/03057H04L2025/03535H04L2025/03681H04L2025/03707H04L2025/03745
    • A decision feedback equalizer (DFE) includes a sampler for receiving a first input signal and comparing an amplitude of the first input signal with a first predetermined voltage level and a second predetermined voltage level. The DFE includes a DFE logic circuit for receiving at least one first sign signal based on comparison results, and for selectively updating a tap coefficient based on the at least one first sign signal. The DFE logic circuit is configured to update the tap coefficient when the at least one first sign signal indicates the amplitude of the first input signal is not between the first predetermined voltage level and the second predetermined voltage level. The DFE logic circuit is configured to maintain the tap coefficient when the at least one first sign signal indicates the amplitude of the first input signal is between the first and the second predetermined voltage levels.
    • 判决反馈均衡器(DFE)包括用于接收第一输入信号并将第一输入信号的幅度与第一预定电压电平和第二预定电压电平进行比较的采样器。 DFE包括DFE逻辑电路,用于基于比较结果接收至少一个第一符号信号,并且用于基于至少一个第一符号信号选择性地更新抽头系数。 DFE逻辑电路被配置为当至少一个第一符号信号指示第一输入信号的幅度不在第一预定电压电平和第二预定电压电平之间时更新抽头系数。 DFE逻辑电路被配置为当至少一个第一符号信号指示第一输入信号的幅度在第一和第二预定电压电平之间时保持抽头系数。