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1. 发明授权

US4209771A Code converting method and system 失效
标题翻译：代码转换方法和系统
公开(公告)号：US4209771A
公开(公告)日：1980-06-24
申请号：US943618
申请日：1978-09-19
申请人： Masachika Miyata , Eiichi Amada
发明人： Masachika Miyata , Eiichi Amada
IPC分类号： H03M5/20 , G06F7/68 , H03M1/00 , H03M7/00 , H04L25/49 , H04L3/00
CPC分类号： H03M7/3048 , G06F7/68
摘要： A code converting method in which a multivalue signal x.sub.i sampled at a sampling period of mT, where m (an even number) equals 2.sup.n (n being integer) and x.sub.i is non-negative integer not greater than m, is received and subjected to density conversion to be delivered out in the form of a train of m binary signals sampled at a sampling period of T. A Z-transform Y(Z) of the binary signal to be delivered out is expressed as, ##EQU1## where q.sub.i+1 .ident.q.sub.i +X.sub.i+1 +m, and mod 2; q.sub.o =0 and where H(x.sub.i, q.sub.i, Z) represents a polynomial of the order related to Z.sup.-1 not greater than (m-1) which has non-zero terms having each a coefficient of 1(one) and which satisfies H(k, q.sub.i, 1)=k, H(k, q.sub.i, Z)=Z.sup.-(m-1) H(k,q.sub.i,1/Z) and H(k,0,Z)=H(k,1,Z) for k being an even number, and H(k,0,Z)=Z.sup.-(m-1) H(k,1,1/Z) for k being an odd number.
摘要翻译：代码转换方法，其中以m（偶数）等于2n（n为整数）和xi为不大于m的非负整数的mT的采样周期采样的多值信号xi被接收并且经受密度转换为以T的采样周期采样的m个二进制信号串的形式传送。要传送的二进制信号的Z变换Y（Z）表示为，其中qi + 1 = qi + Xi + 1 + m，mod 2; qo = 0，其中H（xi，qi，z）表示与Z-1相关的次序的多项式不大于（m-1），其具有每个系数为1（1）的非零项，并且满足 H（k，qi，1）= k，H（k，qi，Z）= Z-（m-1）H（k，qi，1 / Z）和H（k，0，Z）= H ，1，Z），k为奇数，H（k，0，Z）= Z-（m-1）H（k，1,1 / Z）

2. 发明申请

US20150142455A1 SIGNAL PROCESSING DEVICE, SIGNAL PROCESSING METHOD, AND COMPUTER PROGRAM 有权
标题翻译：信号处理装置，信号处理方法和计算机程序
公开(公告)号：US20150142455A1
公开(公告)日：2015-05-21
申请号：US14534592
申请日：2014-11-06
申请人： SONY CORPORATION
发明人： YUUKI MATSUMURA , SHIRO SUZUKI
IPC分类号： G11B20/10 , G11B20/24
CPC分类号： G11B20/10037 , G11B20/10027 , G11B2020/00065 , H03M3/30 , H03M7/3004 , H03M7/3013 , H03M7/3031 , H03M7/3044 , H03M7/3048
摘要： There is provided a signal processing device including a signal coincidence detection portion which detects samples, in which values based on a number of times of appearance of bits coincide with each other over a plurality of samples within a pre-set period, between a first modulated signal obtained by delaying an input signal obtained by ΣΔ modulation and a second modulated signal obtained by subjecting the input signal to the ΣΔ modulation again, a signal changeover portion which switches between the first modulated signal and the second modulated signal for outputting, and a switching control portion which controls the switching between the first modulated signal and the second modulated signal by the signal changeover portion in the samples in which the values based on the number of times of the appearance coincide with each other obtained by the signal coincidence detection portion.
摘要翻译：提供了一种信号处理装置，包括信号一致检测部分，其检测样本，其中基于比特出现次数的值在预设时段内在多个样本之间彼此重合的值在第一调制通过延迟由＆Sgr;＆Dgr获得的输入信号获得的信号; 调制和通过使输入信号经受＆Sgr＆amp; Dgr获得的第二调制信号; 再次调制在第一调制信号和第二调制信号之间切换以输出的信号切换部分，以及切换控制部分，其通过样本中的信号切换部分控制第一调制信号和第二调制信号之间的切换其中基于通过信号重合检测部分获得的出现次数的值彼此一致。

3. 发明授权

US4057797A All digital delta to PCM converter 失效
标题翻译：所有数字增量到PCM转换器
公开(公告)号：US4057797A
公开(公告)日：1977-11-08
申请号：US637226
申请日：1975-12-03
申请人： Adam A. Jorgensen
发明人： Adam A. Jorgensen
IPC分类号： H03M7/00 , H03K13/22
CPC分类号： H03M7/3048
摘要： A digital circuit for converting a delta modulated signal to a binary coded signal without producing an interim analog signal. The principal portions of the circuit are an up-down counter, a read-only memory the instantaneous output of which is controlled by the up-down counter, logic for driving the up-down counter in response to an incoming delta modulated signal, and a scanner for producing time-spaced pulses in response to the instantaneous outputs of the memory. A comparator is also included for driving the up-down counter relatively slowly to compensate for drift by ensuring that, over relatively long periods such as a few seconds, the output of the up-down counter oscillates around its mid-value.
摘要翻译：一种用于将增量调制信号转换为二进制编码信号而不产生临时模拟信号的数字电路。电路的主要部分是上下计数器，其立即输出由升降计数器控制的只读存储器，用于响应于进入的增量调制信号来驱动上下计数器的逻辑，以及扫描器，用于响应于存储器的瞬时输出产生时间间隔的脉冲。还包括比较器，用于相对缓慢地驱动上下计数器，以通过确保在相对长的时间（例如几秒钟）内，上下计数器的输出围绕其中间值振荡来补偿漂移。

4. 发明授权

US3916107A Digital system for reclocking pulse code modulation circuits 失效
标题翻译：用于重新调用脉冲编码调制电路的数字系统
公开(公告)号：US3916107A
公开(公告)日：1975-10-28
申请号：US29567472
申请日：1972-10-06
申请人： BELL TELEPHONE LABOR INC
发明人： MCDONALD HENRY STANTON
IPC分类号： H03M7/00 , H04J3/00 , H04J3/06 , H04L5/22 , H04L25/05
CPC分类号： H03M7/3048 , H04J3/00 , H04J3/06 , H04J3/062 , H04L25/05
摘要： Time division multiplexed pulse code modulated digital character signals received from a transmission medium are demultiplexed and converted into respective delta modulation signals in accordance with a first set of time base information derived from the pulse code modulated signals. This operation removes pulse code character and time division frame time restrictions. The delta modulated signals are recoded to a predetermined pulse code modulated format, such as differential pulse code modulation, in accordance with a second set of time base information for appropriate further processing or transmission.

5. 发明授权

US3750144A Transcoder for data exchanges between a delta modulation system and a pcm system 失效
标题翻译：用于调制系统和PCM系统之间的数据交换的TRANSCODER
公开(公告)号：US3750144A
公开(公告)日：1973-07-31
申请号：US3750144D
申请日：1971-11-26
申请人： INT STANDARD ELECTRIC CORP
发明人： BOLUS D , LEROUGE C , REGNIER M
IPC分类号： H03M7/00 , H04L3/00
CPC分类号： H03M7/3048
摘要： A transcoder is disclosed for exchanging time division multiplex data between a PCM system and a DM system. The basic circuit is a code circulation loop employing shift registers having a capacity for one PCM frame and wherein the codes are advanced by one address at each DM time slot. The DM clock is synchronized by the PCM clock.
摘要翻译：公开了用于在PCM系统和DM系统之间交换时分复用数据的代码转换器。基本电路是使用具有一个PCM帧的容量的移位寄存器的代码循环回路，并且其中在每个DM时隙，代码被提前一个地址。 DM时钟由PCM时钟同步。

6. 发明授权

US4905002A Delta modulation encoder/decoder method and system 失效
标题翻译： Delta调制编码器/解码器的方法和系统
公开(公告)号：US4905002A
公开(公告)日：1990-02-27
申请号：US166072
申请日：1988-03-09
申请人： Paul W. Jones , Majid Rabbani
发明人： Paul W. Jones , Majid Rabbani
IPC分类号： H03M7/32 , G06T9/00 , H03M7/00 , H03M7/46
CPC分类号： H03M7/3051 , G06T9/005 , H03M7/46 , H03M7/3048
摘要： A method and a system for compressing a delta modulation coded bit string by logically adding together, in mod 2 fashion, adjacent string bits to generate a transformed bit string which is then runlength encoded to provide a compressed bit string. A second embodiment of the invention uses an alternate bit complementation transform which is based on complementing every alterate bit of the bit string to provide a transformed bit string which is then runlength encoded to provide a compressed bit string. Decoding is accomplished by inversing the encoding methods.
摘要翻译：一种用于通过以mod2方式逻辑地将相邻串比特相加在一起来压缩增量调制编码比特串的方法和系统，以生成经过长度编码以提供压缩比特串的经变换的比特串。本发明的第二实施例使用交替位补码变换，其基于对位串的每个改变位进行补码以提供经过长度编码的经变换的位串，以提供压缩位串。解码通过反转编码方法来实现。

7. 发明授权

US4536741A Digital quantizer 失效
标题翻译：数字量化器
公开(公告)号：US4536741A
公开(公告)日：1985-08-20
申请号：US552430
申请日：1983-11-16
申请人： Robert L. Farah
发明人： Robert L. Farah
IPC分类号： H03M7/32 , H03M7/00 , H03K13/01
CPC分类号： H03M7/3048
摘要： An input signal sample is converted, i.e., quantized, from a first digital code to a second digital code by combining an array of stored differential quantizer decision levels with the input signal sample to obtain an array of partial sum signal values. The signs of the partial sum signal values are algebraically summed and the result is used to obtain the quantizer interval that the input signal sample falls in.
摘要翻译：通过将存储的差分量化器判定电平的阵列与输入信号样本相组合，将输入信号样本从第一数字码转换（即量化）到第二数字码，以获得部分和信号值的阵列。部分和信号值的符号被代数相加，结果用于获得输入信号样本所在的量化器间隔。

8. 发明授权

US4128832A Combined encoder/decoder 失效
标题翻译：组合编码器/解码器
公开(公告)号：US4128832A
公开(公告)日：1978-12-05
申请号：US647536
申请日：1976-01-08
申请人： William L. Betts
发明人： William L. Betts
IPC分类号： H03M7/00 , H03K13/24
CPC分类号： H03M7/3048
摘要： A combined encoder/decoder (transcoder) for multiplexed pulse code modulation/delta modulation conversions utilizes a single set of arithmetic elements to perform both the encoding and decoding functions. An interpolator, a magnitude comparator and an integrator, being the prime arithmetic units, are realigned by switching their serial positions to perform the encoding and decoding functions.
摘要翻译：用于复用脉码调制/增量调制转换的组合编码器/解码器（代码转换器）利用单组算术元件来执行编码和解码功能。作为主算术单元的内插器，幅度比较器和积分器通过切换其串行位置来执行编码和解码功能来重新对准。

9. 发明授权

US3766542A Code conversion apparatus 失效
标题翻译：代码转换器
公开(公告)号：US3766542A
公开(公告)日：1973-10-16
申请号：US3766542D
申请日：1971-06-15
申请人： NIPPON ELECTRIC CO
发明人： TOMOZAWA A
IPC分类号： H03M7/32 , H03M7/00 , H03K13/24
CPC分类号： H03M7/3048
摘要： Disclosed herein is a code conversion system for converting, in the digital phase, a prediction type first code to a lower frequency, prediction type second code approximating the information content of the first code. In a first embodiment, an input delta modulation code is converted to a lower frequency output delta modulation code, while in a second embodiment, an input delta modulation code is converted to a lower frequency companding delta modulation code.
摘要翻译：这里公开了一种代码转换系统，用于在数字相位中将预测类型的第一代码转换为较低频率，预测类型的第二代码近似于第一代码的信息内容。在第一实施例中，输入增量调制码被转换为较低频率输出增量调制码，而在第二实施例中，输入增量调制码被转换为较低频率压扩增量调制码。

10. 发明授权

US3596267A Digital code converter for converting a delta modulation code to a different permutation code 失效
标题翻译：用于将DELTA调制代码转换为不同的代码代码的数字代码转换器
公开(公告)号：US3596267A
公开(公告)日：1971-07-27
申请号：US3596267D
申请日：1969-01-28
申请人： BELL TELEPHONE LABOR INC
发明人： GOODMAN DAVID J
IPC分类号： H03M7/32 , H03M7/00 , H03K13/32 , G06F5/00
CPC分类号： H03M7/3048
摘要： A delta modulation to other permutation code signal converter comprises a shift register and up-down counter in series. The counter produces a permutation code output indicative of the running history of the delta modulation input, while the shift register, through weighted coefficient multipliers, produces correction signals to reduce the noise content of the counter output.

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