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1. 发明授权

US09929738B2 Spectrally shaped random signal 有权
公开(公告)号：US09929738B2
公开(公告)日：2018-03-27
申请号：US15427737
申请日：2017-02-08
申请人： Infineon Technologies AG
发明人： Dietmar Straeussnigg
IPC分类号： H03M1/06 , H03M1/08 , H03K3/84
CPC分类号： H03M1/0854 , H03K3/84 , H03M1/0641 , H03M3/33 , H03M3/50
摘要： An apparatus (100) comprises a signal generator (101) that is set up to produce a digital random signal (191). The apparatus (100) also comprises at least one filter element (102, 121, 122) that is set up to apply a high pass filter and a low pass filter to the digital random signal (191) in order to produce a spectrally shaped random signal (112). The apparatus (100) also comprises a modulator (103) that is set up to apply the spectrally shaped random signal (192) as dither.

2. 发明申请

US20160182072A1 NOISE-SHAPING CIRCUIT, DIGITAL-TO-TIME CONVERTER, ANALOG-TO-DIGITAL CONVERTER, DIGITAL-TO-ANALOG CONVERTER FREQUENCY SYNTHESIZER, TRANSMITTER, RECEIVER, TRANSCEIVER, METHOD FOR SHAPING NOISE IN AN INPUT SIGNAL 有权
标题翻译：噪声形成电路，数字到时间转换器，模拟数字转换器，数字到模拟转换器频率合成器，发送器，接收器，收发器，在输入信号中形成噪声的方法
公开(公告)号：US20160182072A1
公开(公告)日：2016-06-23
申请号：US14856854
申请日：2015-09-17
申请人： Intel IP Corporation
发明人： Peter Preyler , Thomas Mayer , Stefan Tertinek
IPC分类号： H03M1/06 , H03L7/20 , H03M1/66
CPC分类号： H03L7/20 , H03L7/16 , H03L2207/50 , H03M3/33 , H03M3/436
摘要： A noise shaping circuit according to an example includes a forward signal path configured to generate an output signal based on an input signal, a feedback signal path configured to feed back a feedback signal based on the output signal to the forward signal path, and a dither generator configured to generate a dither signal and to couple the dither signal into the forward signal path to modify the input signal and into the feedback signal path. Employing a noise shaping circuit according to an example may improve an overall noise performance.
摘要翻译：根据示例的噪声整形电路包括被配置为基于输入信号生成输出信号的正向信号路径，被配置为基于输出信号将反馈信号反馈到前向信号路径的反馈信号路径，以及抖动发生器被配置为产生抖动信号并将抖动信号耦合到正向信号路径中以修改输入信号并进入反馈信号路径。使用根据示例的噪声整形电路可以提高整体噪声性能。

3. 发明申请

US20110037633A1 DELTA SIGMA-TYPE A/D CONVERTER 有权
标题翻译： DELTA SIGMA型A / D转换器
公开(公告)号：US20110037633A1
公开(公告)日：2011-02-17
申请号：US12911286
申请日：2010-10-25
申请人： Toshio KUMAMOTO , Takashi Okuda , Tatsuo Sengoku , Akira Kitaguchi
发明人： Toshio KUMAMOTO , Takashi Okuda , Tatsuo Sengoku , Akira Kitaguchi
IPC分类号： H03M1/20
CPC分类号： H03M3/328 , H03M3/33 , H03M3/43 , H03M3/452
摘要： There is provided a technique for reducing the adverse effect of idle tones in the channels in a ΔΣ-type A/D converter including a plurality of channels for converting analog input signals into digital signals. The ΔΣ-type A/D converter includes an L channel for converting a left analog input signal into a digital signal and an R channel for converting a right analog input signal into a digital signal. Each of the L channel and the R channel includes a DC dither circuit for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel and the R channel, DC addition voltages generated by DC dither circuits are different from each other.
摘要翻译：提供了一种用于减少包括用于将模拟输入信号转换为数字信号的多个通道的＆Dgr＆amp; S型A / D转换器中的通道中的空闲音调的不利影响的技术。＆amp; S＆amp; S型A / D转换器包括用于将左模拟输入信号转换为数字信号的L通道和用于将右模拟输入信号转换为数字信号的R通道。 L沟道和R沟道中的每一个包括用于产生用于移动空闲频率的频率的DC附加电压的DC抖动电路。在L沟道和R沟道中，由DC抖动电路产生的直流相加电压彼此不同。

4. 发明授权

US06768437B1 Switched voltage-mode dither signal generation for a sigma-delta modulator 有权
标题翻译：用于Σ-Δ调制器的开关电压模式抖动信号产生
公开(公告)号：US06768437B1
公开(公告)日：2004-07-27
申请号：US10603893
申请日：2003-06-24
申请人： Tarmo Ruotsalainen , Elvi Räisänen-Ruotsalainen , Vesa Korkala
发明人： Tarmo Ruotsalainen , Elvi Räisänen-Ruotsalainen , Vesa Korkala
IPC分类号： H03M300
CPC分类号： H03M3/33 , H03M3/43
摘要： A sigma-delta modulator (10) has an input node coupled to a first input of a loop filter (12); a quantizer (14) that has an input coupled to an output of the loop filter for receiving a differential input signal therefrom and a feedback path (18) coupled from an output of the quantizer to a second input of the loop filter. The quantizer input includes a first input signal transistor (14A) and a second input signal transistor (14B) having gates coupled to the differential input signal, a first set of transistors (M1a, . . . ,Mna) connected in parallel with the first input signal transistor (M0a), and a second set of transistors (M1b, . . . ,Mnb) connected in parallel with the second input signal transistor (M0b). A gate of each transistor of the first set of transistors is switchably coupled by a digital signal to either the input signal or to ground, and a gate of each transistor of the second set of dither transistors is switchably coupled by an inverted version of the digital signal to either the input signal or to ground. The digital signal is generated to have random or pseudo-random characteristics, such as by using a LFSR (20). The result is the creation of an imbalance in the quantizer input transistor structure that results in the generation of a noise signal that functions as a dither signal.
摘要翻译： Σ-Δ调制器（10）具有耦合到环路滤波器（12）的第一输入端的输入节点; 量化器（14），其具有耦合到环路滤波器的输出的输入，用于从其接收差分输入信号;以及反馈路径（18），其从量化器的输出耦合到环路滤波器的第二输入端。量化器输入包括具有耦合到差分输入信号的栅极的第一输入信号晶体管（14A）和第二输入信号晶体管（14B），第一组晶体管（M1a，...，Mna）与第一输入信号晶体管（M0a）和与第二输入信号晶体管（M0b）并联连接的第二组晶体管（M1b，...，Mnb）。第一组晶体管的每个晶体管的栅极通过数字信号可切换地耦合到输入信号或接地，并且第二组抖动晶体管的每个晶体管的栅极通过数字的反向版本可切换地耦合信号到输入信号或接地。产生数字信号以具有随机或伪随机特性，例如通过使用LFSR（20）。结果是在量化器输入晶体管结构中产生不平衡，导致产生用作抖动信号的噪声信号。

5. 发明授权

US5889482A Analog-to-digital converter using dither and method for converting analog signals to digital signals 失效
标题翻译：使用抖动的模数转换器和将模拟信号转换为数字信号的方法
公开(公告)号：US5889482A
公开(公告)日：1999-03-30
申请号：US944639
申请日：1997-10-06
申请人： Michael Zarubinsky , Yachin Afek , Vladimir Koifman
发明人： Michael Zarubinsky , Yachin Afek , Vladimir Koifman
IPC分类号： H03M3/02 , H03M1/20
CPC分类号： H03M3/33 , H03M3/458
摘要： An analog-to-digital converter (100) has a first path (110) with a first sigma-delta modulator (114) which transforms an analog input signal X.sub.0 (111') from an input terminal (101) to a digital output signal Y.sub.0 at an output terminal (102). In a second path (120), a digital dither signal D (121') is combined with a digital intermediate signal Z.sub.0 (115') from the first modulator (114) and digitally processed by a second sigma-delta modulator (124) to an intermediate signal Y.sub.1 (125') Y.sub.1 is fed to the first modulator (114) and to the output terminal (102) with opposite sign ("+" and "-", respectively). Thereby, multipliers (133 and 127) attenuate Y.sub.1. The dither signal D (121') is used substantially only within the converter (100), and is substantially canceled before the output terminal (102). This features preserve a high SNR of the converter (100) and low spectral tones in output signal Y.sub.0.
摘要翻译：模拟 - 数字转换器（100）具有第一路径（110），其具有将来自输入端（101）的模拟输入信号X0（111'）变换成数字输出信号的第一Σ-Δ调制器（114） Y0在输出端子（102）处。在第二路径（120）中，将数字抖动信号D（121'）与来自第一调制器（114）的数字中间信号Z0（115'）组合并由第二Σ-Δ调制器（124）进行数字处理，中间信号Y1（125'）Y1以相反的符号（分别为“+”和“ - ”）馈送到第一调制器（114）和输出端子（102）。由此，乘法器（133和127）衰减Y1。抖动信号D（121'）基本上仅在转换器（100）内使用，并且在输出端（102）之前基本上被消除。这特征保留了转换器（100）的高SNR和输出信号Y0中的低频谱。

6. 发明申请

US20190123753A1 Method and Device for Signal Converting 审中-公开
公开(公告)号：US20190123753A1
公开(公告)日：2019-04-25
申请号：US16164015
申请日：2018-10-18
申请人： Infineon Technologies AG
发明人： Dietmar Straeussnigg
IPC分类号： H03M1/20 , H03M1/12 , H03M1/18
CPC分类号： H03M1/201 , H03M1/1245 , H03M1/18 , H03M3/33 , H03M3/468
摘要： In accordance with an embodiment, a method includes adding a dither signal to a first signal to generate a second signal, subtracting the dither signal from the first signal or subtracting the first signal from the dither signal to generate a third signal, performing a first sigma delta conversion of the second signal to a digital fourth signal, performing a second signal delta conversion of the third signal to a digital fifth signal, combining the digital fourth signal and the digital fifth signal to form a digital sixth signal.

7. 发明申请

US20170257108A1 Spectrally shaped random signal 有权
公开(公告)号：US20170257108A1
公开(公告)日：2017-09-07
申请号：US15427737
申请日：2017-02-08
申请人： Infineon Technologies AG
发明人： Dietmar Straeussnigg
IPC分类号： H03M1/08 , H03K3/84
CPC分类号： H03M1/0854 , H03K3/84 , H03M1/0641 , H03M3/33 , H03M3/50
摘要： An apparatus (100) comprises a signal generator (101) that is set up to produce a digital random signal (191). The apparatus (100) also comprises at least one filter element (102, 121, 122) that is set up to apply a high pass filter and a low pass filter to the digital random signal (191) in order to produce a spectrally shaped random signal (112). The apparatus (100) also comprises a modulator (103) that is set up to apply the spectrally shaped random signal (192) as dither.

8. 发明授权

US09584153B2 Efficient dithering technique for sigma-delta analog-to-digital converters 有权
标题翻译：用于Σ-Δ模数转换器的高效抖动技术
公开(公告)号：US09584153B2
公开(公告)日：2017-02-28
申请号：US14594388
申请日：2015-01-12
申请人： Microchip Technology Incorporated
发明人： Vincent Quiquempoix
IPC分类号： H03M1/20 , H03M3/00 , H03M1/06 , H03M1/66 , H03M1/36
CPC分类号： H03M3/33 , H03M1/0641 , H03M1/361 , H03M1/66 , H03M3/424
摘要： A sigma-delta analog to digital converter (ADC) includes an M-bit digital-to-analog converter (DAC); a loop filter coupled to receive an output from DAC; and a variable level quantizer configured to provide a uniform quantization function by switching between an N-level quantizer function and an N−1 level quantizer function.
摘要翻译： Σ-Δ模数转换器（ADC）包括M位数模转换器（DAC）; 耦合以接收DAC的输出的环路滤波器; 以及可变电平量化器，被配置为通过在N电平量化器功能和N-1电平量化器功能之间切换来提供均匀的量化功能。

9. 发明申请

US20110169672A1 METHOD AND APPARATUS FOR DITHERING IN MULTI-BIT SIGMA-DELTA DIGITAL-TO-ANALOG CONVERTERS 有权
标题翻译：用于多位数字数字转换器的方法和装置
公开(公告)号：US20110169672A1
公开(公告)日：2011-07-14
申请号：US13071269
申请日：2011-03-24
申请人： Philippe Deval , Vincent Quiquempoix , Alexandre Barreto
发明人： Philippe Deval , Vincent Quiquempoix , Alexandre Barreto
IPC分类号： H03M1/20
CPC分类号： H03M3/33 , H03M3/424
摘要： A multi-bit (M-bit, M>1) Sigma-Delta digital-to-analog converter (DAC) with a variable resolution multi-bit quantizer that has its digital value inputs that are truncated or rounded to a resolution that follows a random or pseudo-random sequence to provide automatic dynamic dithering for removing undesired idle tones in the analog output of the Sigma-Delta DAC. Random numbers N(n) between 1 and M are provided, and M-N(n) least significant bits in each M-bit digital value at the output of the quantizer are forced to zero with a digital truncator or rounder. The random numbers N(n) may be provided by a random or pseudo-random sequence generator, e.g., Galois linear feedback shift register in combination with digital comparators and an adder.
摘要翻译：具有可变分辨率多位量化器的多位（M位，M> 1）Σ-Delta数模转换器（DAC），其数字值输入被截断或舍入为一个分辨率随机或伪随机序列，以提供自动动态抖动，以消除Sigma-Delta DAC的模拟输出中的不需要的空闲音调。提供1和M之间的随机数N（n），并且量化器的输出处的每个M位数字值中的M-N（n）个最低有效位用数字截断器或舍入器强制为零。随机数N（n）可以由随机或伪随机序列发生器提供，例如与数字比较器和加法器结合的Galois线性反馈移位寄存器。

10. 发明申请

US20100103013A1 Method and Apparatus for Dithering in Multi-Bit Sigma-Delta Digital-to-Analog Converters 有权
标题翻译：用于多位Σ-Delta数模转换器抖动的方法和装置
公开(公告)号：US20100103013A1
公开(公告)日：2010-04-29
申请号：US12571892
申请日：2009-10-01
申请人： Philippe Deval , Vincent Quiquempoix , Alexandre Barreto
发明人： Philippe Deval , Vincent Quiquempoix , Alexandre Barreto
IPC分类号： H03M3/00 , H03M1/66
CPC分类号： H03M3/33 , H03M3/424
摘要： A multi-bit (M-bit, M>1) Sigma-Delta digital-to-analog converter (DAC) with a variable resolution multi-bit quantizer that has its digital value inputs that are truncated or rounded to a resolution that follows a random or pseudo-random sequence to provide automatic dynamic dithering for removing undesired idle tones in the analog output of the Sigma-Delta DAC. Random numbers N(n) between 1 and M are provided, and M−N(n) least significant bits in each M-bit digital value at the output of the quantizer are forced to zero with a digital truncator or rounder. The random numbers N(n) may be provided by a random or pseudo-random sequence generator, e.g., Galois linear feedback shift register in combination with digital comparators and an adder.
摘要翻译：具有可变分辨率多位量化器的多位（M位，M> 1）Σ-Delta数模转换器（DAC），其数字值输入被截断或舍入为一个分辨率随机或伪随机序列，以提供自动动态抖动，以消除Sigma-Delta DAC的模拟输出中的不需要的空闲音调。提供1和M之间的随机数N（n），并且量化器的输出处的每个M位数字值中的M-N（n）个最低有效位用数字截断器或舍入器强制为零。随机数N（n）可以由随机或伪随机序列发生器提供，例如与数字比较器和加法器结合的Galois线性反馈移位寄存器。

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