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    • 3. 发明授权
    • Operational amplifier
    • 运算放大器
    • US5515003A
    • 1996-05-07
    • US383366
    • 1995-02-03
    • Hiroshi Kimura
    • Hiroshi Kimura
    • H03F3/45
    • H03F3/45179H03F3/45183H03F3/45192H03F3/45654H03F3/45708H03F3/45717H03F2203/45014H03F2203/45072H03F2203/45078H03F2203/45406H03F2203/45408H03F2203/45414
    • This invention discloses a high-slew-rate CMOS operational amplifier. This operational amplifier has a differential input stage formed by first and second transistors of the NMOS type connected together source-to-source and a first constant-current source. The first constant-current source is formed by an NMOS transistor coupled to the sources of the first and second transistors. The gates of third, fourth, and fifth transistors are respectively fed V.sub.in+, V.sub.in-, and the source voltage of the first and second transistors. A second constant-current source, formed by a PMOS transistor, applies a bias current to the sources of the third, fourth, and fifth transistors. In the steady state (i.e., V.sub.in+ =V.sub.in -), all the bias current from the second constant-current source flows into the fifth transistor. As a result, the third and fourth transistors are cut off, whereupon the differential input stage is biased by a given bias-current from the first constant-current source. If V.sub.in+ rises higher than V.sub.in-, this increases the source voltage of the first and second transistors. As a result, the fifth transistor is cut off, and the bias current of the second constant-current source comes to flow into the fourth transistor. A current proportional to the current flowing in the fourth transistor is added by a current mirror circuit of plural NMOS transistors to the current of the first constant-current source, whereupon the bias current of the differential input stage is increased.
    • 本发明公开了一种高速率CMOS运算放大器。 该运算放大器具有由连接在源极到源极和第一恒定电流源的NMOS型的第一和第二晶体管形成的差分输入级。 第一恒流源由耦合到第一和第二晶体管的源极的NMOS晶体管形成。 第三,第四和第五晶体管的栅极分别馈入Vin +,Vin-和第一和第二晶体管的源极电压。 由PMOS晶体管形成的第二恒流源对第三,第四和第五晶体管的源极施加偏置电流。 在稳定状态(即Vin + = Vin - )时,来自第二恒定电流源的所有偏置电流流入第五晶体管。 结果,第三和第四晶体管被切断,于是差分输入级被来自第一恒定电流源的给定偏置电流偏置。 如果Vin +上升到高于Vin-,则这增加了第一和第二晶体管的源极电压。 结果,第五晶体管截止,第二恒流源的偏置电流流入第四晶体管。 与在第四晶体管中流动的电流成比例的电流由多个NMOS晶体管的电流镜电路加到第一恒流源的电流,于是差分输入级的偏置电流增加。
    • 4. 发明授权
    • CMOS variable gain amplifier
    • CMOS可变增益放大器
    • US08102209B2
    • 2012-01-24
    • US12878307
    • 2010-09-09
    • Seunghyun JangKwang-Chun Lee
    • Seunghyun JangKwang-Chun Lee
    • H03F3/45
    • H03G1/0029H03F3/45188H03F3/4565H03F2203/45074H03F2203/45082H03F2203/45302H03F2203/45414H03G7/001
    • A complementary metal-oxide semiconductor (CMOS) variable gain amplifier includes: a cascode amplifier including a common source field effect transistor and a common gate field effect transistor in a cascode structure; a first current generation unit connected in parallel to a drain of the common gate field effect transistor and configured to vary transconductance of the cascode amplifier; a second current generation unit connected to a common source of the cascode amplifier and configured to control a bias current of the cascode amplifier; a current control unit configured to generate a current control signal for the first and second current generation units; and a load stage connected in series to a drain of the cascode amplifier and configured to output an output current, which is varied by the overall transconductance of the cascode amplifier, as a differential output voltage.
    • 互补金属氧化物半导体(CMOS)可变增益放大器包括:共源共栅放大器,包括共源极场效应晶体管和共栅型场效应晶体管; 与公共栅极场效应晶体管的漏极并联连接并被配置为改变共源共栅放大器的跨导的第一电流产生单元; 连接到所述共射共基放大器的共同源并被配置为控制所述共源共栅放大器的偏置电流的第二电流产生单元; 电流控制单元,被配置为产生用于所述第一和第二电流产生单元的电流控制信号; 以及与串联放大器的漏极串联连接的负载级,其被配置为输出由串联放大器的整个跨导变化的输出电流作为差分输出电压。
    • 5. 发明申请
    • CMOS VARIABLE GAIN AMPLIFIER
    • CMOS可变增益放大器
    • US20110063030A1
    • 2011-03-17
    • US12878307
    • 2010-09-09
    • Seunghyun JANGKwang-Chun Lee
    • Seunghyun JANGKwang-Chun Lee
    • H03G3/30H03F3/45H03F1/22
    • H03G1/0029H03F3/45188H03F3/4565H03F2203/45074H03F2203/45082H03F2203/45302H03F2203/45414H03G7/001
    • A complementary metal-oxide semiconductor (CMOS) variable gain amplifier includes: a cascode amplifier including a common source field effect transistor and a common gate field effect transistor in a cascode structure; a first current generation unit connected in parallel to a drain of the common gate field effect transistor and configured to vary transconductance of the cascode amplifier; a second current generation unit connected to a common source of the cascode amplifier and configured to control a bias current of the cascode amplifier; a current control unit configured to generate a current control signal for the first and second current generation units; and a load stage connected in series to a drain of the cascode amplifier and configured to output an output current, which is varied by the overall transconductance of the cascode amplifier, as a differential output voltage.
    • 互补金属氧化物半导体(CMOS)可变增益放大器包括:共源共栅放大器,包括共源极场效应晶体管和共栅型场效应晶体管; 与公共栅极场效应晶体管的漏极并联连接并被配置为改变共源共栅放大器的跨导的第一电流产生单元; 连接到所述共射共基放大器的共同源并被配置为控制所述共源共栅放大器的偏置电流的第二电流产生单元; 电流控制单元,被配置为产生用于所述第一和第二电流产生单元的电流控制信号; 以及与串联放大器的漏极串联连接的负载级,其被配置为输出由串联放大器的整个跨导变化的输出电流作为差分输出电压。