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    • 3. 发明授权
    • Multipinned phase charge-coupled device
    • 多相电荷耦合器件
    • US4963952A
    • 1990-10-16
    • US321739
    • 1989-03-10
    • James R. Janesick
    • James R. Janesick
    • H01L27/148H01L29/768
    • H01L29/76858H01L27/1464H01L27/14831
    • A back illuminated, buried channel, multiphase charge-coupled device for imaging has a photosensitive volume bounded by silicon dioxide layers on both the front and back. The dark noise generated by these interfaces with the photosensitive volume is reduced by negative bias potential pinning the front at about -6V and the back at about -0.4V. To create fixed barrier phases at the front for accumulation within each pixel comprised of multiphase gates, positive ions are implanted at one phase gate while the others are phase clocked into channel inversion. Otherwise the phase clock of at least one gate must be controlled to provide accumulation to provide a "partial-inversion" technique. The negative bias at the back may be varied to adjust the quantum efficiency of the device, thus providing electronic shuttering.
    • 用于成像的背照明,埋入通道,多相电荷耦合器件具有在前面和后面由二氧化硅层界定的感光体。 由这些接口与感光体积产生的暗噪声通过负偏置电位减小,前置电压约为-6V,背面约为-0.4V。 为了在由多相门组成的每个像素内的前端产生固定的屏障相,在一个相位栅极处注入正离子,而另一个相位被时钟转换成沟道反转。 否则,必须控制至少一个栅极的相位时钟以提供积累以提供“部分反转”技术。 可以改变背面的负偏压以调节器件的量子效率,从而提供电子快门。
    • 6. 发明授权
    • Multidirectional transfer charge-coupled device
    • 多向传输电荷耦合器件
    • US5760431A
    • 1998-06-02
    • US708610
    • 1996-09-05
    • Eugene D. SavoyeBarry E. BurkeJohn Tonry
    • Eugene D. SavoyeBarry E. BurkeJohn Tonry
    • H01L27/148H01L29/10H01L29/768
    • H01L29/76858H01L27/1464H01L27/14831H01L29/1062
    • A multidirectional charge transfer device configured in a charge storage medium. The device includes an array of charge storage regions. Each of said charge storage regions includes a plurality of first gates, each of which is arranged in a first portion of each charge storage region, a plurality of second gates, each of which is arranged in a second portion of each charge storage region, a plurality of third gates, each of which is arranged in a third portion of each charge storage region, and a plurality of fourth gates, each of which is arranged in a fourth portion of each charge storage region. The plurality of gates and charge storage regions are configured to define at least three bidirectional charge transfer paths which are noncollinear with respect to each other. The plurality of gates are sequentially biased to establish charge transfer along one of said bidirectional charge transfer paths and forming blocking potentials to charge transfer in the remaining charge transfer paths.
    • 一种配置在电荷存储介质中的多向电荷转移装置。 该装置包括电荷存储区域的阵列。 每个所述电荷存储区域包括多个第一栅极,每个第一栅极布置在每个电荷存储区域的第一部分中,多个第二栅极,每个第二栅极布置在每个电荷存储区域的第二部分中, 多个第三栅极,每个第三栅极布置在每个电荷存储区域的第三部分中,以及多个第四栅极,每个栅极布置在每个电荷存储区域的第四部分中。 多个栅极和电荷存储区被配置为限定相对于彼此非共线的至少三个双向电荷传输路径。 多个栅极被顺序地偏置以沿着所述双向电荷转移路径之一建立电荷转移,并形成阻挡电位以在剩余电荷转移路径中进行电荷转移。
    • 10. 发明授权
    • Charge-coupled device having channel region with alternately changing
potential in a direction perpendicular to charge transfer
    • 电荷耦合器件具有在垂直于电荷转移的方向上具有交替变化的电位的沟道区
    • US4809048A
    • 1989-02-28
    • US013189
    • 1987-02-09
    • Masafumi KimataNatsuro Tsubouchi
    • Masafumi KimataNatsuro Tsubouchi
    • H01L29/772H01L21/339H01L27/148H01L29/10H01L29/423H01L29/76H01L29/762H01L29/768H01L29/78G11C19/28
    • H01L29/42396H01L29/1062H01L29/76858
    • A charge-coupled device comprises a p type silicon substrate (130), a plurality of n type impurity regions (121) of a high impurity concentration, a plurality of n type impurity regions (140) of a low impurity concentration, a silicon oxide film (150) for defining a channel region (10), a gate oxide film (110), a plurality of gate electrodes (21, 31, 41, 51, 22, 32, 42 and 52) and clock bus lines (70, 80, 90 and 100) for applying a clock signal to the respective gate electrodes. The n type impurity regions (121) and (140) are formed alternately in the channel region (10) along a direction perpendicular to the charge transfer direction, whereby the potential in the channel region (10) changes in the above described perpendicular direction. The change of the potential causes a strong electric field in the channel region (10) in the above described perpendicular direction, which serves to prevent carriers from freezing to an impurity level at a low temperature. Thus, the transfer efficiency of carriers is improved.
    • 电荷耦合器件包括ap型硅衬底(130),杂质浓度高的多个n型杂质区(121),杂质浓度低的多个n型杂质区(140),氧化硅膜 (150),用于限定沟道区(10),栅极氧化膜(110),多个栅电极(21,31,41,51,22,32,32和52)和时钟总线(70,80) ,90和100),用于将时钟信号施加到各个栅电极。 n型杂质区域(121)和(140)沿着与电荷传输方向垂直的方向在沟道区域(10)中交替地形成,由此沟道区域(10)中的电位在上述垂直方向上变化。 电位的变化在上述垂直方向上在沟道区域(10)中产生强电场,其用于防止载流子在低温下冻结到杂质水平。 因此,载波的传送效率提高。