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    • 5. 发明授权
    • Reverse-conducting power semiconductor device
    • 反向导通功率半导体器件
    • US09385223B2
    • 2016-07-05
    • US14748774
    • 2015-06-24
    • ABB Technology AG
    • Munaf RahimoMartin ArnoldJan VobeckyUmamaheswara Vemulapati
    • H01L29/74H01L27/06H01L29/744
    • H01L29/7416H01L27/0664H01L29/744
    • A reverse-conducting power semiconductor device with a wafer has first and second main sides which are arranged opposite and parallel to each other. The device includes a plurality of diode cells and a plurality of gate commutated thyristors (GCT) cells. Each GCT cell includes layers of a first conductivity type (e.g., n-type) and a second conductivity type (e.g., p-type) between the first and second main sides. The device includes at least one mixed part in which diode anode layers of the diode cells alternate with first cathode layers of the GCT cells. In each diode cell, a diode buffer layer of the first conductivity type is arranged between the diode anode layer and a drift layer such that the diode buffer layer covers lateral sides of the diode anode layer from the first main side to a depth of approximately 90% of the thickness of the diode anode layer.
    • 具有晶片的反向导电功率半导体器件具有彼此相对并平行布置的第一和第二主侧面。 该器件包括多个二极管单元和多个栅极换向晶闸管(GCT)单元。 每个GCT单元包括在第一和第二主侧之间的第一导电类型(例如,n型)和第二导电类型(例如,p型)的层。 该器件包括至少一个混合部分,其中二极管单元的二极管阳极层与GCT单元的第一阴极层交替。 在每个二极管单元中,第二导电类型的二极管缓冲层布置在二极管阳极层和漂移层之间,使得二极管缓冲层覆盖二极管阳极层的从第一主侧到大约90度的深度的侧面 二极管阳极层的厚度的百分比。
    • 6. 发明授权
    • Bipolar non-punch-through power semiconductor device
    • 双极非穿通功率半导体器件
    • US08803192B2
    • 2014-08-12
    • US13850732
    • 2013-03-26
    • ABB Technology AG
    • Jan VobeckyMunaf Rahimo
    • H01L29/06H01L29/10H01L29/74
    • H01L29/74H01L29/0615H01L29/0619H01L29/0661H01L29/0834H01L29/102H01L29/66136H01L29/66363H01L29/8613
    • An exemplary bipolar non-punch-through power semiconductor device includes a semiconductor wafer and a first electrical contact on a first main side and a second electrical contact on a second main side. The wafer has an inner region with a wafer thickness and a termination region that surrounds the inner region, such that the wafer thickness is reduced at least on the first main side with a negative bevel. The semiconductor wafer has at least a two-layer structure with layers of different conductivity types, which can include a drift layer of a first conductivity type, a first layer of a second conductivity type at a first layer depth and directly connected to the drift layer on the first main side and contacting the first electrical contact, and a second layer of the second conductivity type arranged in the termination region on the first main side up to a second layer depth.
    • 示例性的双极非穿通功率半导体器件包括半导体晶片和第一主侧上的第一电触点和第二主侧上的第二电触点。 晶片具有晶片厚度的内部区域和围绕内部区域的终止区域,使得晶片厚度至少在第一主侧面上以负斜面减小。 半导体晶片具有至少具有不同导电类型的层的两层结构,其可以包括第一导电类型的漂移层,第一层深度处的第二导电类型的第一层并且直接连接到漂移层 在第一主侧并且接触第一电接触,以及布置在第一主侧上的端接区域中的第二导电类型的第二层直到第二层深度。
    • 7. 发明申请
    • BIPOLAR NON-PUNCH-THROUGH POWER SEMICONDUCTOR DEVICE
    • 双极非穿孔功率半导体器件
    • US20130207159A1
    • 2013-08-15
    • US13850732
    • 2013-03-26
    • ABB TECHNOLOGY AG
    • Jan VobeckyMunaf Rahimo
    • H01L29/74H01L29/66
    • H01L29/74H01L29/0615H01L29/0619H01L29/0661H01L29/0834H01L29/102H01L29/66136H01L29/66363H01L29/8613
    • An exemplary bipolar non-punch-through power semiconductor device includes a semiconductor wafer and a first electrical contact on a first main side and a second electrical contact on a second main side. The wafer has an inner region with a wafer thickness and a termination region that surrounds the inner region, such that the wafer thickness is reduced at least on the first main side with a negative bevel. The semiconductor wafer has at least a two-layer structure with layers of different conductivity types, which can include a drift layer of a first conductivity type, a first layer of a second conductivity type at a first layer depth and directly connected to the drift layer on the first main side and contacting the first electrical contact, and a second layer of the second conductivity type arranged in the termination region on the first main side up to a second layer depth.
    • 示例性的双极非穿通功率半导体器件包括半导体晶片和第一主侧上的第一电触点和第二主侧上的第二电触点。 晶片具有晶片厚度的内部区域和围绕内部区域的终止区域,使得晶片厚度至少在第一主侧面上以负斜面减小。 半导体晶片具有至少具有不同导电类型的层的两层结构,其可以包括第一导电类型的漂移层,第一层深度处的第二导电类型的第一层并且直接连接到漂移层 在第一主侧并且接触第一电接触,以及布置在第一主侧上的端接区域中的第二导电类型的第二层直到第二层深度。