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1. 发明申请

US20100327956A1 GRAPHENE DEVICE AND METHOD OF FABRICATING A GRAPHENE DEVICE 有权
标题翻译：石墨设备和制造石墨设备的方法
公开(公告)号：US20100327956A1
公开(公告)日：2010-12-30
申请号：US12495098
申请日：2009-06-30
申请人： Asta Maria Kärkkäinen , Samiul Md Haque , Alan Colli , Pirjo Marjaana Pasanen , Leo Mikko Johannes Kärkkäinen , Mikko Aleksi Uusitalo , Reijo Kalervo Lehtiniemi
发明人： Asta Maria Kärkkäinen , Samiul Md Haque , Alan Colli , Pirjo Marjaana Pasanen , Leo Mikko Johannes Kärkkäinen , Mikko Aleksi Uusitalo , Reijo Kalervo Lehtiniemi
IPC分类号： G11C5/14 , B32B9/00 , C01B31/04 , C23F1/00 , H01B5/00
CPC分类号： H01L29/1606 , B82Y10/00 , B82Y40/00 , H01L21/02527 , H01L21/02612 , H01L21/02664 , H01L21/0332 , H01L21/042 , H01L29/0673 , H01L29/45 , H01L29/66022 , H01L29/66439 , H01L29/775 , H01L29/7781 , H01L29/78684 , Y10T428/24058 , Y10T428/30
摘要： In accordance with an example embodiment of the present invention, a device comprising one or more porous graphene layers, the or each graphene porous layer comprising a multiplicity of pores. The device may form at least part of a flexible and/or stretchable, and or transparent electronic device.
摘要翻译：根据本发明的示例性实施例，包括一个或多个多孔石墨烯层的装置，所述或每个石墨烯多孔层包含多个孔。该装置可以形成柔性和/或可拉伸和/或透明电子装置的至少一部分。

2. 发明授权

US07172957B2 Method of fabricating n-type semiconductor diamond, and semiconductor diamond 有权
标题翻译：制造n型半导体金刚石和半导体金刚石的方法
公开(公告)号：US07172957B2
公开(公告)日：2007-02-06
申请号：US11013450
申请日：2004-12-17
申请人： Akihiko Namba , Takahiro Imai , Yoshiki Nishibayashi
发明人： Akihiko Namba , Takahiro Imai , Yoshiki Nishibayashi
IPC分类号： H01L21/44
CPC分类号： C30B25/02 , C30B29/04 , H01L21/02376 , H01L21/0243 , H01L21/02433 , H01L21/02444 , H01L21/02494 , H01L21/02527 , H01L21/02576 , H01L21/02587 , H01L21/02609 , H01L21/0262 , H01L21/02658 , H01L21/041 , H01L29/66022 , H01L29/66037
摘要： An n-type diamond epitaxial layer 20 is formed by processing a single-crystalline {100} diamond substrate 10 so as to form a {111} plane, and subsequently by causing diamond to epitaxially grow while n-doping the diamond {111} plane. Further, a combination of the n-type semiconductor diamond, p-type semiconductor diamond, and non-doped diamond, obtained in the above-described way, as well as the use of p-type single-crystalline {100} diamond substrate allow for a pn junction type, a pnp junction type, an npn junction type and a pin junction type semiconductor diamond to be obtained.
摘要翻译：通过处理单晶{100}金刚石衬底10以形成{111}面，然后通过使金刚石外延生长同时n掺杂金刚石{111}面而形成n型金刚石外延层20 。此外，以上述方式获得的n型半导体金刚石，p型半导体金刚石和非掺杂金刚石以及使用p型单晶{100}金刚石衬底的组合允许对于pn结型，pnp结型，npn结型和pin结型半导体金刚石。

3. 发明授权

US09087874B2 Methods of forming graphene-containing switches 有权
标题翻译：形成含石墨烯的开关的方法
公开(公告)号：US09087874B2
公开(公告)日：2015-07-21
申请号：US13763662
申请日：2013-02-09
申请人： Micron Technology, Inc.
发明人： Gurtej S. Sandhu
IPC分类号： H01L21/479 , H01L21/82 , H01L21/332 , H01L21/768 , H01L29/16 , H01L29/786 , H01L29/66 , H01L29/778 , H01L23/525 , H01L23/532 , H01L29/06
CPC分类号： H01L21/768 , H01L23/525 , H01L23/53276 , H01L29/0665 , H01L29/0676 , H01L29/1606 , H01L29/66022 , H01L29/66742 , H01L29/7788 , H01L29/78642 , H01L29/78684 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include methods of forming graphene-containing switches. A bottom electrode may be formed over a base, and a first electrically conductive structure may be formed to extend upwardly from the bottom electrode. Dielectric material may be formed along a sidewall of the first electrically conductive structure, while leaving a portion of the bottom electrode exposed. A graphene structure may be formed to be electrically coupled with the exposed portion of the bottom electrode. A second electrically conductive structure may be formed on an opposing side of the graphene structure from the first electrically conductive structure. A top electrode may be formed over the graphene structure and electrically coupled with the second electrically conductive structure. The first and second electrically conductive structures may be configured to provide an electric field across the graphene structure.
摘要翻译：一些实施方案包括形成含石墨烯的开关的方法。底部电极可以形成在基底上，并且第一导电结构可以形成为从底部电极向上延伸。电介质材料可沿着第一导电结构的侧壁形成，同时使底部电极的一部分露出。石墨烯结构可以形成为与底部电极的暴露部分电耦合。可以在石墨烯结构的与第一导电结构相对的一侧上形成第二导电结构。顶部电极可以形成在石墨烯结构之上并与第二导电结构电耦合。第一和第二导电结构可以被配置为提供跨越石墨烯结构的电场。

4. 发明授权

US09024288B2 Array substrate and manufacturing method thereof, display device 有权
标题翻译：阵列基板及其制造方法，显示装置
公开(公告)号：US09024288B2
公开(公告)日：2015-05-05
申请号：US14041151
申请日：2013-09-30
申请人： BOE Technology Group Co., Ltd.
发明人： Tuo Sun
IPC分类号： H01L29/06 , H01L47/00 , H01L29/04 , H01L29/10 , H01L31/00 , H01L27/14 , H01L29/00 , H01L29/15 , H01L29/18 , H01L33/00 , H01L29/20 , H01L27/146 , H01L21/00 , H01L21/82 , H01L21/84 , H01L21/3205 , H01L21/4763 , H01L21/77
CPC分类号： H01L33/0041 , H01L21/77 , H01L29/66022 , H01L29/78603 , H01L29/78606 , H01L29/78684 , Y10S257/911 , Y10S438/982
摘要： Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.
摘要翻译：本发明的实施例提供阵列基板，其制造方法和显示装置。阵列基板的制造方法，包括：通过第一图案化工艺在基底基板上形成栅电极，然后在形成有栅电极的基底基板上沉积栅极绝缘层; 通过第二图案化工艺在上述步骤之后获得的基底基板上形成源极和漏极; 通过第三图案化工艺在由上述步骤获得的基底基板上形成由石墨烯层形成的有源层和设置在有源层上的保护层; 以及在上述步骤之后通过第四图案化工艺在基底基板上形成平坦化层，其中平坦化层设置有暴露源极或漏极的通孔。

5. 发明申请

US20130157420A1 Methods of Forming Graphene-Containing Switches 有权
标题翻译：形成含石墨烯的开关的方法
公开(公告)号：US20130157420A1
公开(公告)日：2013-06-20
申请号：US13763662
申请日：2013-02-09
申请人： Micron Technology, Inc.
发明人： Gurtej S. Sandhu
IPC分类号： H01L21/768
CPC分类号： H01L21/768 , H01L23/525 , H01L23/53276 , H01L29/0665 , H01L29/0676 , H01L29/1606 , H01L29/66022 , H01L29/66742 , H01L29/7788 , H01L29/78642 , H01L29/78684 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include methods of forming graphene-containing switches. A bottom electrode may be formed over a base, and a first electrically conductive structure may be formed to extend upwardly from the bottom electrode. Dielectric material may be formed along a sidewall of the first electrically conductive structure, while leaving a portion of the bottom electrode exposed. A graphene structure may be formed to be electrically coupled with the exposed portion of the bottom electrode. A second electrically conductive structure may be formed on an opposing side of the graphene structure from the first electrically conductive structure. A top electrode may be formed over the graphene structure and electrically coupled with the second electrically conductive structure. The first and second electrically conductive structures may be configured to provide an electric field across the graphene structure.
摘要翻译：一些实施方案包括形成含石墨烯的开关的方法。底部电极可以形成在基底上，并且第一导电结构可以形成为从底部电极向上延伸。电介质材料可沿着第一导电结构的侧壁形成，同时使底部电极的一部分露出。石墨烯结构可以形成为与底部电极的暴露部分电耦合。可以在石墨烯结构的与第一导电结构相对的一侧上形成第二导电结构。顶部电极可以形成在石墨烯结构之上并与第二导电结构电耦合。第一和第二导电结构可以被配置为提供跨越石墨烯结构的电场。

6. 发明申请

US20180151687A1 APPARATUS AND METHOD OF FABRICATING LIGHTING APPARATUS USING ORGANIC LIGHT EMITTING DEVICE 审中-公开
公开(公告)号：US20180151687A1
公开(公告)日：2018-05-31
申请号：US15687053
申请日：2017-08-25
申请人： LG Display Co., Ltd.
发明人： Namkook KIM , Jejun PARK , Seunglyul LEE , Taejoon SONG , Shinbok LEE , Kyunghoon LEE
IPC分类号： H01L29/66 , H01L21/027
CPC分类号： H01L29/66022 , H01L21/0271 , H01L51/0011 , H01L51/0031 , H01L2221/1068 , H01L2221/68381 , H01L2251/562 , Y02E10/549
摘要： A film having a plurality of lighting devices thereon is transferred between a film supplying roll and a film collecting roll, and an organic light emitting layer and a second electrode are formed on the film being transferred from a deposition unit. An aging unit is provided on a rear end of the deposition unit, and applies an aging voltage to the film transferred after the organic light emitting layer is deposited by the deposition unit, thereby aging the organic light emitting layer.

7. 发明申请

US20150287787A1 Graphene Device And Method Of Fabricating A Graphene Device 审中-公开
标题翻译：石墨烯装置及制造石墨烯装置的方法
公开(公告)号：US20150287787A1
公开(公告)日：2015-10-08
申请号：US14686966
申请日：2015-04-15
申请人： Nokia Technologies Oy
发明人： Asta Maria Karkkainen , Samiul Md Haque , Alan Colli , Pirjo Marjaana Pasanen , Leo Mikko Karkkainen , Mikko Aleksi Uusitalo , Reijo Kalervo Lehtiniemi
IPC分类号： H01L29/16 , H01L21/033 , H01L21/04 , H01L29/45 , H01L29/66
CPC分类号： H01L29/1606 , B82Y10/00 , B82Y40/00 , H01L21/02527 , H01L21/02612 , H01L21/02664 , H01L21/0332 , H01L21/042 , H01L29/0673 , H01L29/45 , H01L29/66022 , H01L29/66439 , H01L29/775 , H01L29/7781 , H01L29/78684 , Y10T428/24058 , Y10T428/30
摘要： In accordance with an example embodiment of the present invention, a device comprising one or more porous graphene layers, the or each graphene porous layer comprising a multiplicity of pores. The device may form at least part of a flexible and/or stretchable, and or transparent electronic device.
摘要翻译：根据本发明的示例性实施例，包括一个或多个多孔石墨烯层的装置，所述或每个石墨烯多孔层包含多个孔。该装置可以形成柔性和/或可拉伸和/或透明电子装置的至少一部分。

8. 发明申请

US20140061670A1 WIDE GAP SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：宽带半导体器件及其制造方法
公开(公告)号：US20140061670A1
公开(公告)日：2014-03-06
申请号：US13947765
申请日：2013-07-22
申请人： Sumitomo Electric Industries, Ltd.
发明人： Keiji Wada , Kenji Kanbara
IPC分类号： H01L29/872 , H01L29/66
CPC分类号： H01L29/872 , H01L21/0495 , H01L29/0619 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/66022 , H01L29/6603 , H01L29/6606 , H01L29/66143 , H01L29/66212
摘要： A wide gap semiconductor device has a substrate and a Schottky electrode. The substrate is made of a wide gap semiconductor material and has a first conductivity type. The Schottky electrode is arranged on the substrate to be in contact therewith and is made of a single material. The Schottky electrode includes a first region having a first barrier height and a second region having a second barrier height higher than the first barrier height. The second region includes an outer peripheral portion of the Schottky electrode. Thus, a wide gap semiconductor device capable of achieving less leakage current and a method for manufacturing the same can be provided.
摘要翻译：宽间隙半导体器件具有衬底和肖特基电极。衬底由宽间隙半导体材料制成并具有第一导电类型。肖特基电极布置在基板上以与其接触并由单一材料制成。肖特基电极包括具有第一势垒高度的第一区域和具有高于第一势垒高度的第二势垒高度的第二区域。第二区域包括肖特基电极的外周部分。因此，可以提供能够实现较少漏电流的宽间隙半导体器件及其制造方法。

9. 发明申请

US20050202665A1 Method of fabricating n-type semiconductor diamond, and semiconductor diamond 有权
标题翻译：制造n型半导体金刚石和半导体金刚石的方法
公开(公告)号：US20050202665A1
公开(公告)日：2005-09-15
申请号：US11013450
申请日：2004-12-17
申请人： Akihiko Namba , Takahiro Imai , Yoshiki Nishibayashi
发明人： Akihiko Namba , Takahiro Imai , Yoshiki Nishibayashi
IPC分类号： C30B25/02 , C30B29/04 , H01L21/04 , H01L21/20 , H01L21/205 , H01L21/44
CPC分类号： C30B25/02 , C30B29/04 , H01L21/02376 , H01L21/0243 , H01L21/02433 , H01L21/02444 , H01L21/02494 , H01L21/02527 , H01L21/02576 , H01L21/02587 , H01L21/02609 , H01L21/0262 , H01L21/02658 , H01L21/041 , H01L29/66022 , H01L29/66037
摘要： An n-type diamond epitaxial layer 20 is formed by processing a single-crystalline {100} diamond substrate 10 so as to form a {111} plane, and subsequently by causing diamond to epitaxially grow while n-doping the diamond {111} plane. Further, a combination of the n-type semiconductor diamond, p-type semiconductor diamond, and non-doped diamond, obtained in the above-described way, as well as the use of p-type single-crystalline {100} diamond substrate allow for a pn junction type, a pnp junction type, an npn junction type and a pin junction type semiconductor diamond to be obtained.
摘要翻译：通过处理单晶{100}金刚石衬底10以形成{111}面，然后通过使金刚石外延生长同时n掺杂金刚石{111}面而形成n型金刚石外延层20 。此外，以上述方式获得的n型半导体金刚石，p型半导体金刚石和非掺杂金刚石以及使用p型单晶{100}金刚石衬底的组合允许对于pn结型，pnp结型，npn结型和pin结型半导体金刚石。

10. 发明申请

US20190006468A1 APPROACH TO PREVENTING ATOMIC DIFFUSION AND PRESERVING ELECTRICAL CONDUCTION USING TWO DIMENSIONAL CRYSTALS AND SELECTIVE ATOMIC LAYER DEPOSITION 审中-公开
公开(公告)号：US20190006468A1
公开(公告)日：2019-01-03
申请号：US16100422
申请日：2018-08-10
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Priscilla D. Antunez , Damon B. Farmer
IPC分类号： H01L29/15 , H01L21/02
CPC分类号： H01L29/66015 , B32B9/007 , H01L21/02444 , H01L21/02458 , H01L21/02485 , H01L21/02499 , H01L29/1606 , H01L29/66022 , H01L29/78
摘要： A method of restricting diffusion of miscible materials across a barrier, including, forming a 2-dimensional material on a substrate surface, wherein the 2-dimensional material includes one or more defects through which a portion of the substrate surface is exposed, forming a plug selectively on the exposed substrate surface, and forming a cover layer on the plug and 2-dimensional material, wherein the cover layer material is miscible in the substrate material.

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