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2. 发明授权

US09362381B2 Insulated gate bipolar transistor with a lateral gate structure and gallium nitride substrate and manufacturing method thereof 有权
标题翻译：具有横向栅极结构和氮化镓衬底的绝缘栅双极晶体管及其制造方法
公开(公告)号：US09362381B2
公开(公告)日：2016-06-07
申请号：US14971496
申请日：2015-12-16
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/66 , H01L29/73 , H01L29/10 , H01L29/20 , H01L29/201 , H01L27/07
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并且具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

3. 发明申请

US20160111519A1 INSULATED GATE BIPOLAR TRANSISTOR WITH A LATERAL GATE STRUCTURE AND GALLIUM NITRIDE SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：具有侧壁结构和氮化镓基板的绝缘栅双极晶体管及其制造方法
公开(公告)号：US20160111519A1
公开(公告)日：2016-04-21
申请号：US14971496
申请日：2015-12-16
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/66 , H01L27/07 , H01L29/201 , H01L29/10 , H01L29/20
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

4. 发明申请

US20160099240A1 INTEGRATED ELECTROSTATIC DISCHARGE (ESD) CLAMPING 有权
标题翻译：集成静电放电（ESD）钳位
公开(公告)号：US20160099240A1
公开(公告)日：2016-04-07
申请号：US14966688
申请日：2015-12-11
申请人： Weize Chen , Patrice M. Parris
发明人： Weize Chen , Patrice M. Parris
IPC分类号： H01L27/02 , H01L27/07 , H01L21/768 , H01L21/762 , H01L29/66 , H01L29/06
CPC分类号： H01L27/0259 , H01L21/76224 , H01L21/76895 , H01L27/027 , H01L27/0711 , H01L27/0722 , H01L29/0623 , H01L29/0649 , H01L29/0653 , H01L29/1083 , H01L29/1087 , H01L29/6625 , H01L29/66659 , H01L29/66681 , H01L29/78 , H01L29/7835
摘要： A method of fabricating a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device having a bipolar transistor for electrostatic discharge (ESD) protection includes doping a substrate to form a body region of the LDMOS transistor device in the substrate, the body region having a first conductivity type, forming a doped isolating region of the LDMOS transistor device in the substrate, the doped isolating region having a second conductivity type and surrounding a device area of the LDMOS transistor device in which the body region is disposed, forming a base contact region of the bipolar transistor, the base contact region being disposed within the body region and having the first conductivity type, and doping the substrate to form an isolation contact region for the doped isolating region that defines a collector region of the bipolar transistor, to form source and drain regions of the LDMOS transistor device in the substrate, and to form an emitter region of the bipolar transistor within the body region.
摘要翻译：制造具有用于静电放电（ESD）保护的双极型晶体管的横向扩散的金属氧化物半导体（LDMOS）晶体管器件的方法包括：掺杂衬底以在衬底中形成LDMOS晶体管器件的体区，所述体区具有第一导电类型，在衬底中形成LDMOS晶体管器件的掺杂隔离区域，掺杂隔离区域具有第二导电类型并围绕其中设置体区的LDMOS晶体管器件的器件区域，形成基极接触所述基极接触区域设置在所述主体区域内并且具有所述第一导电类型，并且掺杂所述衬底以形成用于限定所述双极晶体管的集电极区域的掺杂隔离区域的隔离接触区域，以形成所述双极晶体管的集电极区域在衬底中的LDMOS晶体管器件的源极和漏极区域，并且形成双极性tr的发射极区域体内区域内的电阻。

5. 发明授权

US09252219B2 Insulated gate bipolar transistor with a lateral gate structure and gallium nitride substrate 有权
标题翻译：具有横向栅极结构和氮化镓衬底的绝缘栅双极晶体管
公开(公告)号：US09252219B2
公开(公告)日：2016-02-02
申请号：US14464220
申请日：2014-08-20
申请人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
发明人： Chih-Fang Huang , Tsung-Yi Huang , Chien-Wei Chiu , Tsung-Yu Yang , Ting-Fu Chang , Tsung-Chieh Hsiao , Ya-Hsien Liu , Po-Chin Peng
IPC分类号： H01L29/73 , H01L29/66 , H01L29/20 , H01L29/423 , H01L29/778
CPC分类号： H01L29/66325 , H01L27/0722 , H01L29/1095 , H01L29/2003 , H01L29/201 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.
摘要翻译：本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极形成在GaN衬底上。第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。门具有在横向方向上与侧壁相邻的侧板以控制通道。

6. 发明授权

US08847276B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08847276B2
公开(公告)日：2014-09-30
申请号：US13805740
申请日：2011-06-29
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
IPC分类号： H01L29/739 , H01L27/07 , H01L29/66 , H01L29/861 , H01L29/06
CPC分类号： H01L27/0664 , H01L27/0722 , H01L29/0696 , H01L29/4236 , H01L29/66348 , H01L29/7395 , H01L29/7397 , H01L29/861
摘要： In a semiconductor device including an IGBT and a freewheeling diode (FWD), W1, W2, and W3 satisfy predetermined formulas. W1 denotes a distance from a boundary between a cathode region and a collector region to a position, where a peripheral-region-side end of the well layer is projected, on a back side of the drift layer. W2 denotes a distance from a boundary between the IGBT and the FWD in a base region to the peripheral-region-side end of the well layer. W3 denotes a distance from the boundary between the cathode region and the collector region to a position, where a boundary between the base region and the well layer is projected, on the back side.
摘要翻译：在包括IGBT和续流二极管（FWD）的半导体器件中，W1，W2和W3满足预定的公式。 W1表示从阴极区域和集电极区域之间的边界到阱层的周边区域侧端部投射在位于漂移层的背面的位置的距离。 W2表示从基极区域到阱区域的周边区域侧的IGBT与FWD之间的边界的距离。 W3表示从阴极区域和集电极区域之间的边界到背面侧的基底区域和阱层之间的边界的位置的距离。

7. 发明授权

US08093660B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08093660B2
公开(公告)日：2012-01-10
申请号：US12205973
申请日：2008-09-08
申请人： Tomohide Terashima
发明人： Tomohide Terashima
IPC分类号： H01L27/06
CPC分类号： H01L27/0722 , H01L27/0248 , H01L29/78 , H03K17/0406 , H03K17/567
摘要： A voltage mitigating element mitigating a voltage applied across a gate insulating film in an off state of an insulated gate bipolar transistor (IGBT) is arranged to a gate electrode node of a P-channel MOS transistor provided for suppressing flow-in of holes at the time of turn-off of the IGBT. Withstanding voltage characteristics are improved and an occupation area thereof is reduced while maintaining switching characteristics and a low on-resistance of an insulated gate bipolar transistor.
摘要翻译：在绝缘栅双极晶体管（IGBT）的截止状态下减轻施加在栅极绝缘膜上的电压的电压缓解元件被布置到P沟道MOS晶体管的栅电极节点，用于抑制在 IGBT关断时间。提高了耐电压特性，并且在保持绝缘栅双极晶体管的开关特性和低导通电阻的同时降低占用面积。

8. 发明授权

US07791077B2 Electronic device, display device, interface circuit and differential amplification device, which are constituted by using thin-film transistors 失效
标题翻译：电子装置，显示装置，接口电路和差分放大装置，由薄膜晶体管构成
公开(公告)号：US07791077B2
公开(公告)日：2010-09-07
申请号：US11834372
申请日：2007-08-06
申请人： Genshiro Kawachi
发明人： Genshiro Kawachi
IPC分类号： H01L27/08 , H01L29/04 , H01L29/76 , H01L31/036 , H01L31/112
CPC分类号： H01L27/1274 , G11C11/412 , H01L27/0722 , H01L27/1214 , H03F1/22 , H03F3/08 , H03F3/45089 , H03F3/45282 , H03F2200/534 , H03F2203/45024 , H03F2203/45032 , H03F2203/45371 , H03F2203/45702
摘要： An integrated circuit, which is configured such that a MOS transistor and a bipolar transistor are integrated at the same time, is formed on an insulating substrate which includes a display device. An electronic device or a display includes a plurality of semiconductor devices which are formed by using a semiconductor thin film and are formed in the semiconductor thin film that is provided on an insulating substrate and is crystallized in a predetermined direction. The plurality of semiconductor devices include a MOS transistor and at least either one of a lateral bipolar thin-film transistor and a MOS-bipolar hybrid thin film transistor.
摘要翻译：在包括显示装置的绝缘基板上形成集成了MOS晶体管和双极晶体管的集成电路。电子设备或显示器包括通过使用半导体薄膜形成并形成在设置在绝缘基板上并沿预定方向结晶的半导体薄膜中的多个半导体器件。多个半导体器件包括MOS晶体管和横向双极型薄膜晶体管和MOS双极性混合薄膜晶体管中的至少一个。

9. 发明申请

US20090256204A1 SOI TRANSISTOR WITH MERGED LATERAL BIPOLAR TRANSISTOR 失效
标题翻译：具有合并侧向双极晶体管的SOI晶体管
公开(公告)号：US20090256204A1
公开(公告)日：2009-10-15
申请号：US12099879
申请日：2008-04-09
申请人： Jin Cai , Jeffrey B. Johnson , Tak H. Ning , Robert R. Robison
发明人： Jin Cai , Jeffrey B. Johnson , Tak H. Ning , Robert R. Robison
IPC分类号： H01L29/786
CPC分类号： H01L29/78612 , H01L21/84 , H01L27/0722
摘要： A semiconductor-on-insulator transistor device includes a source region, a drain region, a body region, and a source-side lateral bipolar transistor. The source region has a first conductivity type. The body region has a second conductivity type and is positioned between the source region and the drain region. The source-side lateral bipolar transistor includes a base, a collector, and an emitter. A silicide region connects the base to the collector. The emitter is the body region. The collector has the second conductivity type, and the base is the source region and is positioned between the emitter and the collector.
摘要翻译：绝缘体上半导体晶体管器件包括源极区，漏极区，体区和源极横向双极晶体管。源区具有第一导电类型。体区具有第二导电类型并且位于源区和漏区之间。源极横向双极晶体管包括基极，集电极和发射极。硅化物区将基底连接到收集器。发射器是身体区域。集电体具有第二导电类型，基极是源极区，位于发射极和集电极之间。

10. 发明授权

US07489490B2 Current limiting MOSFET structure for solid state relays 有权
标题翻译：固态继电器的限流MOSFET结构
公开(公告)号：US07489490B2
公开(公告)日：2009-02-10
申请号：US11759354
申请日：2007-06-07
申请人： Maxime Zafrani
发明人： Maxime Zafrani
IPC分类号： H02H9/02 , G05F5/00 , H01L27/07
CPC分类号： H01L27/0722
摘要： A current-limiting circuit for limiting rising of a current above a predetermined level. The circuit including forward- and reverse-conducting devices, each device including a MOS and a bipolar transistor, wherein ON-resistance of one of the devices is used instead of a current-sensing resistance for another of the devices; and a gate driver connected to the gates of the forward- and reverse-conducting devices for controlling the devices such that a channel of each of the devices simultaneously conducts a current.
摘要翻译：一种用于限制电流上升超过预定电平的限流电路。该电路包括正向和反向传导器件，每个器件包括MOS和双极晶体管，其中使用一个器件的导通电阻代替另一个器件的电流检测电阻; 以及连接到正向和反向传导装置的栅极的栅极驱动器，用于控制装置，使得每个装置的通道同时导通电流。

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