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1. 发明申请

US20190139856A1 Ion-Implanted Thermal Barrier 审中-公开
公开(公告)号：US20190139856A1
公开(公告)日：2019-05-09
申请号：US16107470
申请日：2018-08-21
申请人： National Technology & Engineering Solutions of Sandia, LLC , University of Virginia Patent Foundation
发明人： Thomas Edwin Beechem, III , Khalid Mikhiel Hattar , Jon Ihlefeld , Edward S. Piekos , Douglas L. Medlin , Luke Yates , Patrick E. Hopkins
IPC分类号： H01L23/373 , H01L21/265
CPC分类号： H01L23/373 , H01L21/265 , H01L21/322 , H01L21/3223 , H01L23/34
摘要： Ion implantation can be used to define a thermal dissipation path that allows for better thermal isolation between devices in close proximity on a microelectronics chip, thus providing a means for higher device density combined with better performance.

2. 发明授权

US09748098B2 Controlled confined lateral III-V epitaxy 有权
公开(公告)号：US09748098B2
公开(公告)日：2017-08-29
申请号：US15237114
申请日：2016-08-15
申请人： International Business Machines Corporation
发明人： Karthik Balakrishnan , Lukas Czornomaz , Pouya Hashemi , Alexander Reznicek
IPC分类号： H01L21/02 , H01L21/84 , H01L21/311 , H01L21/322 , H01L21/306
CPC分类号： H01L21/02645 , H01L21/02164 , H01L21/02236 , H01L21/02255 , H01L21/0245 , H01L21/02488 , H01L21/02538 , H01L21/02609 , H01L21/02639 , H01L21/02647 , H01L21/30604 , H01L21/30612 , H01L21/308 , H01L21/31116 , H01L21/322 , H01L21/8258 , H01L21/84 , H01L27/1203
摘要： After forming a seed layer over a first end of a sacrificial semiconductor layer composed of silicon germanium, a remaining portion of the sacrificial semiconductor layer is removed to provide a trench. Next, a semiconductor barrier layer is formed on a sidewall of the seed layer that is exposed by the trench. A III-V compound semiconductor layer is formed within the trench by a lateral epitaxial semiconductor regrowth process.

3. 发明授权

US09735261B2 Semiconductor device and formation thereof 有权
公开(公告)号：US09735261B2
公开(公告)日：2017-08-15
申请号：US14929523
申请日：2015-11-02
申请人： Taiwan Semiconductor Manufacturing Company Limited
发明人： Mao-Lin Huang , Chien-Hsun Wang , Chun-Hsiung Lin , Meng-Ku Chen , Li-Ting Wang , Hung-Ta Lin
IPC分类号： H01L29/778 , H01L29/78 , H01L21/324 , H01L21/322 , H01L29/66 , H01L29/10 , H01L29/205
CPC分类号： H01L29/7786 , H01L21/322 , H01L21/324 , H01L29/1033 , H01L29/205 , H01L29/66522 , H01L29/78 , H01L29/7848
摘要： A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region.

4. 发明申请

US20170207124A1 METHOD OF FORMING A SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20170207124A1
公开(公告)日：2017-07-20
申请号：US15404400
申请日：2017-01-12
申请人： Infineon Technologies AG
发明人： Roland RUPP , Francisco Javier SANTOS RODRIGUEZ , Hans-Joachim SCHULZE
IPC分类号： H01L21/78 , H01L29/66 , H01L21/322 , H01L21/265 , H01L21/268
CPC分类号： H01L21/7806 , H01L21/02002 , H01L21/265 , H01L21/268 , H01L21/322 , H01L29/0834 , H01L29/1608 , H01L29/32 , H01L29/66068 , H01L29/66333 , H01L29/66348 , H01L29/7397 , H01L29/8611
摘要： Methods of forming a semiconductor device are provided. A method includes introducing impurities into a part of a semiconductor substrate at a first surface of the semiconductor substrate by ion implantation, the impurities being configured to absorb electromagnetic radiation of an energy smaller than a bandgap energy of the semiconductor substrate. The method further includes forming a semiconductor layer on the first surface of the semiconductor substrate. The method further includes irradiating the semiconductor substrate with electromagnetic radiation configured to be absorbed by the impurities and configured to generate local damage of a crystal lattice of the semiconductor substrate. The method further includes separating the semiconductor layer and the semiconductor substrate by thermal processing of the semiconductor substrate and the semiconductor layer, where the thermal processing is configured to cause crack formation along the local damage of the crystal lattice by thermo-mechanical stress.

5. 发明申请

US20170076959A1 EPITAXIAL SILICON WAFER AND METHOD FOR PRODUCING THE EPITAXIAL SILICON WAFER 审中-公开
标题翻译：外延硅陶瓷及其制造方法
公开(公告)号：US20170076959A1
公开(公告)日：2017-03-16
申请号：US15311307
申请日：2015-04-21
申请人： SUMCO CORPORATION
发明人： Jun FUJISE , Toshiaki ONO
IPC分类号： H01L21/322 , H01L29/32
CPC分类号： H01L21/3221 , C30B15/00 , C30B15/203 , C30B33/02 , H01L21/322 , H01L21/3225 , H01L29/32
摘要： A method for producing an epitaxial silicon wafer, including a preliminary thermal treatment step of subjecting a silicon wafer to thermal treatment for increasing a density of oxygen precipitates, the silicon wafer being one that has an oxygen concentration in a range of 9×1017 atoms/cm3 to 16×1017 atoms/cm3, contains no dislocation cluster and no COP, and contains an oxygen precipitation suppression region, and an epitaxial layer forming step of forming an epitaxial layer on a surface of the silicon wafer after the preliminary thermal treatment step. The production method further includes a thermal treatment condition determining step of determining a thermal treatment condition in the preliminary thermal treatment step, based on a ratio of the oxygen precipitation suppression region of the silicon wafer before the preliminary thermal treatment step is carried out.
摘要翻译：一种外延硅晶片的制造方法，其特征在于，包括对硅晶片进行热处理以提高氧析出物的密度的预热处理工序，所述硅晶片为氧浓度为9×10 17原子/ cm3至16×1017原子/ cm3，不含有位错簇，没有COP，并且含有氧沉淀抑制区域，以及在预热处理步骤之后在硅晶片的表面上形成外延层的外延层形成步骤。该制造方法还包括热处理条件决定步骤，其基于在进行预热处理步骤之前的硅晶片的氧析出抑制区域的比例，来确定预热处理工序中的热处理条件。

6. 发明授权

US09583626B2 Silicon germanium alloy fins with reduced defects 有权
标题翻译：硅锗合金翅片减少缺陷
公开(公告)号：US09583626B2
公开(公告)日：2017-02-28
申请号：US14699491
申请日：2015-04-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Kangguo Cheng , Hong He , Juntao Li
IPC分类号： H01L21/02 , H01L29/78 , H01L29/66 , H01L29/165 , H01L21/324 , H01L21/322
CPC分类号： H01L29/66795 , H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/18 , H01L21/322 , H01L21/3221 , H01L21/324 , H01L29/0649 , H01L29/0653 , H01L29/165 , H01L29/6653 , H01L29/66545 , H01L29/7851 , H01L29/7853
摘要： A silicon germanium alloy is formed on sidewall surfaces of a silicon fin. An oxidation process or a thermal anneal is employed to convert a portion of the silicon fin into a silicon germanium alloy fin. In some embodiments, the silicon germanium alloy fin has a wide upper portion and a narrower lower portion. In such an embodiment, the wide upper portion has a greater germanium content than the narrower lower portion. In other embodiments, the silicon germanium alloy fin has a narrow upper portion and a wider lower portion. In this embodiment, the narrow upper portion of the silicon germanium alloy fin has a greater germanium content than the wider lower portion of the silicon germanium alloy fin.
摘要翻译：在硅片的侧壁表面上形成硅锗合金。采用氧化工艺或热退火将硅片的一部分转换成硅锗合金翅片。在一些实施例中，硅锗合金翅片具有宽的上部和较窄的下部。在这样的实施例中，宽的上部具有比较窄的下部更大的锗含量。在其他实施例中，硅锗合金翅片具有窄的上部和较宽的下部。在本实施例中，硅锗合金翅片的较窄上部具有比硅锗合金翅片的较宽下部更大的锗含量。

7. 发明授权

US09558963B2 Plasma reactor with conductive member in reaction chamber for shielding substrate from undesirable irradiation 有权
标题翻译：在反应室中具有导电构件的等离子体反应器，用于屏蔽衬底而不需要辐射
公开(公告)号：US09558963B2
公开(公告)日：2017-01-31
申请号：US14869627
申请日：2015-09-29
申请人： Veeco ALD Inc.
发明人： Sang In Lee , Ilsong Lee , Hyo Seok Yang
IPC分类号： C23C16/50 , C23C16/44 , H01L21/322 , H01L21/02 , C23C16/30 , C23C16/34 , C23C16/40 , C23C16/455 , H01J37/32
CPC分类号： H01L21/322 , C23C16/308 , C23C16/345 , C23C16/402 , C23C16/4412 , C23C16/45536 , C23C16/45544 , C23C16/45551 , C23C16/45591 , C23C16/50 , H01J37/32357 , H01J37/32623 , H01L21/02178 , H01L21/02274 , H01L21/0228
摘要： Placing a conductive member between a plasma chamber in a remote plasma reactor and a substrate to shield the substrate from irradiation of undesirable electromagnetic radiation, ions or electrons. The conductive member blocks the electromagnetic radiation, neutralizes ions and absorbs the electrons. Radicals generated in the plasma chambers flows to the substrate despite the placement of the conductive member. In this way, the substrate is exposed to the radicals whereas damages to the substrate due to electromagnetic radiations, ions or electrons are reduced or removed.
摘要翻译：将导电构件放置在远程等离子体反应器中的等离子体室和基板之间，以屏蔽基板免受不需要的电磁辐射，离子或电子的照射。导电构件阻挡电磁辐射，中和离子并吸收电子。在等离子体室中产生的自由基流过衬底，尽管导电构件的放置。以这种方式，衬底暴露于自由基，同时减少或去除由电磁辐射，离子或电子引起的对衬底的损伤。

8. 发明申请

US20160322233A1 SILICON WAFER AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：硅波及其制造方法
公开(公告)号：US20160322233A1
公开(公告)日：2016-11-03
申请号：US15104812
申请日：2014-01-14
申请人： SUMCO CORPORATION
发明人： Takashi NAKAYAMA , Takeo KATOH , Kazumi TANABE , Shigeru UMENO
IPC分类号： H01L21/322 , H01L21/324 , C30B33/02 , C30B15/10 , C30B29/06 , H01L29/32 , C30B15/20
CPC分类号： H01L21/3221 , C30B15/10 , C30B15/203 , C30B29/06 , C30B33/02 , H01L21/322 , H01L21/3225 , H01L21/324 , H01L29/32
摘要： This method for manufacturing a silicon wafer includes: a first heat treatment step of performing RTP treatment on the silicon wafer in an oxidizing atmosphere; a step of removing a region in the silicon wafer in which an oxygen concentration increases in the first heat treatment step; a second heat treatment step of performing, after performing this removing step, RTP treatment on the silicon wafer in a nitriding atmosphere or an Ar atmosphere; and a step of removing, after performing the second heat treatment step, a region in the silicon wafer in which an oxygen concentration decreases in the second heat treatment step. This method enables the manufacture of a silicon wafer in which latent defects such as OSF nuclei and oxygen precipitate nuclei existing in a PV region are destroyed or reduced, and that has a gettering site.
摘要翻译：该制造硅晶片的方法包括：在氧化气氛中对硅晶片进行RTP处理的第一热处理工序; 去除在第一热处理步骤中氧浓度增加的硅晶片中的区域的步骤; 第二热处理步骤，在所述去除步骤之后，在氮化气氛或Ar气氛中，对所述硅晶片进行RTP处理; 以及在进行第二热处理工序之后，在第二热处理工序中除去氧浓度降低的硅晶片的区域的工序。该方法能够制造其中潜在缺陷如OSF核和氧沉淀在PV区域中存在的核的硅晶片被破坏或减少，并且具有吸杂位点。

9. 发明授权

US09459215B2 Passivation of nonlinear optical crystals 有权
标题翻译：钝化非线性光学晶体
公开(公告)号：US09459215B2
公开(公告)日：2016-10-04
申请号：US15010331
申请日：2016-01-29
申请人： KLA-Tencor Corporation
发明人： Yung-Ho Chuang , Vladimir Dribinski
IPC分类号： G01N21/00 , G01N21/88 , C30B29/10 , C30B33/00 , C30B33/02 , G01N21/3563 , G01N21/59 , G01N21/95 , G01N21/35 , G01N21/84
CPC分类号： H01L21/3003 , C30B29/10 , C30B33/00 , C30B33/02 , G01N21/3563 , G01N21/59 , G01N21/8806 , G01N21/9501 , G01N2021/3568 , G01N2021/3595 , G01N2021/8477 , G01N2021/8822 , G01N2201/06113 , H01L21/322 , H01S3/027 , H01S3/094 , H01S3/109 , H01S3/1666
摘要： A system for optically inspection one or more samples includes a sample stage, a laser system configured for illuminating a portion of the surface of the one or more samples disposed on the sample stage, and a detector configured to receive at least a portion of illumination reflected from the surface of the sample. The laser system includes an NLO crystal annealed within a selected temperature range. In addition, the NLO crystal is passivated with at least one of hydrogen, deuterium, a hydrogen-containing compound or a deuterium-containing compound to a selected passivation level. Further, the laser system includes a light source configured to generate light of a selected wavelength. The light source is configured to transmit light through the NLO crystal. The laser system includes a crystal housing unit configured to house the NLO crystal.
摘要翻译：用于光学检查一个或多个样品的系统包括样品台，配置用于照射设置在样品台上的一个或多个样品的表面的一部分的激光系统，以及被配置为接收反射的至少一部分光的检测器从样品的表面。激光系统包括在所选温度范围内退火的NLO晶体。此外，NLO晶体与氢，氘，含氢化合物或含氘化合物中的至少一种钝化至选定的钝化水平。此外，激光系统包括被配置为产生所选波长的光的光源。光源配置为透过NLO晶体传输光。激光系统包括构造成容纳NLO晶体的晶体容纳单元。

10. 发明申请

US20160284544A1 Methods and Devices for Fabricating and Assembling Printable Semiconductor Elements 有权
公开(公告)号：US20160284544A1
公开(公告)日：2016-09-29
申请号：US15084091
申请日：2016-03-29
申请人： The Board of Trustees of the University of Illinois
发明人： Ralph G. NUZZO , John A. ROGERS , Etienne MENARD , Keon Jae LEE , Dahl-Young KHANG , Yugang SUN , Matthew MEITL , Zhengtao ZHU
IPC分类号： H01L21/02 , H01L29/786 , H01L27/12 , H01L29/06 , H01L21/308 , H01L21/683
CPC分类号： H01L29/76 , B81C2201/0185 , B82Y10/00 , H01L21/02521 , H01L21/02603 , H01L21/02628 , H01L21/308 , H01L21/322 , H01L21/6835 , H01L23/02 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0753 , H01L27/1285 , H01L27/1292 , H01L29/04 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/12 , H01L29/78603 , H01L29/78681 , H01L29/78696 , H01L31/0392 , H01L31/03926 , H01L31/1804 , H01L31/1864 , H01L31/1896 , H01L33/007 , H01L33/0079 , H01L33/32 , H01L2221/68368 , H01L2221/68381 , H01L2224/03 , H01L2224/0332 , H01L2224/0345 , H01L2224/03614 , H01L2224/0362 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05155 , H01L2224/05166 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05644 , H01L2224/05666 , H01L2224/08225 , H01L2224/2919 , H01L2224/32225 , H01L2224/80 , H01L2224/80006 , H01L2224/80121 , H01L2224/80862 , H01L2224/80895 , H01L2224/83 , H01L2224/83005 , H01L2224/83121 , H01L2224/83192 , H01L2224/83193 , H01L2224/8385 , H01L2224/83862 , H01L2224/9202 , H01L2224/94 , H01L2224/95 , H01L2224/97 , H01L2924/00012 , H01L2924/01032 , H01L2924/0665 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/12044 , H01L2924/1305 , H01L2924/1306 , H01L2924/13063 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15159 , H01L2924/15162 , H01L2924/15788 , H01L2924/1579 , Y02E10/547 , Y02P70/521 , Y10S977/707 , Y10S977/724 , H01L2924/00014 , H01L2924/00
摘要： The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

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