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1. 发明申请

US20040193948A1 Programmable controller unit and method of automatically restoring memory 有权
标题翻译：可编程控制器单元和自动恢复存储器的方法
公开(公告)号：US20040193948A1
公开(公告)日：2004-09-30
申请号：US10745952
申请日：2003-12-26
发明人： Akio Ono
IPC分类号： H02H003/05
CPC分类号： G05B19/058 , G05B2219/11101 , G05B2219/14065 , G05B2219/14085
摘要： A unit for a programmable controller includes a user program memory storing a user program to be read out for carrying out a calculation process and a backup memory storing data with the same contents as the user program stored in the user program memory. An abnormality detector is provided for detecting a memory abnormality by comparing user data stored in the user memory and the backup memory while the programmable controller is operated. If a memory abnormality is detected, a restoration device repairs the data at the position where the abnormality was detected with the data at the corresponding position of the backup memory and the cyclic operation of the programmable controller is continued thereafter.
摘要翻译：用于可编程控制器的单元包括存储用于执行计算处理的用于读出的用户程序的用户程序存储器和存储与存储在用户程序存储器中的用户程序相同内容的数据的备份存储器。提供异常检测器，用于通过比较存储在用户存储器中的用户数据和备用存储器来操作可编程控制器来检测存储器异常。如果检测到存储器异常，则恢复装置在备用存储器的对应位置处的数据中检测到检测到异常的位置处的数据，然后继续执行可编程控制器的循环操作。

2. 发明申请

US20180032050A1 PROGRAMMABLE CONTROLLER 审中-公开
公开(公告)号：US20180032050A1
公开(公告)日：2018-02-01
申请号：US15659882
申请日：2017-07-26
申请人： FANUC CORPORATION
发明人： Yukihiro HIRAISHI
IPC分类号： G05B19/05 , G05B19/045
CPC分类号： G05B19/05 , G05B19/045 , G05B19/054 , G05B2219/11101 , G05B2219/1127 , G05B2219/13128 , G05B2219/14089
摘要： A programmable controller sets access rules relating to permission or denial of access to a first data storage unit during execution of a second sequence program. In addition, a first sequence program is executed while accessing only the first data storage unit, whereas the second sequence program is executed while accessing the first data storage unit and a second data storage unit in accordance with the set access rules.

3. 发明授权

US4291388A Programmable controller with data archive 失效
标题翻译：带数据存档的可编程控制器
公开(公告)号：US4291388A
公开(公告)日：1981-09-22
申请号：US971593
申请日：1978-12-20
申请人： Donald R. Ecker, Jr. , Ernst Dummermuth , Odo J. Struger
发明人： Donald R. Ecker, Jr. , Ernst Dummermuth , Odo J. Struger
IPC分类号： G05B19/05 , G06F11/14 , G06F11/16
CPC分类号： G05B19/058 , G06F11/14 , G05B2219/11101
摘要： A programmable controller interfaces a numerical control system to sensing and operating devices that control the auxiliary functions on a machine tool. In the controller a microprocessor is coupled to a random-access memory (RAM) and an electrically alterable read-only memory (EAROM) through an address bus and a data bus. The RAM stores a user control program and an I/O image table that depicts the status of the sensing and operating devices on the machine tool. Under program control the microprocessor verifies the contents of the RAM and copies the verified contents into the EAROM. If the contents of the RAM are altered or lost, the master copy of data stored in the EAROM is reloaded into the RAM.
摘要翻译：可编程控制器将数控系统连接到感应和操作机床上控制辅助功能的设备。在控制器中，微处理器通过地址总线和数据总线耦合到随机存取存储器（RAM）和电可更改的只读存储器（EAROM）。 RAM存储用户控制程序和描绘机床上感测和操作设备状态的I / O映像表。在程序控制下，微处理器验证RAM的内容，并将验证的内容复制到EAROM中。如果RAM的内容被更改或丢失，则将存储在EAROM中的数据的主副本重新加载到RAM中。

4. 发明授权

US4213174A Programmable sequence controller with drum emulation and improved power-down power-up circuitry 失效
公开(公告)号：US4213174A
公开(公告)日：1980-07-15
申请号：US802261
申请日：1977-05-31
申请人： Richard E. Morley , Michael A. Bromberg , William A. Taylor
发明人： Richard E. Morley , Michael A. Bromberg , William A. Taylor
IPC分类号： G05B19/05 , G06F15/46 , G05B11/32 , G06F9/00
CPC分类号： G05B19/05 , G05B2219/11101 , G05B2219/1161 , G05B2219/14089 , G05B2219/14116 , G05B2219/14137 , G05B2219/15018 , G05B2219/15048 , G05B2219/15062 , G05B2219/15102
摘要： A programmable sequence controller is disclosed utilizing digital and analog inputs in order to generate digital output driver signals for the control of external systems or devices. The controller emulates mechanical sequence drums so that at any one time each of the simulated drums within the controller executes one of the addressable drum lines programmed within the drum. Each line of each simulated drum can be programmed to specify the energization or deenergization of any output driver as well as the energization or de-energization of any memory bit utilized by the controller in order to provide communication between drums. Each drum may also be programmed to have one or two sets of exit conditions, which if met, cause the controller to effectively rotate the drum to a specified drum line and execute this new drum line during the next scan of the controller. The controller can also sense emergency conditions and cause any or all of the drums to rotate to a specified line regardless of the drum line then being executed by the controller for each of the drums. An improved power-down, power-up circuitry insures an ordered and complete shutdown of the controller if any of a number of conditions exist, including utility AC failure and impending failure of several of the power supply voltages. Handshaking circuitry between the power supply and the remainder of the controller insures that the controller maintains memory validity for all types of shutdown situations, including momentary losses of any supply voltage.The programmable sequence controller includes a clock-calendar capable of continued operation during periods of extended power outages. The clock-calendar can be utilized in any drum line to form part of the control scheme.All programming of the simulated drum lines is performed through an interconnected data communication device such as a teletypewriter and utilizes a simple user-oriented language, with monitoring and diagnostic capability to facilitate debugging.

5. 发明授权

US07243260B2 Programmable controller unit and method of automatically restoring memory 有权
标题翻译：可编程控制器单元和自动恢复存储器的方法
公开(公告)号：US07243260B2
公开(公告)日：2007-07-10
申请号：US10745952
申请日：2003-12-26
申请人： Akio Ono
发明人： Akio Ono
IPC分类号： G06F11/00
CPC分类号： G05B19/058 , G05B2219/11101 , G05B2219/14065 , G05B2219/14085
摘要： A unit for a programmable controller includes a user program memory storing a user program to be read out for carrying out a calculation process and a backup memory storing data with the same contents as the user program stored in the user program memory. An abnormality detector is provided for detecting a memory abnormality by comparing user data stored in the user memory and the backup memory while the programmable controller is operated. If a memory abnormality is detected, a restoration device repairs the data at the position where the abnormality was detected with the data at the corresponding position of the backup memory and the cyclic operation of the programmable controller is continued thereafter.
摘要翻译：用于可编程控制器的单元包括存储用于执行计算处理的用于读出的用户程序的用户程序存储器和存储与存储在用户程序存储器中的用户程序相同内容的数据的备份存储器。提供异常检测器，用于通过比较存储在用户存储器中的用户数据和备用存储器来操作可编程控制器来检测存储器异常。如果检测到存储器异常，则恢复装置在备用存储器的对应位置处的数据中检测到检测到异常的位置处的数据，然后继续执行可编程控制器的循环操作。

6. 发明授权

US4542452A Programmable controller 失效
标题翻译：可编程控制器
公开(公告)号：US4542452A
公开(公告)日：1985-09-17
申请号：US605778
申请日：1984-05-01
申请人： Yoshio Fukai , Masato Yamamoto , Masuo Hanawaka
发明人： Yoshio Fukai , Masato Yamamoto , Masuo Hanawaka
IPC分类号： G05B11/01 , G05B15/02 , G05B19/05 , G05B19/02
CPC分类号： G05B19/056 , G05B2219/11101 , G05B2219/1127 , G05B2219/1161 , G05B2219/13002 , G05B2219/13006 , G05B2219/13013 , G05B2219/13029 , G05B2219/13095 , G05B2219/13142 , G05B2219/13171 , G05B2219/14005 , G05B2219/14054 , G05B2219/15039 , G05B2219/15048
摘要： A programmable controller is provided with a controller body including a microprocessor having a ROM for storing user programs connected with a socket thereto. A programmer which is connected by a connector to a data bus or the controller body has a means to switch to a program mode to write a user program in a RAM by operating keys, and a test run mode to execute the user program written in RAM on the controller body, and a means to copy the user program written in RAM of the programmer to said ROM. The user program stored in ROM which is inserted in said socket is executed when the programmer is isolated from the controller body. The system program of the controller body includes a basic control function program for executing a single loop control, a cascade control function program for executing the cascade control and a selective control function program for the selective control, so that the control operation function is decided by selecting one of said control operation functions programs by a single instruction of the user programs.
摘要翻译：可编程控制器设置有控制器主体，其包括具有用于存储与其插座相连接的用户程序的ROM的微处理器。通过连接器连接到数据总线或控制器主体的编程器具有切换到通过操作键将用户程序写入RAM的程序模式的装置，以及用于执行写入RAM的用户程序的测试运行模式以及将编程器的RAM中写入的用户程序复制到所述ROM的装置。当编程器与控制器主体隔离时，执行存储在插入到所述插槽中的ROM中的用户程序。控制器主体的系统程序包括用于执行单回路控制的基本控制功能程序，用于执行级联控制的级联控制功能程序和用于选择性控制的选择控制功能程序，使得控制操作功能由通过用户程序的单个指令来选择所述控制操作功能程序之一。

7. 发明授权

US3982230A Programmable logic controller with flag storage 失效
标题翻译：具有标志存储的可编程逻辑控制器
公开(公告)号：US3982230A
公开(公告)日：1976-09-21
申请号：US431589
申请日：1974-01-07
申请人： Bobby G. Burkett , Raymond W. Henry
发明人： Bobby G. Burkett , Raymond W. Henry
IPC分类号： G05B19/05 , G06F12/06 , G06F3/06
CPC分类号： G06F12/0684 , G05B19/05 , G05B2219/11101 , G05B2219/1159 , G05B2219/1168 , G05B2219/13004 , G05B2219/13012 , G05B2219/13128 , G05B2219/15018 , G05B2219/15054
摘要： A programmable logic controller has input elements sampled to determine status in each of multicomponent lines of a relay ladder network. Output elements in the network connect power voltage sources to power utilization units and disconnect the same in accordance with a programmed set of instructions stored in a controller memory to satisfy operating conditions required of the ladder network. Sample means sequentially generate a set of one bit words, one word representing the state of each of the input elements. A set of one bit output control states is generated, one state for each output element in dependence upon the states of the input elements. Timing means operable once each half cycle of the power voltage initiates generation and storage in a semiconductor read/write image register of one bit input words and output control states.Further, the timing means includes control means for sequentially instituting a serial I/O mode in which the input elements are sampled and the output states are read out of the register and applied to the output elements followed by a run mode in which a new set of control states is established and stored in the register.
摘要翻译：可编程逻辑控制器具有被采样的输入元件，以确定梯形网络中多条线路中的每个状态。网络中的输出元件将电源电压源连接到功率利用单元，并根据存储在控制器存储器中的编程指令集将其断开，以满足梯形网络所需的操作条件。采样装置顺序地生成一组一个位字，一个字表示每个输入元件的状态。产生一组一位输出控制状态，根据输入元件的状态为每个输出元件提供一个状态。一旦电源电压的每个半周期在一位输入字和输出控制状态的半导体读/写映像寄存器中产生和存储，定时装置就可操作。

8. 发明授权

US4672573A Programmable controller with improved return processing capabilities after a power interruption 失效
标题翻译：可编程控制器，在电源中断后具有改进的返回处理能力
公开(公告)号：US4672573A
公开(公告)日：1987-06-09
申请号：US571750
申请日：1984-01-18
申请人： Hisashi Shonaka
发明人： Hisashi Shonaka
IPC分类号： G05B9/02 , G05B19/048 , G05B19/05 , G06F13/00
CPC分类号： G05B19/058 , G05B2219/11101 , G05B2219/1173 , G05B2219/14141
摘要： A programmable controller is provided for controlling, e.g., external devices according to a given control cycle. A non-volatile user program memory stores a user program including a power-off processing program. A non-volatile input/output memory stores (1) external input data corresponding to an input circuit which receives external input signals and an output circuit and (2) internal input/output data for internal operation. A non-volatile flag memory stores flags for instructing processing contents at restoration of power-off. A flag setting unit is provided for setting the flag to the flag memory at a stage as determined by the user program. When power restoration occurs, first a determination is made as to whether a state maintain flag as been set. If the state maintain flag has been set, an output inhibit circuit is actuated. Thus, while data in the input/output memory is maintained without modification, the output inhibit circuit causes data not to be delivered to the output circuit. After execution of this routine, control is then performed in accordance with the data which existed immediately prior to occurrence of power-off. However, if the state maintain flag has not been set, the input/output memory is cleared, and after execution of this routine, control is then performed based on the initial data of the processing operation.
摘要翻译：提供可编程控制器，用于根据给定的控制周期来控制例如外部设备。非易失性用户程序存储器存储包括断电处理程序的用户程序。非易失性输入/输出存储器存储（1）对应于接收外部输入信号的输入电路和输出电路的外部输入数据，以及（2）用于内部操作的内部输入/输出数据。非易失性标志存储器存储用于在恢复关机时指示处理内容的标志。提供标志设置单元，用于在由用户程序确定的阶段将标志设置到标志存储器。当发生电源恢复时，首先确定状态是否设置了标志。如果已经设置了状态保持标志，则启动输出禁止电路。因此，虽然输入/输出存储器中的数据被保持而不改变，但是输出禁止电路使数据不被传送到输出电路。在该程序执行之后，根据紧接在断电之前存在的数据进行控制。然而，如果状态保持标志尚未被设置，则输入/输出存储器被清除，并且在该程序执行之后，根据处理操作的初始数据进行控制。

9. 发明授权

US4227247A Integrated circuit controller programmable with unidirectional-logic instructions representative of sequential wire nodes and circuit elements of a ladder diagram 失效
标题翻译：集成电路控制器可编程，具有代表梯形图的顺序线节点和电路元件的单向逻辑指令
公开(公告)号：US4227247A
公开(公告)日：1980-10-07
申请号：US841431
申请日：1977-10-12
申请人： Paul M. Kintner
发明人： Paul M. Kintner
IPC分类号： G06F7/00 , G05B19/05 , G06F9/06 , G05B11/01
CPC分类号： G05B19/05 , G05B2219/11101 , G05B2219/1159 , G05B2219/1162 , G05B2219/1188 , G05B2219/13188 , G05B2219/14089
摘要： A programmable controller that is programmed to simulate a ladder diagram and accepts input signals to control output devices in accordance with the ladder diagram program and comprising, in addition to a main memory that stores the program, a logic processor and input/output circuits, of a special wire number memory and a control coil memory for receiving, storing and making available to the processor the result of every logic function representing the current on-off status of each wire node and each control coil and associated contacts. This controller affords the maintenance of a complete current record of the changing status of the contacts and their interconnecting circuit nodes. This makes possible a particularly simple unidirectional-logic programming mode because the programmer does not have to keep track of which logic operations must be temporarily stored. This storage affords a powerful monitoring means in that signal tracing can be accomplished by merely calling up predetermined wire numbers from the special wire number memory and displaying the status thereof, or calling up predetermined input devices or control coils to view the status thereof. Moreover, for maintenance purposes, this architecture provides a selector switch and logic circuitry whereby a predetermined wire node may be manually forced "on" or "off" for maintenance purposes or the like.
摘要翻译：可编程控制器，其被编程为模拟梯形图并且接受输入信号以根据梯形图程序来控制输出设备，并且除了存储程序的主存储器之外，还包括逻辑处理器和输入/输出电路特殊的线数存储器和控制线圈存储器，用于向处理器提供表示每个线节点和每个控制线圈及相关联的接触件的当前开 - 关状态的每个逻辑功能的结果。该控制器提供对触点及其互连电路节点的变化状态的完整的当前记录的维护。这使得特别简单的单向逻辑编程模式成为可能，因为编程器不必跟踪哪些逻辑操作必须被临时存储。该存储器提供了强大的监视装置，因为信号跟踪可以通过仅从特殊线号存储器调用预定的线号并显示其状态，或调用预定的输入装置或控制线圈来查看其状态来实现。此外，为了维护的目的，该架构提供了选择器开关和逻辑电路，由此为了维护目的等可以手动地将预定的电线节点“开”或“关”。

10. 发明授权

US4030080A Variable module memory 失效
标题翻译：可变模块存储器
公开(公告)号：US4030080A
公开(公告)日：1977-06-14
申请号：US643970
申请日：1975-12-24
申请人： Bobby G. Burkett , Raymond W. Henry
发明人： Bobby G. Burkett , Raymond W. Henry
IPC分类号： G05B19/05 , G06F12/06 , G06F13/00 , G11C9/00
CPC分类号： G05B19/05 , G06F12/0684 , G05B2219/11101 , G05B2219/1168 , G05B2219/1188 , G05B2219/13004 , G05B2219/13012 , G05B2219/15054
摘要： A variable module memory, particularly suitable for use in a programmable controller, includes a set of up-to-N memory modules each for storing a plurality of words of n bits. N receptacle means are provided for receiving the set of memory modules and for coupling the received memory modules to a common serial bus. Control means is provided, coupled via said receptacle means, to said up-to-N memory modules for providing address signals for selectively addressing the words of a selected memory module to provide the contents stored therein serially to said common serial bus. A pull-up resistor connecting a predetermined voltage to a common serial bus detects the absence of memory modules in the receptacles and forces the serial bus to a predetermined binary state for all bits or all words for a vacant receptacle means.
摘要翻译：特别适用于可编程控制器的可变模块存储器包括一组N个存储器模块，每个存储器模块用于存储n位的多个字。提供N个插座装置用于接收该组存储器模块并将接收到的存储器模块耦合到公共串行总线。提供了经由所述插座装置耦合到所述直到N个存储器模块的控制装置，用于提供用于选择性地寻址选定存储器模块的字的地址信号，以将其中存储的内容串行地提供给所述公共串行总线。将预定电压连接到公共串行总线的上拉电阻检测插座中不存在存储器模块，并迫使串行总线对于所有位或对于空插座装置的所有字来说是预定的二进制状态。

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