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1. 发明公开

US20240192265A1 TEST ARRANGEMENT FOR TESTING A POWER ELECTRONICS CONTROLLER 审中-公开
公开(公告)号：US20240192265A1
公开(公告)日：2024-06-13
申请号：US18534626
申请日：2023-12-09
申请人： dSPACE GmbH
发明人： Daniel EPPING , Philipp KEMPER
IPC分类号： G01R31/28
CPC分类号： G01R31/2832
摘要： A test arrangement for testing a power electronics controller. An intermediate network current in the electrical intermediate network is reduced in that the intermediate network current flowing in the intermediate network is determined by the controller and the controller changes at least one control value of at least one of the load-side power electronics modules in such a way that the intermediate network current is reduced when the interface of the load-side power electronics module is applied with the modified control value.

2. 发明授权

US11928000B1 Calibrating processor system power consumption 有权
公开(公告)号：US11928000B1
公开(公告)日：2024-03-12
申请号：US17895743
申请日：2022-08-25
申请人： Dell Products L.P.
发明人： Douglas E. Messick , Craig A. Klein , John E. Jenne , Ralph H. Johnson
IPC分类号： G06F1/26 , G01R19/00 , G01R31/28 , G06F1/3206 , G06F1/3296
CPC分类号： G06F1/26 , G01R19/0092 , G01R31/2832 , G06F1/3206 , G06F1/3296
摘要： An information handling system includes a management controller that may determine average power consumption of a processor, and determine average power measurement at a power supply unit. If the average power consumption of the processor does not match the average power measurement at the power supply unit, then the system may calibrate the average power consumption of the processor to match the average power measurement at the power supply unit.

3. 发明授权

US11860223B2 Method of generating self-test signals, corresponding circuit and apparatus 有权
公开(公告)号：US11860223B2
公开(公告)日：2024-01-02
申请号：US17479510
申请日：2021-09-20
申请人： STMICROELECTRONICS S.r.l.
发明人： Giorgio Maiellaro , Angelo Scuderi , Angela Bruno , Salvatore Scaccianoce
IPC分类号： G01R31/28 , G01S7/40
CPC分类号： G01R31/2884 , G01R31/2832 , G01S7/4056 , G01S7/4069
摘要： A radio-frequency receiver includes built-in-self-test (BIST) circuitry which generates a self-test signal. A local oscillator signal is divided. A self-test oscillation signal is generated, based, at least in part, on the frequency-divided local oscillation signal. The self-test signal is generated based on the self-test oscillation signal. The BIST circuitry includes a divider, which divides the self-test oscillation signal. The frequency-divided local oscillation signal and the divided self-test oscillation signal are used to perform one or more of generating the self-test oscillation signal and controlling the generation of the self-test oscillation signal. The radio-frequency receiver may be an automotive radar receiver.

4. 发明授权

US11668734B2 Spark gap structures for detection and protection against electrical overstress events 有权
公开(公告)号：US11668734B2
公开(公告)日：2023-06-06
申请号：US17446945
申请日：2021-09-03
申请人： Analog Devices International Unlimited Company
发明人： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC分类号： G01R19/165 , G01R31/00 , G01R31/28 , H02H9/04 , H01L27/02 , H01L23/60 , H01L23/62 , H01L23/525 , H02H9/00
CPC分类号： G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
摘要： The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.

5. 发明申请

US20160320444A1 EFFICIENT METHOD OF RETESTING INTEGRATED CIRCUITS 有权
标题翻译：有效的电路集成方法
公开(公告)号：US20160320444A1
公开(公告)日：2016-11-03
申请号：US15192418
申请日：2016-06-24
申请人： International Business Machines Corporation
发明人： Teck Seng Eng , Michael Russell Uy Gonzales , Louie Que Hermosura
IPC分类号： G01R31/28
CPC分类号： G01R31/3177 , G01R31/2832 , G01R31/2894 , G01R31/31718
摘要： Efficient production testing of integrated circuits (ICs). A first production test is implemented on a group of ICs and failures among the test group are assessed. Specifically, the results of the first test are analyzed such that ICs having a recoverable fail and ICs having a non-recoverable fail are differentiated. The ICs are integrated based on the analyzed results and a second production test is implemented. The second production test tests the ICs responsive to the segregation, such that the second production test is limited only to ICs with a recoverable fail. The next succeeding production test will then use the new test program in the second production test with the handler bin designated as having ICs not to be re-tested.
摘要翻译：集成电路（IC）的高效生产测试。对一组IC进行第一次生产测试，并对测试组中的故障进行评估。具体地，分析第一测试的结果，使得具有可恢复故障的IC和具有不可恢复故障的IC被区分。基于分析结果集成IC，并实施第二次生产测试。第二次生产测试针对隔离测试IC，使得第二次生产测试仅限于具有可恢复故障的IC。接下来的生产测试将在第二次生产测试中使用新的测试程序，并将处理器bin指定为不重新测试IC。

6. 发明申请

US20150369862A1 EFFICIENT METHOD OF RETESTING INTEGRATED CIRCUITS 有权
标题翻译：有效的电路集成方法
公开(公告)号：US20150369862A1
公开(公告)日：2015-12-24
申请号：US14837402
申请日：2015-08-27
申请人： International Business Machines Corporation
发明人： Teck Seng Eng , Michael Russell Uy Gonzales , Louie Que Hermosura
IPC分类号： G01R31/3177
CPC分类号： G01R31/3177 , G01R31/2832 , G01R31/2894 , G01R31/31718
摘要： Efficient production testing of integrated circuits. A first production test is implemented on a group of integrated circuits and failures among the test group are assessed. Specifically, the results of the first test are analyzed such that integrated circuits having a recoverable fail and integrated circuits having a non-recoverable fail are differentiated. The integrated circuits are integrated based on the analyzed results and a second production test is implemented. The second production test tests the integrated circuits responsive to the segregation, such that the second production test is limited only to integrated circuits with a recoverable fail. The next succeeding production test will then use the new test program in the second production test with the handler bin designated as having integrated circuits not to be re-tested.
摘要翻译：集成电路的高效生产测试。对一组集成电路进行第一次生产测试，并对测试组中的故障进行评估。具体地，分析第一测试的结果，使得具有可恢复故障的集成电路和具有不可恢复故障的集成电路被区分。基于分析结果集成了集成电路，实现了第二次生产测试。第二次生产测试根据分离测试集成电路，使得第二次生产测试仅限于具有可恢复故障的集成电路。接下来的生产测试将在第二次生产测试中使用新的测试程序，并将处理器箱指定为不具有集成电路的重新测试。

7. 发明授权

US09170229B2 Method for diagnosing an electrical contact connection of an exhaust gas sensor 有权
标题翻译：用于诊断废气传感器的电接触连接的方法
公开(公告)号：US09170229B2
公开(公告)日：2015-10-27
申请号：US13775666
申请日：2013-02-25
申请人： CONTINENTAL AUTOMOTIVE GMBH
发明人： Jens Paggel , Sirko Schlegel
IPC分类号： G01N27/417 , G01N27/416 , G01R31/28 , F02D41/14 , G01R31/02 , F02D41/22 , G01R31/00
CPC分类号： G01N27/4175 , F02D41/1456 , F02D41/1495 , F02D41/222 , G01N27/4163 , G01R31/006 , G01R31/026 , G01R31/2832 , Y02T10/40
摘要： A method diagnoses an electrical contact connection of an exhaust gas sensor, in which two current sources are used to impress currents into a pump cell and a reference cell of the exhaust gas sensor. If a line is faulty, the relevant current cannot flow and a voltage on the relevant current source assumes a high value. If a second line is faulty, measurement of the voltage on the second connection, which is connected to the connecting point between the two cells, provides a low value when the relevant second connection is isolated from the reference-ground potential by a second switch, since the cell capacitances have not been able to charge to the reference-ground potential.
摘要翻译：一种用于诊断排气传感器的电接触连接的方法，其中使用两个电流源来将电流注入到泵电池和废气传感器的参考电池中。如果线路故障，相关电流不能流动，相关电流源上的电压值会较高。如果第二线路故障，则当相关的第二连接通过第二开关与基准接地电位隔离时，连接到两个电池之间的连接点的第二连接上的电压的测量值提供较低的值，因为电池电容不能充电到基准电位。

8. 发明申请

US20140278196A1 EFFICIENT METHOD OF RETESTING INTEGRATED CIRCUITS 有权
标题翻译：有效的电路集成方法
公开(公告)号：US20140278196A1
公开(公告)日：2014-09-18
申请号：US13833308
申请日：2013-03-15
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Teck Seng Eng , Michael Russell Uy Gonzales , Louie Que Hermosura
IPC分类号： G01R31/28
CPC分类号： G01R31/3177 , G01R31/2832 , G01R31/2894 , G01R31/31718
摘要： Efficient production testing of integrated circuits. A first production test is implemented on a group of integrated circuits and failures among the test group are assessed. Specifically, the results of the first test are analyzed such that integrated circuits having a recoverable fail and integrated circuits having a non-recoverable fail are differentiated. The integrated circuits are integrated based on the analyzed results and a second production test is implemented. The second production test tests the integrated circuits responsive to the segregation, such that the second production test is limited only to integrated circuits with a recoverable fail. The next succeeding production test will then use the new test program in the second production test with the handler bin designated as having integrated circuits not to be re-tested.
摘要翻译：集成电路的高效生产测试。对一组集成电路进行第一次生产测试，并对测试组中的故障进行评估。具体地，分析第一测试的结果，使得具有可恢复故障的集成电路和具有不可恢复故障的集成电路被区分。基于分析结果集成了集成电路，实现了第二次生产测试。第二次生产测试根据分离测试集成电路，使得第二次生产测试仅限于具有可恢复故障的集成电路。接下来的生产测试将在第二次生产测试中使用新的测试程序，并将处理器箱指定为不具有集成电路的重新测试。

9. 发明申请

US20140132083A1 USB PERIPHERAL DEVICE DETECTION ON AN UNPOWERED BUS 有权
标题翻译： USB外设设备检测未加功率总线
公开(公告)号：US20140132083A1
公开(公告)日：2014-05-15
申请号：US14076446
申请日：2013-11-11
申请人： THOMSON LICENSING
发明人： Phillippe Marchand , Philippe Guillot , Xavier Guitton
IPC分类号： G01R31/28
CPC分类号： G01R31/2832 , G06F13/4072 , G06F13/4081 , G06F2213/0042 , Y10T307/858
摘要： Method for detecting a connection of a peripheral device to a communication interface of an electronic device and associated detection circuit; the communication interface comprising a voltage power line for the power supply of a peripheral device, a range of nominal operating voltage values being associated with the power line, the method being characterised in that it comprises steps of application of a nominal voltage comprised in the range of nominal operating voltage values to the power line, of withdrawal of the nominal operating voltage applied to the power line, of detection, on the power line, in the presence of a residual voltage less than a threshold value of the nominal voltage value, of a transient signal resulting from the connection of the peripheral device to the interface, and of application of the nominal voltage to the voltage power line, according to the transient signal detected.
摘要翻译：用于检测外围设备与电子设备的通信接口和相关联的检测电路的连接的方法; 所述通信接口包括用于外围设备的电源的电压电源线，所述额定工作电压值的范围与所述电力线相关联，所述方法的特征在于，其包括以下步骤：施加包括在所述范围内的标称电压在电源线上的额定工作电压值，在存在小于标称电压值的阈值的剩余电压的情况下，提取施加到电力线上的额定工作电压，检测电力线上的额定工作电压值根据检测到的瞬态信号，由外围设备连接到接口产生的瞬态信号，以及将标称电压施加到电压电源线。

10. 发明申请

US20130229197A1 TEST APPARATUS 有权
标题翻译：测试仪器
公开(公告)号：US20130229197A1
公开(公告)日：2013-09-05
申请号：US13781416
申请日：2013-02-28
申请人： ADVANTEST CORPORATION
发明人： Takashi Kusaka , Masahiro Ishida
IPC分类号： G01R31/28
CPC分类号： G01R31/2832 , G01R31/31924 , H02M3/156 , H02M2001/0019
摘要： A main power supply is arranged such that its output terminal Po is connected to a power supply terminal of a DUT via a power supply line, and is configured to feedback control an output voltage VOUT output from the output terminal such that a detection value VDD′ that corresponds to a power supply voltage VDD at the power supply terminal approaches a target value VREF′. When a test pattern is supplied to the DUT, a power supply control unit is configured to feedforward control the main power supply such that the power supply voltage VDD approaches a predetermined target waveform VTGT.
摘要翻译：主电源被布置成使得其输出端子Po经由电源线连接到DUT的电源端子，并且被配置为反馈控制从输出端子输出的输出电压VOUT，使得检测值VDD' 对应于电源端子处的电源电压VDD接近目标值VREF'。当测试图案被提供给DUT时，电源控制单元被配置为前馈控制主电源，使得电源电压VDD接近预定的目标波形VTGT。

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