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1. 发明申请

US20120248607A1 Semiconductor die having fine pitch electrical interconnects 有权
标题翻译：具有细间距电互连的半导体管芯
公开(公告)号：US20120248607A1
公开(公告)日：2012-10-04
申请号：US13243877
申请日：2011-09-23
申请人： Keith Lake Barrie , Suzette K. Pangrle , Grant Villavicencio , Jeffrey S. Leal
发明人： Keith Lake Barrie , Suzette K. Pangrle , Grant Villavicencio , Jeffrey S. Leal
IPC分类号： H01L23/48 , H01L21/56
CPC分类号： H01L24/83 , H01L23/293 , H01L23/3185 , H01L24/05 , H01L24/24 , H01L24/25 , H01L24/82 , H01L25/0657 , H01L2224/0345 , H01L2224/0346 , H01L2224/038 , H01L2224/0381 , H01L2224/0401 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05567 , H01L2224/05573 , H01L2224/05644 , H01L2224/05664 , H01L2224/1131 , H01L2224/11848 , H01L2224/13017 , H01L2224/1329 , H01L2224/133 , H01L2224/13311 , H01L2224/13313 , H01L2224/13347 , H01L2224/16145 , H01L2224/24051 , H01L2224/24105 , H01L2224/24146 , H01L2224/24226 , H01L2224/244 , H01L2224/245 , H01L2224/24992 , H01L2224/24997 , H01L2224/25175 , H01L2224/2919 , H01L2224/82009 , H01L2224/82039 , H01L2224/82101 , H01L2224/831 , H01L2225/06524 , H01L2225/06562 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/12042 , H01L2924/14 , H01L2924/0665 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要： A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to “bleed” laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CF4 plasma treatment.
摘要翻译：裸片在互连端附近在互连边缘附近具有互连焊盘，并且互连面的至少一部分由保形电介质涂层覆盖，其中在电介质涂层上的互连迹线与电介质的表面形成高界面角涂层。由于迹线具有高界面角度，互连材料横向渗出的趋势被减轻，并且避免了相邻迹线的接触或重叠。互连迹线包括可固化的导电互连材料; 也就是说，它包括可以以可流动形式施加的材料，然后固化或允许其固化以形成导电迹线。此外，一种方法包括在形成迹线之前，用CF 4等离子体处理对保形电介质涂层的表面进行处理。

2. 发明申请

US20110272825A1 STACKED DIE ASSEMBLY HAVING REDUCED STRESS ELECTRICAL INTERCONNECTS 有权
标题翻译：具有减少应力电气互连的堆叠式电池组件
公开(公告)号：US20110272825A1
公开(公告)日：2011-11-10
申请号：US12939524
申请日：2010-11-04
申请人： Scott McGrath , Jeffrey S. Leal , Ravi Shenoy , Loreto Cantillep , Simon J. S. McElrea , Suzette K. Pangrle
发明人： Scott McGrath , Jeffrey S. Leal , Ravi Shenoy , Loreto Cantillep , Simon J. S. McElrea , Suzette K. Pangrle
IPC分类号： H01L23/522 , H01L21/56
CPC分类号： H01L21/563 , H01L23/3121 , H01L23/49805 , H01L23/562 , H01L24/06 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/82 , H01L25/0657 , H01L2224/0401 , H01L2224/05553 , H01L2224/05554 , H01L2224/16225 , H01L2224/24011 , H01L2224/24051 , H01L2224/24145 , H01L2224/24226 , H01L2224/32145 , H01L2224/73203 , H01L2224/76155 , H01L2224/82102 , H01L2225/06517 , H01L2225/06551 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/3512 , H01L2924/00
摘要： Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.
摘要翻译：公开了用于改进堆叠模具组件中的电互连的方法，并且公开了具有通过该方法形成的结构特征的堆叠模具组件。所得到的堆叠的模具组件的特征在于具有减小的电互连故障。

3. 发明申请

US20110266684A1 Selective Die Electrical Insulation By Additive Process 有权
标题翻译：选择性模具电绝缘通过添加剂工艺
公开(公告)号：US20110266684A1
公开(公告)日：2011-11-03
申请号：US12913529
申请日：2010-10-27
申请人： Jeffrey S. Leal
发明人： Jeffrey S. Leal
IPC分类号： H01L21/28 , H01L21/31 , H01L23/48 , H01L21/768
CPC分类号： H01L24/82 , H01L21/02282 , H01L21/02288 , H01L21/31 , H01L21/324 , H01L21/56 , H01L21/76801 , H01L21/76828 , H01L24/19 , H01L24/24 , H01L24/25 , H01L25/0657 , H01L25/50 , H01L2224/19 , H01L2224/24145 , H01L2224/76155 , H01L2224/82051 , H01L2224/82101 , H01L2224/82102 , H01L2224/82355 , H01L2225/06524 , H01L2225/06551 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01056 , H01L2924/01074 , H01L2924/01082 , H01L2924/14
摘要： Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.
摘要翻译：使用添加剂方法来电绝缘模具堆叠上的选定表面区域; 以及用于在管芯堆叠中电互连管芯的方法包括用于电绝缘管芯的选定表面区域的添加工艺。根据本发明不是绝缘的区域可用于使用以可流动形式施加的导电材料进行电连接以制造导电迹线。

4. 发明申请

US20110037159A1 Electrically Interconnected Stacked Die Assemblies 有权
标题翻译：电连接堆叠模具组件
公开(公告)号：US20110037159A1
公开(公告)日：2011-02-17
申请号：US12913604
申请日：2010-10-27
申请人： Simon J. S. McElrea , Lawrence Douglas Andrews, JR. , Scott McGrath , Terrence Caskey , Scott Jay Crane , Marc E. Robinson , Loreto Cantillep
发明人： Simon J. S. McElrea , Lawrence Douglas Andrews, JR. , Scott McGrath , Terrence Caskey , Scott Jay Crane , Marc E. Robinson , Loreto Cantillep
IPC分类号： H01L23/52
CPC分类号： H01L25/50 , H01L24/24 , H01L24/25 , H01L24/82 , H01L25/0657 , H01L2224/24011 , H01L2224/24145 , H01L2224/24226 , H01L2224/32145 , H01L2224/48091 , H01L2224/48095 , H01L2224/48145 , H01L2224/48465 , H01L2224/76155 , H01L2224/82102 , H01L2225/06524 , H01L2225/06551 , H01L2225/06555 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
摘要翻译：在堆叠组件配置中，堆叠中的连续裸片在芯片边缘处被偏移，在芯片边缘处设置芯片，并且芯片通过导电迹线互连。在一些实施例中，导电迹线由导电聚合物形成。提供了一种电绝缘保形涂层，其在电连接的管芯焊盘处具有开口。

5. 发明申请

US20100117224A1 Sensor 审中-公开
标题翻译：传感器
公开(公告)号：US20100117224A1
公开(公告)日：2010-05-13
申请号：US12638870
申请日：2009-12-15
申请人： Simon J. S. McElrea , Marc E. Robinson
发明人： Simon J. S. McElrea , Marc E. Robinson
IPC分类号： H01L23/538 , H01L23/48 , H01L21/30 , H01L21/50
CPC分类号： H01L27/14618 , H01L24/24 , H01L24/73 , H01L24/82 , H01L27/14636 , H01L2224/24146 , H01L2224/24226 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2924/1461 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2924/00
摘要： A sensor die in a sensor device includes a conformal dielectric coating over at least a die sidewall adjacent an interconnect edge and, in some devices, a conformal dielectric coating over at least part of the active area of the front side of the die. The sensor die can be connected to circuitry in a support by an electrically conductive material that is applicable in a flowable form, such as a curable electrically conductive polymer, which is applied onto or adjacent the dielectric coating on the die sidewall, and which is cured to complete connection between interconnect pads on the die and exposed sites on the support circuitry. In some devices, a coating over the active area of the sensor die provides mechanical and chemical protection for underlying structures in and on the die. In an image sensor device, for example, the coating over the image sensor array on the die is substantially optically transparent. Also, a package contains such a sensor die mounted on and electrically connected to a support; and assemblies include such a sensor die and additional die mounted on and electrically connected to opposite sides of a support. Also, methods are disclosed for making the sensor die, devices, packages, and assemblies.
摘要翻译：传感器装置中的传感器管芯包括至少一个邻近互连边缘的管芯侧壁和在一些器件中在管芯前侧的至少一部分有源区域上的共形绝缘涂层的共形绝缘涂层。传感器芯片可以通过可应用于可流动形式的导电材料（例如可固化导电聚合物）连接到支撑体中，该可固化导电聚合物被施加到模具侧壁上的电介质涂层上或附近，并被固化以完成管芯上的互连焊盘和支撑电路上的暴露部位之间的连接。在一些设备中，传感器管芯的有源区域上的涂层为模具中和模具上的底层结构提供机械和化学保护。在图像传感器装置中，例如，模具上的图像传感器阵列上的涂层基本上是光学透明的。另外，一个封装包含安装在支架上并与其电连接的传感器芯片; 并且组件包括这样的传感器管芯和安装在支撑件的相对侧并电连接到支撑件的相对侧的附加管芯。此外，公开了用于制造传感器管芯，器件，封装和组件的方法。

6. 发明申请

US20100052087A1 Image Sensor 审中-公开
标题翻译：图像传感器
公开(公告)号：US20100052087A1
公开(公告)日：2010-03-04
申请号：US12550012
申请日：2009-08-28
申请人： Simon J. S. McElrea , Marc E. Robinson
发明人： Simon J. S. McElrea , Marc E. Robinson
IPC分类号： H01L31/0203 , H01L31/0216 , H01L21/56
CPC分类号： H01L27/14618 , H01L24/24 , H01L27/14683 , H01L2224/48091 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： An image sensor die includes a conformal dielectric coating over at least a die sidewall adjacent an interconnect edge and, in some embodiments, a conformal dielectric coating over the image array area of the front side of the die. The die can be connected to circuitry in a support by an electrically conductive material that is applicable in a flowable form, such as a curable electrically conductive polymer, which is applied onto or adjacent the dielectric coating on the die sidewall, and which is cured to complete connection between interconnect pads on the die and exposed sites on the support circuitry. The coating over the image array area, at least, is substantially transparent to visible light, and provides mechanical and chemical protection for underlying structures in and on the image sensor. Also, a package contains such an image sensor die mounted on and electrically connected to a support; and assemblies include such an image sensor die and additional die mounted on and electrically connected to opposite sides of a support. Also, methods are disclosed for making the image sensor die, packages, and assemblies.
摘要翻译：图像传感器管芯包括在邻近互连边缘的至少一个管芯侧壁上的保形电介质涂层，并且在一些实施例中，在管芯前侧的图像阵列区域上包括共形绝缘涂层。模具可以通过可应用于可流动形式的导电材料（例如可固化导电聚合物）连接到支撑体中，该可固化导电聚合物施加到模具侧壁上的电介质涂层上或附近，并被固化至芯片上的互连焊盘和支撑电路上的暴露部位之间的完整连接。至少在图像阵列区域上的涂层对可见光基本上是透明的，并为图像传感器中和图像传感器上的底层结构提供机械和化学保护。此外，包装包含安装在支撑件上并电连接到支撑件的图像传感器模具; 并且组件包括这样的图像传感器裸片和安装在支撑件的相对侧并且电连接到支撑件的相对侧的附加模具。此外，公开了用于制造图像传感器管芯，封装和组件的方法。

7. 发明申请

US20090068790A1 Electrical Interconnect Formed by Pulsed Dispense 审中-公开
标题翻译：由脉冲分配形成的电气互连
公开(公告)号：US20090068790A1
公开(公告)日：2009-03-12
申请号：US12124097
申请日：2008-05-20
申请人： Terrence Caskey , Lawrence Douglas Andrews, JR. , Simon J.S. McElrea , Scott McGrath , Jeffrey S. Leal
发明人： Terrence Caskey , Lawrence Douglas Andrews, JR. , Simon J.S. McElrea , Scott McGrath , Jeffrey S. Leal
IPC分类号： H01L21/60 , H01L21/44
CPC分类号： H05K3/321 , H01L24/24 , H01L24/76 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L2224/24011 , H01L2224/24051 , H01L2224/24145 , H01L2224/244 , H01L2224/24998 , H01L2224/32145 , H01L2224/76155 , H01L2224/82007 , H01L2224/82102 , H01L2224/97 , H01L2225/06551 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01027 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H05K2203/0126 , H01L2224/82
摘要： Methods for depositing interconnect material at a target for electrical interconnection include pulsed dispense of the material. In some embodiments droplets of interconnect material are deposited in a projectile fashion. In some embodiments the droplets are shaped by movement of the deposition tool following a deposition pulse and prior to separation of the droplet mass from the tool.
摘要翻译：用于在用于电互连的靶上沉积互连材料的方法包括材料的脉冲分配。在一些实施例中，互连材料的液滴以抛射体的方式沉积。在一些实施例中，液滴通过沉积工具的运动在沉积脉冲之后并且在将液滴质量与工具分离之前成形。

8. 发明申请

US20080315407A1 THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USING TWO-DIMENSIONAL FABRICATION 审中-公开
标题翻译：使用二维制造的集成电路设备上形成的三维电路
公开(公告)号：US20080315407A1
公开(公告)日：2008-12-25
申请号：US12143157
申请日：2008-06-20
申请人： Lawrence Douglas Andrews, JR. , Simon J.S. McElrea , Terrence Caskey , Scott McGrath , Yong Du
发明人： Lawrence Douglas Andrews, JR. , Simon J.S. McElrea , Terrence Caskey , Scott McGrath , Yong Du
IPC分类号： H01L23/482 , G01R31/26 , H01L21/50 , H01L23/00
CPC分类号： G01R1/0483 , H01L24/02 , H01L24/16 , H01L24/31 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/16145 , H01L2224/24145 , H01L2224/9202 , H01L2224/94 , H01L2225/06513 , H01L2225/06527 , H01L2225/06551 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2224/03
摘要： Stackable integrated circuit devices include an integrated circuit die having interconnect pads on an active (front) side, the die having a front side edge at the conjunction of the front side of the die and a sidewall of the die, and a back side edge at the conjunction of back side of the die and the sidewall; the die further includes a conductive trace which is electrically connected to an interconnect pad and which extends over the front side edge of the die. In some embodiments the conductive trace further extends over the sidewall, and, in some such embodiments the conductive trace further extends over the back side edge of the die, and in some such embodiments the conductive trace further extends over the back side of the die. One or both of the die edges may be chamfered. Also, methods for making such a device. Also, assemblies including such a device electrically interconnected to underlying circuitry (e.g., die-to-substrate); and assemblies including a stack of at least two such devices interconnected die-to-die, or such a stack of devices electrically interconnected to underlying circuitry. Also, apparatus and methods for testing such a die.
摘要翻译：可堆叠集成电路器件包括具有在有源（正面）侧上的互连焊盘的集成电路管芯，该管芯具有在管芯的前侧和管芯侧壁的连接处的前侧边缘，模具的背面与侧壁的结合; 芯片还包括电连接到互连焊盘并且在模具的前侧边缘上延伸的导电迹线。在一些实施例中，导电迹线还在侧壁上延伸，并且在一些这样的实施例中，导电迹线还在模具的背侧边缘上延伸，并且在一些这样的实施例中，导电迹线还在模具的背面延伸。一个或两个模边可被倒角。另外，制造这种装置的方法。而且，包括这样的器件的组件电连接到底层电路（例如，裸片到衬底）; 以及包括至少两个这样的设备的堆叠的组件，这些设备互相连接到管芯上，或者这样一组电器互连到下面的电路。另外，用于测试这种模具的装置和方法。

9. 发明申请

US20080303131A1 ELECTRICALLY INTERCONNECTED STACKED DIE ASSEMBLIES 有权
标题翻译：电气互连堆叠式电池组件
公开(公告)号：US20080303131A1
公开(公告)日：2008-12-11
申请号：US12124077
申请日：2008-05-20
申请人： Simon J.S. McElrea , Lawrence Douglas Andrews, JR. , Scott McGrath , Terrence Caskey , Scott Jay Crane , Marc E. Robinson , Loreto Cantillep
发明人： Simon J.S. McElrea , Lawrence Douglas Andrews, JR. , Scott McGrath , Terrence Caskey , Scott Jay Crane , Marc E. Robinson , Loreto Cantillep
IPC分类号： H01L23/02
CPC分类号： H01L25/50 , H01L24/24 , H01L24/25 , H01L24/82 , H01L25/0657 , H01L2224/24011 , H01L2224/24145 , H01L2224/24226 , H01L2224/32145 , H01L2224/48091 , H01L2224/48095 , H01L2224/48145 , H01L2224/48465 , H01L2224/76155 , H01L2224/82102 , H01L2225/06524 , H01L2225/06551 , H01L2225/06555 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01033 , H01L2924/01038 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
摘要翻译：在堆叠组件配置中，堆叠中的连续裸片在芯片边缘处被偏移，在芯片边缘处设置芯片，并且芯片通过导电迹线互连。在一些实施例中，导电迹线由导电聚合物形成。提供了一种电绝缘保形涂层，其在电连接的管芯焊盘处具有开口。

10. 发明申请

US20110147943A1 WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS 有权
标题翻译：可堆叠集成电路板的水平面钝化
公开(公告)号：US20110147943A1
公开(公告)日：2011-06-23
申请号：US13041192
申请日：2011-03-04
申请人： Simon J. S. McElrea , Terrence Caskey , Scott McGrath , DeAnn Eileen Melcher , Reynaldo Co , Lawrence Douglas Andrews, JR. , Weiping Pan , Grant Villavicencio , Yong Du , Scott Jay Crane , Zongrong Liu
发明人： Simon J. S. McElrea , Terrence Caskey , Scott McGrath , DeAnn Eileen Melcher , Reynaldo Co , Lawrence Douglas Andrews, JR. , Weiping Pan , Grant Villavicencio , Yong Du , Scott Jay Crane , Zongrong Liu
IPC分类号： H01L23/48 , H01L21/78
CPC分类号： H01L21/6835 , H01L21/6836 , H01L21/78 , H01L23/3185 , H01L24/81 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68359 , H01L2221/68377 , H01L2224/2919 , H01L2224/81801 , H01L2224/83851 , H01L2924/14 , H01L2924/1461 , H01L2924/0665 , H01L2924/00014 , H01L2924/00
摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
摘要翻译：至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

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