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1. 发明公开

US20240311667A1 SIMULATING QUANTUM COMPUTING CIRCUITS USING SPARSE STATE PARTITIONING 审中-公开
公开(公告)号：US20240311667A1
公开(公告)日：2024-09-19
申请号：US18185857
申请日：2023-03-17
申请人： NVIDA Corporation
发明人： Matthew JONES , Taylor Lee PATTI
IPC分类号： G06N10/20
CPC分类号： G06N10/20
摘要： In various examples, systems and methods for simulating quantum circuits using sparse state partitioning are provided. The quantum state of a quantum circuit may be partitioned into one or more state vector partition candidates that may form sparse state partitions that avoid memory operations for one or more state elements of the quantum circuit's state vector. Gate grouping, gate complexity, and/or qubit ordering optimization algorithms may be applied and the state vector partition candidate evaluated against a computing platform topology profile using a cost evaluation function. The cost evaluation function may estimate an efficiency associated with executing that state vector partition candidate given the processing resources of the currently available simulation platform for running the simulation. A state vector partition candidate optimized for the simulation platform may be passed to the simulation platform as a set of state vector partitions in order to simulate the quantum circuit.

2. 发明申请

US20110134132A1 METHOD AND SYSTEM FOR TRANSPARENTLY DIRECTING GRAPHICS PROCESSING TO A GRAPHICAL PROCESSING UNIT (GPU) OF A MULTI-GPU SYSTEM 有权
标题翻译：用于图形处理图形处理单元（GPU）的多GPU系统的方法和系统
公开(公告)号：US20110134132A1
公开(公告)日：2011-06-09
申请号：US12630541
申请日：2009-12-03
申请人： Andreas Wolf
发明人： Andreas Wolf
IPC分类号： G06T1/00 , G06F15/16 , G09G5/36
CPC分类号： G06F9/5027 , G06F3/1423 , G06F3/1454 , G09G5/363 , G09G2360/02 , G09G2360/06 , G09G2370/022
摘要： A method for transparently directing data in a multi-GPU system. A driver application receives a first plurality of graphics commands from a first graphics application and selects a first GPU from the multi-GPU system to exclusively process the first plurality of graphics commands. The first plurality of graphics commands is transmitted to the first GPU for processing and producing a first plurality of renderable data. The first plurality of renderable data is stored in a first frame buffer associated with the first GPU. A second plurality of graphics commands is received from a second graphics application and a second GPU is selected to exclusively process the second plurality of graphics commands. The second GPU processing the second plurality of graphics commands produces a second plurality of renderable data. The second plurality of renderable data is stored in a second frame buffer associated with the second GPU.
摘要翻译：一种在多GPU系统中透明地指导数据的方法。驾驶员应用程序从第一图形应用程序接收第一多个图形命令，并从多GPU系统中选择第一GPU以专门处理第一多个图形命令。第一多个图形命令被发送到第一GPU，用于处理和产生第一多个可渲染数据。第一多个可渲染数据被存储在与第一GPU相关联的第一帧缓冲器中。从第二图形应用接收第二多个图形命令，并且选择第二GPU来专门处理第二多个图形命令。处理第二多个图形命令的第二GPU产生第二多个可渲染数据。第二多个可渲染数据被存储在与第二GPU相关联的第二帧缓冲器中。

3. 发明公开

US20240353471A1 INTEGRATED CURRENT MONITOR USING VARIABLE DRAIN-TO-SOURCE VOLTAGES 审中-公开
公开(公告)号：US20240353471A1
公开(公告)日：2024-10-24
申请号：US18303852
申请日：2023-04-20
申请人： NVIDA Corporation
发明人： Miguel Rodriguez , Suhas Satheesh , Tezaswi Raja , Nishit Harshad Shah
IPC分类号： G01R31/26
CPC分类号： G01R31/2648
摘要： Circuitry and a method of determining electrical characteristics of material local to a specific area of a semiconductor wafer is disclosed. In one embodiment, an IC is disclosed that comprises at least one processing subsystem and at least one integrated common current monitor (ICCM) located within the processing subsystem(s). In one embodiment, the ICCM includes current-to-voltage conversion circuitry that converts a current throughput (IDUT) of a selected at least one of the plurality of DUTs to a corresponding voltage for a plurality of regulated drain-to-source voltages (VDS) across the selected DUT(s). In one embodiment, the ICCM is configured to determine a duty cycle of a voltage that corresponds to the IDUT and IDUT represents electrical characteristics of material local to an area of a semiconductor wafer specific to a location where the ICCM is located.

4. 发明公开

US20240338280A1 EFFICIENT IO PROCESSING IN A STORAGE SYSTEM WITH INSTANT SNAPSHOT, XCOPY, AND UNMAP CAPABILITIES 审中-公开
公开(公告)号：US20240338280A1
公开(公告)日：2024-10-10
申请号：US18624619
申请日：2024-04-02
申请人： Nvida Corporation
发明人： Jin Wang , Siamak Nazari
IPC分类号： G06F11/14 , G06F3/06
CPC分类号： G06F11/1451 , G06F3/061 , G06F3/0653 , G06F3/0659 , G06F3/0665 , G06F3/0689 , G06F11/1464 , G06F11/1469 , G06F2201/835 , G06F2201/84
摘要： A method for a storage system to process input and output operations. The method includes receiving writes over time to an address at a base virtual volume, storing each of the writes in a physical storage at a new location that is without existing data, tagging each stored write with a different generation number to distinguish between different versions of data written to the address at the base virtual volume, receiving a read of the address at the base virtual volume, and, in response to the read of the address at the base virtual volume, returning one of the stored writes that is tagged with a newer generation number than a remainder of the stored writes.

5. 发明授权

US07292242B1 Clipping with addition of vertices to existing primitives 有权
标题翻译：对现有原语加上顶点进行剪切
公开(公告)号：US07292242B1
公开(公告)日：2007-11-06
申请号：US10917093
申请日：2004-08-11
申请人： Craig M. Wittenbrink , Henry Packard Moreton , Douglas A. Voorhies , John S. Montrym , Vimal S. Parikh
发明人： Craig M. Wittenbrink , Henry Packard Moreton , Douglas A. Voorhies , John S. Montrym , Vimal S. Parikh
IPC分类号： G06T15/40
CPC分类号： G06T15/30
摘要： Clipping techniques introduce additional vertices into existing primitives without requiring creation of new primitives. For an input triangle with one vertex on the invisible side of a clipping surface, a quadrangle can be defined. The vertices of the quadrangle are the two internal vertices of the input triangle and two clipped vertices. For determining attribute values for pixel shading, three vertices of the quadrangle are selected, and a parameter value for an attribute equation is computed using the three selected vertices. For determining pixel coverage for the quadrangle, the three edges that do not correspond to the edge created by clipping are used.
摘要翻译：剪切技术将额外的顶点引入现有的基元，而不需要创建新的基元。对于在剪切表面的不可见侧有一个顶点的输入三角形，可以定义四边形。四边形的顶点是输入三角形的两个内部顶点和两个剪切顶点。为了确定像素阴影的属性值，选择四边形的三个顶点，并且使用三个选定的顶点来计算属性方程的参数值。为了确定四边形的像素覆盖率，使用与削波产生的边缘不对应的三个边。

6. 发明授权

US08558835B2 System, method, and computer program product for consistent image synthesis 有权
标题翻译：系统，方法和计算机程序产品，用于一致的图像合成
公开(公告)号：US08558835B2
公开(公告)日：2013-10-15
申请号：US12512782
申请日：2009-07-30
申请人： Alexander Keller , Carsten A. Wächter , Michael R. Kaplan
发明人： Alexander Keller , Carsten A. Wächter , Michael R. Kaplan
IPC分类号： G06T17/00 , G06T15/00
CPC分类号： G06T1/00
摘要： A system, method, and computer program product are provided for focusing computing power to a region of interest that can be changed interactively and arbitrarily during the process of image synthesis. In operation, a problem domain is partitioned utilizing a first selected technique. Additionally, a number of samples to be drawn per partition are assigned utilizing a second selected technique. Furthermore, the assigned number of samples are drawn for each partition, where the samples are generated by only one deterministic sample sequence. Still yet, the partitioning, assigning, and drawing are capable of being repeated such that existing partitions and assignments are capable of remaining unchanged during sampling and a convergence speed is adapted without compromising convergence in at least one of a sequential computing environment or a parallel computing environment. In this way, the convergence of image synthesis is not compromised. In fact, the image synthesis process may converge to the same solution that would have been obtained without interaction.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于将计算能力聚焦到在图像合成过程中可以交互地和任意地改变的感兴趣区域。在操作中，利用第一选择的技术来划分问题域。另外，利用第二选择的技术来分配要分割的多个样本。此外，为每个分区绘制分配的样本数，其中样本仅由一个确定性样本序列生成。仍然，分区，分配和绘图能够被重复，使得现有的分区和分配能够在采样期间保持不变，并且适应收敛速度而不损害顺序计算环境或并行计算中的至少一个中的收敛环境。以这种方式，图像合成的收敛性不受影响。事实上，图像合成过程可能会收敛到在没有交互的情况下获得的相同解决方案。

7. 发明授权

US08558832B1 System, method, and computer program product for generating a plurality of two-dimensional images and depth maps for a scene at a point in time 有权
标题翻译：用于在某个时间点生成多个二维图像和场景的深度图的系统，方法和计算机程序产品
公开(公告)号：US08558832B1
公开(公告)日：2013-10-15
申请号：US11765382
申请日：2007-06-19
申请人： David Robert Cook , Gerrit A. Slavenburg , Viatcheslav V. Gostrenko
发明人： David Robert Cook , Gerrit A. Slavenburg , Viatcheslav V. Gostrenko
IPC分类号： G06T15/40 , H04N13/00 , G06K9/00
CPC分类号： H04N13/161 , H04N13/271 , H04N13/275 , H04N13/282 , H04N2213/005
摘要： A system, method, and computer program product are provided for generating a plurality of two-dimensional images and a plurality of depth maps for a scene at a point in time. In various embodiments, such two-dimensional images and depth maps may be utilized to generate a plurality of images.
摘要翻译：提供了一种系统，方法和计算机程序产品，用于在某个时间点产生多个二维图像和多个用于场景的深度图。在各种实施例中，可以利用这种二维图像和深度图来生成多个图像。

8. 发明授权

US08237725B1 Vertex cache map mode for per-vertex state changes 有权
标题翻译：顶点状态改变的顶点缓存映射模式
公开(公告)号：US08237725B1
公开(公告)日：2012-08-07
申请号：US11935239
申请日：2007-11-05
申请人： James C. Bowman , Dane T. Mrazek , Sameer M. Gauria
发明人： James C. Bowman , Dane T. Mrazek , Sameer M. Gauria
IPC分类号： G09G5/36
CPC分类号： G06T15/005 , G06T2210/52
摘要： A vertex cache within a graphics processor is configured to operate as a conventional round-robin streaming cache when per-vertex state changes are not used and is configured to operate as a random access storage buffer when per-vertex state changes are used. Batches of vertices that define primitives and state changes are output to parallel processing units for processing according to vertex shader program. In addition to allowing per-vertex state changes, the vertex cache is configured to store vertices for primitive topologies that use anchor points, such as triangle strips, line loops, and polygons.
摘要翻译：图形处理器中的顶点高速缓存被配置为当不使用每顶点状态改变时作为常规循环流缓存操作，并且当使用每顶点状态改变时被配置为作为随机存取存储缓冲器操作。定义基元和状态变化的顶点批次将输出到并行处理单元，以根据顶点着色器程序进行处理。除了允许每顶点状态改变之外，顶点缓存被配置为存储使用锚点的原始拓扑的顶点，例如三角形条，线环和多边形。

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