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1. 发明申请

US20140238133A1 CAPACITANCE DETECTION CIRCUIT 有权
标题翻译：电容检测电路
公开(公告)号：US20140238133A1
公开(公告)日：2014-08-28
申请号：US14350807
申请日：2012-11-12
申请人： FUJI ELECTRIC CO., LTD.
发明人： Masami Kishiro
IPC分类号： G01P15/125
CPC分类号： G01P15/125 , G01L9/12 , G01P15/18 , G01P2015/084 , G01R27/2605
摘要： A capacitance detection circuit inhibits noise. The capacitance detection circuit detects a change in capacitance between a pair of electrodes of a physical quantity sensor, with these electrodes generating the change in capacitance in response to a change in physical quantity. The capacitance detection circuit has a carrier signal generating circuit that supplies a carrier signal to one of the electrodes, an operational amplifier that has an inverting input terminal to which the other one of the electrodes is input, a dummy capacity that is connected in parallel to the pair of electrodes, and a carrier signal conditioning circuit that inverts a phase of a carrier signal supplied from the carrier signal generating circuit to the dummy capacity and adjusts a gain to inhibit the dummy capacity.
摘要翻译：电容检测电路抑制噪声。电容检测电路检测物理量传感器的一对电极之间的电容变化，这些电极响应于物理量的变化而产生电容的变化。电容检测电路具有载波信号发生电路，其向一个电极提供载波信号，具有输入另一个电极的反相输入端的运算放大器，并联连接的虚拟容量一对电极和载波信号调理电路，其将从载波信号发生电路提供的载波信号的相位反转到虚拟容量，并调整增益以抑制虚拟容量。

2. 发明申请

US20170243962A1 RB-IGBT 有权
公开(公告)号：US20170243962A1
公开(公告)日：2017-08-24
申请号：US15390680
申请日：2016-12-26
申请人： FUJI ELECTRIC CO., LTD.
发明人： Hong-fei LU
IPC分类号： H01L29/739 , H01L29/66 , H01L29/08 , H01L29/417 , H01L29/06 , H01L29/10
CPC分类号： H01L29/7395 , H01L29/0619 , H01L29/0649 , H01L29/0696 , H01L29/0804 , H01L29/0821 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/417 , H01L29/41708 , H01L29/66333 , H01L29/66348 , H01L29/7397
摘要： An RB-IGBT is provided that has a new emitter trench structure with improved breakdown voltage achieved by improving the electrical field distribution of the drift region. The RB-IGBT includes an isolation region having a first conductivity type on a side surface of a semiconductor substrate. The semiconductor substrate includes a drift region having a second conductivity type; a collector region having the first conductivity type and provided farther downward than the drift region; and an emitter trench portion provided extending to the drift region in a thickness direction from a front surface to a back surface of the semiconductor substrate. The emitter trench portion includes a trench electrode electrically connected to an emitter electrode provided above the semiconductor substrate; an upper trench insulating film directly contacting a bottom portion and side portions of the trench electrode; and a lower trench insulating film provided below the upper trench insulating film.

3. 发明公开

US20240387725A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240387725A1
公开(公告)日：2024-11-21
申请号：US18790357
申请日：2024-07-31
申请人： FUJI ELECTRIC CO., LTD.
发明人： Keiji OKUMURA
IPC分类号： H01L29/78 , H01L29/06 , H01L29/16 , H01L29/167
CPC分类号： H01L29/7813 , H01L29/0684 , H01L29/1608 , H01L29/167
摘要： A silicon carbide semiconductor device, including: a semiconductor substrate; a first semiconductor region, a second semiconductor region and a third semiconductor region provided in the semiconductor substrate; a first trench penetrating through the third semiconductor region and the second semiconductor region in a depth direction and terminating in the first semiconductor region; a gate electrode provided in the first trench, via a gate insulating film; a plurality of second trenches penetrating through the third semiconductor region in the depth direction and terminating in the second semiconductor region; a fourth semiconductor region provided opposing, in the depth direction, a portion of the second semiconductor region that is below a bottom of each of the plurality of second trenches; and a first electrode and a second electrode provided at two main surfaces of the semiconductor substrate.

4. 发明公开

US20240387473A1 SEMICONDUCTOR MODULE 审中-公开
公开(公告)号：US20240387473A1
公开(公告)日：2024-11-21
申请号：US18588212
申请日：2024-02-27
申请人： FUJI ELECTRIC CO., LTD.
发明人： Tomoya KISHI
IPC分类号： H01L25/07 , H01L23/00 , H01L23/498
CPC分类号： H01L25/072 , H01L23/49844 , H01L24/48 , H01L2224/48227 , H01L2924/13055 , H01L2924/13091
摘要： A semiconductor module includes semiconductor units arrayed in a line, a first sensing terminal disposed on a first side of the line, and a second sensing terminal disposed on a second side of the line. Each semiconductor unit includes an upper arm circuit, a lower arm circuit, and an insulating substrate including a first conductor pattern. The first sensing terminal is connected to an emitter of a first semiconductor chip included in any one semiconductor unit via a first wiring route including a first sensing conductor pattern provided on the insulating substrate. The second sensing terminal is connected to the emitter of the first semiconductor chip connected to the first sensing terminal, via a second wiring route including a second sensing conductor pattern provided on the insulating substrate separately from the first conductor pattern, without passing via the first conductor pattern.

5. 发明公开

US20240387314A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240387314A1
公开(公告)日：2024-11-21
申请号：US18618862
申请日：2024-03-27
申请人： FUJI ELECTRIC CO., LTD.
发明人： Katsumi TANIGUCHI
IPC分类号： H01L23/367 , H01L23/495 , H01L23/528 , H01L23/532
CPC分类号： H01L23/367 , H01L23/4952 , H01L23/5283 , H01L23/5329
摘要： A semiconductor device includes a circuit board including: a heat dissipation base having a top surface; an insulating layer having a front surface, and a rear surface which is opposite to the front surface and which is disposed on the top surface of the heat dissipation base, the insulating layer having a placement area set therefor; and a conductive circuit layer having a rear surface which is disposed in the placement area of the insulating layer. A first thickness of the insulating layer in the placement area is less than a second thickness of the insulating layer in an outside area outside the placement area.

6. 发明公开

US20240385235A1 TEST METHOD 审中-公开
公开(公告)号：US20240385235A1
公开(公告)日：2024-11-21
申请号：US18581263
申请日：2024-02-19
申请人： FUJI ELECTRIC CO., LTD.
发明人： Kenichi ISHII
IPC分类号： G01R31/26
CPC分类号： G01R31/2608 , G01R31/2621
摘要： A test method of testing a test target transistor device is provided, the test method including: arranging the test target transistor device and a test transistor device in series between a high voltage side wire and a low voltage side wire; and causing a gate voltage applied to the test transistor device to be higher than a gate voltage applied to the test target transistor device. A difference between the gate voltage applied to the test transistor device and the gate voltage applied to the test target transistor device may be 5.0 V or less.

7. 发明公开

US20240380398A1 INTEGRATED CIRCUIT 审中-公开
公开(公告)号：US20240380398A1
公开(公告)日：2024-11-14
申请号：US18598655
申请日：2024-03-07
申请人： FUJI ELECTRIC CO., LTD.
发明人： Yuichi ITO
IPC分类号： H03K17/56 , G01L9/04
CPC分类号： H03K17/56 , G01L9/04
摘要： An integrated circuit includes a Wheatstone bridge and a bias voltage circuit. The Wheatstone bridge includes a first resistor connected between a first node on a high potential side at which a predetermined voltage is generated and a second node, a second resistor connected between the second node and a third node on a low potential side, a third resistor connected between the first node and a fourth node, and a fourth resistor connected between the fourth node and the third node. The bias voltage circuit includes a fifth resistor having a first end connected to the third node and a second end, and a first operational amplifier circuit having an inverting input terminal to which the second end of the fifth resistor is connected, a non-inverting input terminal configured to receive a reference voltage lower than the predetermined voltage, and an output terminal connected to the third node.

8. 发明公开

US20240379485A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240379485A1
公开(公告)日：2024-11-14
申请号：US18584127
申请日：2024-02-22
申请人： FUJI ELECTRIC CO., LTD.
发明人： Shinichi MASUDA , Takuya YAMAMOTO
IPC分类号： H01L23/367 , H01L23/00 , H01L25/07
CPC分类号： H01L23/367 , H01L24/32 , H01L25/072 , H01L2224/32227 , H01L2224/32238 , H01L2924/13055 , H01L2924/13091
摘要： A semiconductor device includes first and second semiconductor chips disposed away from each other by a chip distance on an insulated circuit board. A lower limit of the chip distance between the first and second semiconductor chips is set based on a first distance where a minimum thermal resistance of a heat dissipation path from a heat generation point on the front surface of the first semiconductor chip to a heat dissipation point on the bottom surface of the board is achieved with respect to the chip width of the first and second semiconductor chips. The heat dissipation point is positioned at the bottom surface of the board directly under a midpoint between the first and second semiconductor chips in side view.

9. 发明公开

US20240371993A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240371993A1
公开(公告)日：2024-11-07
申请号：US18587778
申请日：2024-02-26
申请人： FUJI ELECTRIC CO., LTD.
发明人： Takeyoshi NISHIMURA
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/7813 , H01L29/66734
摘要： A semiconductor device, including: a semiconductor substrate, a drift layer provided on the semiconductor substrate, a base layer provided in the drift layer at a surface thereof, a plurality of source regions selectively provided in the base layer at a surface thereof, a plurality of gate electrodes provided in the base layer and the source regions via a plurality of gate insulating films, respectively, an interlayer insulating film covering the source regions and the gate electrodes, a plurality of contact holes provided in the interlayer insulating film and in the source regions at the surfaces thereof, and a front electrode provided on the interlayer insulating film. A longitudinal direction of each contact hole is a first direction. The front electrode includes an upper electrode provided on a lower electrode, the upper electrode having a plurality of recesses formed therein each extending in a second direction orthogonal to the first direction.

10. 发明公开

US20240371642A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240371642A1
公开(公告)日：2024-11-07
申请号：US18777361
申请日：2024-07-18
申请人： FUJI ELECTRIC CO., LTD.
发明人： Yoshiharu KATO , Toru AJIKI , Takashi YOSHIMURA
IPC分类号： H01L21/265 , H01L29/06
CPC分类号： H01L21/265 , H01L29/0692
摘要： Provided is a semiconductor device comprising: a semiconductor substrate; a plurality of peaks of a doping concentration provided on a back surface of the semiconductor substrate; and a flat part, with a doping concentration more than or equal to 2.5 times a substrate concentration of the semiconductor substrate, provided between the plurality of peaks in a depth direction of the semiconductor substrate, wherein at least one of the plurality of peaks is a first peak provided on a front surface side relative to the flat part, wherein a doping concentration of the first peak is less than or equal to twice the doping concentration of the flat part.

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