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    • 4. 发明授权
    • Methods for manufacturing a soft error and defect resistant pre-metal dielectric layer
    • 用于制造软误差和缺陷的金属前介电层的方法
    • US07141503B2
    • 2006-11-28
    • US10877482
    • 2004-06-25
    • John NaughtonMark M. Nelson
    • John NaughtonMark M. Nelson
    • H01L21/302
    • H01L21/02274H01L21/02129H01L21/02164H01L21/022H01L21/02271H01L21/3105H01L21/31625H01L21/76801H01L21/76819H01L21/76822H01L21/76828H01L21/76832
    • A method for forming a pre-metallization layer on an underlying micro-structure, and a corresponding micro-structure formed by the method. The micro-structure may be a semiconductor circuit and/or a Micro-Electro-Mechanical Systems (MEMS) device. A first layer of undoped silicate glass is deposited on a micro-structure. Then, a layer of phospho silicate glass is deposited on the first layer of undoped silicate glass. This combination is then densified by applying a temperature to the combination that is sufficient to densify the layer of phospho-silicate glass, while being below the glass flow temperature. After densification, a second layer of undoped silicate glass is deposited on the densified layer of phospho silicate glass. Finally, the upper surface of the second layer of undoped silicate glass is polished using a chemical mechanical polishing process. The result is a dielectric layer of high density and low stress, and that reduces soft errors and defects.
    • 一种在下面的微结构上形成预金属化层的方法,以及通过该方法形成的相应的微结构。 微结构可以是半导体电路和/或微机电系统(MEMS)装置。 第一层未掺杂的硅酸盐玻璃沉积在微结构上。 然后,在第一层未掺杂的硅酸盐玻璃上沉积磷酸硅酸盐玻璃层。 然后通过将温度施加到足以使磷酸硅酸盐玻璃层致密化的温度,同时低于玻璃流动温度来使该组合致密化。 致密化后,第二层未掺杂的硅酸盐玻璃沉积在磷酸硅酸盐玻璃的致密化层上。 最后,使用化学机械抛光工艺抛光第二层未掺杂的硅酸盐玻璃的上表面。 结果是高密度和低应力的介电层,减少了软错误和缺陷。
    • 7. 发明授权
    • Low-voltage differential signal (LVDS) transmitter with high signal integrity
    • 具有高信号完整性的低压差分信号(LVDS)变送器
    • US07034574B1
    • 2006-04-25
    • US10920009
    • 2004-08-17
    • Zhongmin Li
    • Zhongmin Li
    • H03K19/0175
    • H04L25/028H04L25/0272
    • A differential signal output driver circuit having four switching transistors and having a bias transistor that shields each of the switching transistors from the corresponding output terminal thereby blocking the Miller capacitance of the switching capacitor from generating overshoot or undershoot in the output differential voltage. Also, the output driver circuit may be driven by a differential skew cancellation circuit that generates a balanced differential signal to drive the switching transistors to further improve signal integrity. The signal path for generating each signal in the differential signal goes through a similar structure thereby ensuring similar slew in each differential signal provided to the output driver circuit.
    • 具有四个开关晶体管并具有偏置晶体管的差分信号输出驱动器电路,该偏置晶体管将每个开关晶体管与相应的输出端屏蔽,从而阻止开关电容器的米勒电容在输出差分电压中产生过冲或下冲。 此外,输出驱动器电路可以由产生平衡差分信号的差分偏斜消除电路驱动,以驱动开关晶体管以进一步改善信号完整性。 用于产生差分信号中的每个信号的信号路径经过类似的结构,从而确保提供给输出驱动器电路的每个差分信号中的类似的转换。
    • 8. 发明授权
    • Method and apparatus for noise reduction particularly in hearing aids
    • 用于降噪的方法和装置,特别是在助听器中
    • US07016507B1
    • 2006-03-21
    • US09060825
    • 1998-04-16
    • Robert Brennan
    • Robert Brennan
    • A61F11/06G10K11/16H03B29/00
    • H03G9/025H03G7/06H03G9/005H04R3/00H04R25/356H04R25/505H04R25/70H04R2225/77
    • This invention describes a practical application of noise reduction in hearing aids. Although listening in noisy conditions is difficult for persons with normal hearing, hearing impaired individuals are at a considerable further disadvantage. Under light noise conditions, conventional hearing aids amplifying the input signal sufficiently to overcome the hearing loss. For a typical sloping hearing loss where there is a loss in high frequency hearing sensitivity, the amount of boost (or gain) rises with frequency. Most frequently, the loss in sensitivity is only for low-level signals; high level signals are affective minimally or not at all. A compression hearing aid is able to compensate by automatically lowering the gain as the input signal level rises. This compression action is usually compromised under noisy conditions. In general, hearing aids are of lesser benefit under noisy conditions since both noise and speech are boosted together when what is really required is a reduction of the noise relative to the speech. A noise reduction algorithm with the dual purpose of enhancing speech relative to noise and also providing a relatively clean signal for the compression circuitry is described.
    • 本发明描述了助听器中降噪的实际应用。 尽管在嘈杂的条件下听觉听力很难听觉受损,但听力受损的个体却处于相当的进一步劣势之中。 在轻微噪音条件下,常规的助听器可充分放大输入信号,以克服听力损失。 对于典型的倾斜听力损失,其中高频听力敏感性有损失,升压量(或增益)随着频率而上升。 最常见的是,灵敏度的损失只适用于低电平信号; 高级别的信号在最低限度或者根本不是情感上。 压缩助听器能够通过在输入信号电平升高时自动降低增益来补偿。 这种压缩作用通常在嘈杂条件下受到损害。 一般来说,助听器在嘈杂条件下的益处较小,因为当真正需要的是减少相对于语音的噪音时,噪音和语音都会被提升在一起。 描述了具有增强语音相对于噪声并且还为压缩电路提供相对干净的信号的双重目的的降噪算法。
    • 9. 发明授权
    • Temperature stable voltage reference circuit using a metal-silicon Schottky diode for low voltage circuit applications
    • 温度稳定的电压基准电路采用金属硅肖特基二极管作低压电路应用
    • US07009444B1
    • 2006-03-07
    • US10770233
    • 2004-02-02
    • Greg Scott
    • Greg Scott
    • G05F1/10
    • G05F3/30
    • Silicon-based voltage reference circuits that generate a temperature independent voltage reference that is less than even the silicon bandgap potential. The voltage reference circuit includes a diode-connected metal-silicon Schottky diode that is biased with a current. In this configuration, the anode terminal of the Schottky diode is a CTAT voltage source in this configuration. The anode terminal has a voltage at zero degrees Kelvin at the barrier height of the Schottky diode, which may differ depending on the metal chosen, but in most cases is less than the bandgap potential of silicon. The voltage reference circuit also includes a PTAT voltage source. The PTAT voltage may be generated in a variety of ways. An amplifier amplifies the PTAT voltage, and a summer adds the CTAT voltage to the amplified PTAT voltage to generate the temperature stable voltage reference.
    • 基于硅的电压参考电路,其产生小于甚至硅带隙电位的独立于温度的参考电压。 电压参考电路包括用电流偏置的二极管连接的金属硅肖特基二极管。 在该结构中,在该结构中,肖特基二极管的阳极端子是CTAT电压源。 阳极端子在肖特基二极管的势垒高度处具有零开尔文的电压,其可以根据所选择的金属而不同,但是在大多数情况下小于硅的带隙电位。 电压参考电路还包括PTAT电压源。 PTAT电压可以以各种方式产生。 放大器放大PTAT电压,并且加法器将CTAT电压加到放大的PTAT电压以产生温度稳定的电压基准。
    • 10. 发明授权
    • Double-sided extended drain field effect transistor, and integrated overvoltage and reverse voltage protection circuit that uses the same
    • 双面扩展漏极场效应晶体管,集成过电压和反向电压保护电路使用相同
    • US06867640B2
    • 2005-03-15
    • US10611714
    • 2003-07-01
    • Greg ScottJ. Marcos Laraia
    • Greg ScottJ. Marcos Laraia
    • H01L27/02G05F1/10G05F3/02
    • H01L27/0266
    • An integrated overvoltage and reverse voltage protection circuit that includes two p-channel double-sided extended drain transistors coupled to a high voltage source, each having their n-well coupled through a resistor to the high voltage source. For voltage regulation, a voltage divider is coupled in series with a first of these transistors, while the drain of the second transistor is coupled to the gate of the first transistor. For voltage blocking, the voltage divider may span the entire supply voltage. An n-channel transistor couples the second p-channel transistor to a low voltage source. A middle node in the voltage divider is coupled to one input of a comparator, with a reference voltage coupled to the second input. The comparator output drives the gate terminal of the n-channel transistor. A load to be protected may be disposed in parallel with the voltage divider.
    • 集成的过压和反向电压保护电路,其包括耦合到高电压源的两个p沟道双侧延伸漏极晶体管,每个具有通过电阻器连接到高电压源的n阱。 对于电压调节,分压器与这些晶体管中的第一个串联耦合,而第二晶体管的漏极耦合到第一晶体管的栅极。 对于电压阻塞,分压器可能跨越整个电源电压。 n沟道晶体管将第二p沟道晶体管耦合到低电压源。 分压器中的中间节点耦合到比较器的一个输入端,参考电压耦合到第二输入端。 比较器输出驱动n沟道晶体管的栅极端子。 要保护的负载可以与分压器并联设置。