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    • 1. 发明授权
    • Multiple stage high power diode
    • 多级大功率二极管
    • US06610999B2
    • 2003-08-26
    • US09851692
    • 2001-05-08
    • Zvonimir Z. BandicEric C. PiquetteThomas C. McGill
    • Zvonimir Z. BandicEric C. PiquetteThomas C. McGill
    • H01L310256
    • H01L29/1608H01L27/0814H01L27/095H01L29/2003H01L29/47H01L29/475H01L29/872
    • A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on an opposite surface of the semiconductor layer. The Schottky layer is formed from a metallic material with a high metal work function, and the ohmic contact is formed from a metallic material with a low metal work function. At least one of the stages is a middle stage located between two adjacent stages, such that the Schottky contact of the middle stage and the ohmic contact of one of the adjacent stages are joined together, and such that the ohmic contact of the middle stage and the Schottky contact of another one of the adjacent stages are joined together.
    • 肖特基整流器具有多个阶段,具有基本相同或非常相似的结构。 每个级包括氮化物基半导体层,形成在半导体层的一个表面上的肖特基接触和形成在半导体层的相对表面上的欧姆接触。 肖特基层由具有高金属功能的金属材料形成,并且欧姆接触由具有低金属功函数的金属材料形成。 至少一个阶段是位于两个相邻阶段之间的中间阶段,使得中间阶段的肖特基接触和相邻阶段之一的欧姆接触被连接在一起,并且使得中间阶段的欧姆接触和 另一个相邻级的肖特基接触被连接在一起。
    • 4. 发明授权
    • High power devices based on gallium nitride and aluminum gallium nitride
semiconductor heterostructures
    • 基于氮化镓和氮化镓铝半导体异质结构的大功率器件
    • US6144045A
    • 2000-11-07
    • US285484
    • 1999-04-02
    • Zvonimir Z. BandicEric C. PiquetteThomas C. McGill
    • Zvonimir Z. BandicEric C. PiquetteThomas C. McGill
    • H01L29/201H01L29/205H01L29/74H01L29/87
    • H01L29/87H01L29/201H01L29/205H01L29/74
    • High power thyristor-type devices comprising a first layer of p-type doped semiconductor alloy aluminum gallium nitride, a second layer of n-type doped aluminum gallium nitride with lower aluminum content than the first layer, a third layer of p-type doped aluminum gallium nitride with a higher aluminum content than the second layer, and a fourth layer of aluminum gallium nitride of n-type doping. The difference in hole and electron energies (band offsets) across the interface between aluminum gallium nitride and gallium nitride are such that hole and electron transfer are enhanced from aluminum gallium nitride to gallium nitride, or hole and electron transfer are suppressed from gallium nitride to aluminum gallium nitride. Aluminum content in layers 1 and 2 is chosen such that hole transfer in the forward biased conduction state of the device is enhanced, and suppressed in the reverse biased blocking state of the device. Aluminum content in layers 2 and 3 is chosen such that hole transfer in the forward biased blocking state of the device is suppressed, which reduces leakage current and enhances hole transfer into layer 2 when the device is changing from the forward biased blocking state to the forward biased conduction state. Triggering of the device may be provided by a gate contact to the third layer. Various exemplary embodiments are disclosed.
    • 大功率晶闸管型器件包括第一层p型掺杂半导体合金氮化铝镓,具有比第一层低的铝含量的n型掺杂的氮化铝镓的第二层,第三层p型掺杂的铝 具有比第二层高的铝含量的氮化镓,以及n型掺杂的第四层氮化镓铝。 氮化镓和氮化镓之间的界面上的空穴和电子能量(带偏移)的差异使得从氮化镓铝到氮化镓的空穴和电子转移增强,或者从氮化镓到铝的空穴和电子转移被抑制 氮化镓。 选择层1和2中的铝含量使得器件的正向偏置导通状态中的空穴传输增强,并且在器件的反向偏置阻塞状态下被抑制。 选择层2和3中的铝含量,使得器件的正向偏压阻挡状态下的空穴传输受到抑制,这降低了泄漏电流并且当器件从正向偏置阻塞状态向前转变时增强了到层2中的空穴传输 偏置导通状态。 可以通过与第三层的栅极接触来提供器件的触发。 公开了各种示例性实施例。
    • 5. 发明授权
    • ICC-NCQ command scheduling for shingle-written magnetic recording (SMR) Drives
    • 用于瓦楞纸磁记录(SMR)驱动器的ICC-NCQ命令调度
    • US08874875B2
    • 2014-10-28
    • US13537293
    • 2012-06-29
    • Zvonimir Z. BandicCyril Guyot
    • Zvonimir Z. BandicCyril Guyot
    • G06F12/10G06F12/02
    • G06F12/0292G06F12/0253G06F12/08G06F12/0875G06F12/10G11B5/012
    • ICC-NCQ priority and deadline information in conjunction with an estimation of command access time that is specific to SMR drives are used improve command queue optimization. Estimated completion times are determined based on the internal subcommands that the drive has to execute to complete the host read or write command taking into account whether all or part of the data will be or already is stored in write-twice cache, E-region and/or I-region. The command processor selects the next command for execution based on calculated access times with adjusted priority based on the specified deadline for the command. As the deadline approaches, the priority of the command increases. For high priority data writes as specified by a host, an optimized storage plan is selected as appropriate using the “write-twice cache” (WTC) region, E-region or I-region.
    • 使用ICC-NCQ优先级和截止日期信息以及特定于SMR驱动器的命令访问时间的估计来改进命令队列优化。 估计的完成时间是基于驱动器执行的内部子命令来确定的,以完成主机读或写命令,考虑到全部或部分数据是否已经存储在二次写入高速缓存,E区和 /或I区域。 命令处理器根据计划的访问次数,根据指定的最终期限,选择下一个执行命令,并以调整的优先级。 随着截止日期的到来,命令的优先级增加。 对于由主机指定的高优先级数据写入,使用“两倍写入高速缓存”(WTC)区域,E区域或I区域,适当地选择优化的存储方案。