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1. 发明授权

US06825098B2 Method for fabricating microstructures and arrangement of microstructures 有权
标题翻译：微结构的制作方法及微观结构的布置
公开(公告)号：US06825098B2
公开(公告)日：2004-11-30
申请号：US10606069
申请日：2003-06-25
申请人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
发明人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
IPC分类号： H10L2130
CPC分类号： H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method referred to as a “cellular damascene method” utilizes a multiplicity of regularly arranged closed cavities referred to as “cells”, which are produced in a patterning layer. The dimensions of the cavities are on the order of magnitude of the microstructures to be produced. Selected cavities are opened by providing a mask and partitions situated between adjacent opened cavities are removed to provide trenches and holes which are filled with the material of the microstructure to be fabricated. Protruding material is removed by means of a chemical-mechanical polishing step. The microstructures are, in particular, interconnects and contact holes of integrated circuit.
摘要翻译：称为“细胞镶嵌方法”的方法利用在图案化层中产生的多个规则排列的称为“单元”的闭合空腔。空腔的尺寸在待生产的微结构的数量级上。通过提供掩模来打开选定的空腔，并移除位于相邻的开放空腔之间的隔板，以提供用待制造的微结构材料填充的沟槽和孔。通过化学机械抛光步骤去除突起材料。微结构尤其是集成电路的互连和接触孔。

2. 发明申请

US20050054184A1 Method for fabricating microstructures and arrangement of microstructures 失效
标题翻译：微结构的制作方法及微观结构的布置
公开(公告)号：US20050054184A1
公开(公告)日：2005-03-10
申请号：US10972804
申请日：2004-10-25
申请人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
发明人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
IPC分类号： H01L21/768 , H01L23/522 , H01L21/8242 , H01L21/44
CPC分类号： H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method referred to as a “cellular damascene method” utilizes a multiplicity of regularly arranged closed cavities referred to as “cells”, which are produced in a patterning layer. The dimensions of the cavities are on the order of magnitude of the microstructures to be produced. Selected cavities are opened by providing a mask and partitions situated between adjacent opened cavities are removed to provide trenches and holes which are filled with the material of the microstructure to be fabricated. Protruding material is removed by means of a chemical-mechanical polishing step. The microstructures are, in particular, interconnects and contact holes of integrated circuit.
摘要翻译：称为“细胞镶嵌方法”的方法利用在图案化层中产生的多个规则排列的称为“单元”的闭合空腔。空腔的尺寸在待生产的微结构的数量级上。通过提供掩模来打开选定的空腔，并移除位于相邻的开放空腔之间的隔板，以提供用待制造的微结构材料填充的沟槽和孔。通过化学机械抛光步骤去除突起材料。微结构尤其是集成电路的互连和接触孔。

3. 发明授权

US07023063B2 Arrangement of microstructures 失效
标题翻译：微结构布置
公开(公告)号：US07023063B2
公开(公告)日：2006-04-04
申请号：US10972804
申请日：2004-10-25
申请人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
发明人： Zvonimir Gabric , Werner Pamler , Siegfried Schwarzl
IPC分类号： H01L31/113
CPC分类号： H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method referred to as a “cellular damascene method” utilizes a multiplicity of regularly arranged closed cavities referred to as “cells”, which are produced in a patterning layer. The dimensions of the cavities are on the order of magnitude of the microstructures to be produced. Selected cavities are opened by providing a mask and partitions situated between adjacent opened cavities are removed to provide trenches and holes which are filled with the material of the microstructure to be fabricated. Protruding material is removed by means of a chemical-mechanical polishing step. The microstructures are, in particular, interconnects and contact holes of integrated circuit.
摘要翻译：称为“细胞镶嵌方法”的方法利用在图案化层中产生的多个规则排列的称为“单元”的闭合空腔。空腔的尺寸在待生产的微结构的数量级上。通过提供掩模来打开选定的空腔，并移除位于相邻的开放空腔之间的隔板，以提供用待制造的微结构材料填充的沟槽和孔。通过化学机械抛光步骤去除突起材料。微结构尤其是集成电路的互连和接触孔。

4. 发明授权

US07259441B2 Hollow structure in an integrated circuit and method for producing such a hollow structure in an integrated circuit 有权
标题翻译：集成电路中的空心结构和在集成电路中制造这种中空结构的方法
公开(公告)号：US07259441B2
公开(公告)日：2007-08-21
申请号：US10469279
申请日：2002-02-15
申请人： Werner Pamler , Siegfried Schwarzl , Zvonimir Gabric
发明人： Werner Pamler , Siegfried Schwarzl , Zvonimir Gabric
IPC分类号： H01L29/00
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A pattern of voids in an integrated circuit having a first layer, a first layer surface and adjacent lands on the first layer surface, the adjacent lands enclosing spaces and including a second layer of a first isolation material and a third layer of a second isolation material arranged on the second layer. The pattern of voids has a fourth layer of a third isolation material which closes off at least some of the spaces and cannot be deposited on the first isolation material. The fourth layer is arranged on the third layer and has a second layer surface. Spaces that are not closed off by means of the fourth layer are filled with electrically conductive material. In the method for producing a pattern of voids in an integrated circuit, a second layer of a first isolation material is applied to a first layer surface of a first layer. A third layer of a second isolation material is applied to the second layer, the third layer acquiring a second layer surface which is arranged parallel to the first layer surface. Adjacent lands with spaces are formed from the second layer and the third layer. A third isolation material is selectively applied on the adjacent lands to the third layer, such that a fourth layer is formed between and above the adjacent lands. Parallel to the first layer surface, the fourth layer is partially removed until the second layer surface is uncovered. The fourth layer is completely removed above some spaces, and finally these spaces are filled with electrically conductive material in order to form electrical contacts between the first layer surface and the second layer surface, resulting in a pattern of voids.
摘要翻译：具有第一层，第一层表面和第一层表面上的相邻焊盘的集成电路中的空隙图案，相邻焊盘包围空间并且包括第二层第一隔离材料和第三层第二隔离材料布置在第二层上。空隙的图案具有第四隔离材料的第四层，其封闭至少一些空间并且不能沉积在第一隔离材料上。第四层布置在第三层上并具有第二层表面。未被第四层封闭的空间用导电材料填充。在集成电路中产生空隙图案的方法中，将第一隔离材料的第二层施加到第一层的第一层表面。将第三隔离材料层施加到第二层上，第三层获得平行于第一层表面布置的第二层表面。从第二层和第三层形成具有空间的相邻区域。第三隔离材料被选择性地施加到相邻的焊盘上到第三层，使得在相邻的焊盘之间和之上形成第四层。与第一层表面平行，第四层被部分去除，直到第二层表面未被覆盖。第四层在一些空间之上完全除去，最后这些空间填充有导电材料，以形成第一层表面和第二层表面之间的电接触，导致空隙图案。

5. 发明授权

US06686643B2 Substrate with at least two metal structures deposited thereon, and method for fabricating the same 有权
标题翻译：具有沉积在其上的至少两种金属结构的基板及其制造方法
公开(公告)号：US06686643B2
公开(公告)日：2004-02-03
申请号：US09725346
申请日：2000-11-29
申请人： Siegfried Schwarzl , Werner Pamler , Zvonimir Gabric
发明人： Siegfried Schwarzl , Werner Pamler , Zvonimir Gabric
IPC分类号： H01L2900
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002 , H01L2924/00
摘要： Metal structures that can be produced by a damascene process are disposed in a first insulating layer and a second insulating layer is disposed above the latter. There is in each case at least one cavity which is disposed between the metal structures, is disposed in the first insulating layer and is covered by the second insulating layer. The cavities and the metal structures are produced next to one another by self-aligned process steps.
摘要翻译：可以通过镶嵌工艺制造的金属结构设置在第一绝缘层中，并且第二绝缘层设置在第二绝缘层的上方。在每种情况下，设置在金属结构之间的至少一个空腔设置在第一绝缘层中并被第二绝缘层覆盖。腔和金属结构通过自对准工艺步骤彼此相邻地制造。

6. 发明授权

US5626279A Method for fastening a first substrate on a second substrate and employment of said method for manufacturing a three-dimensional circuit arrangement 失效
标题翻译：用于将第一基板紧固在第二基板上的方法，以及使用所述用于制造三维电路装置的方法
公开(公告)号：US5626279A
公开(公告)日：1997-05-06
申请号：US555855
申请日：1995-11-13
申请人： Werner Pamler , Siegfried Schwarzl
发明人： Werner Pamler , Siegfried Schwarzl
IPC分类号： H05K3/36 , H01L21/205 , H01L21/98 , H01L23/538 , H01L25/00 , H01L25/065 , H01L27/00 , H05K3/46 , H05K3/34
CPC分类号： H01L24/16 , H01L23/5385 , H01L24/31 , H01L25/0657 , H01L25/50 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/10329 , H01L2924/14 , H05K3/4614
摘要： For fastening a first substrate (11) on a second substrate (21), gallium is selectively deposited on the surface of electrically conductive structures (18) located on the first substrate (11), being deposited in a CVD process upon employment of a metalloorganic compound. After the joining of the substrates (11, 21), the gallium (19) is mixed with a metal (28) that forms a refractory intermetallic phase with gallium, this forming a firm connection between the substrates. The method can be especially utilized for cubic integration.
摘要翻译：为了将第一衬底（11）紧固在第二衬底（21）上，镓选择性地沉积在位于第一衬底（11）上的导电结构（18）的表面上，在使用金属有机物时以CVD工艺沉积复合。在接合基板（11,21）之后，将镓（19）与形成与镓的难熔金属间相的金属（28）混合，这在基板之间形成牢固的连接。该方法可以特别用于立方积分。

7. 发明申请

US20100119981A1 Passivation of Multi-Layer Mirror for Extreme Ultraviolet Lithography 有权
公开(公告)号：US20100119981A1
公开(公告)日：2010-05-13
申请号：US12692243
申请日：2010-01-22
申请人： Siegfried Schwarzl , Stefan Wurm
发明人： Siegfried Schwarzl , Stefan Wurm
IPC分类号： G03F7/20
CPC分类号： G03F7/70958 , B82Y10/00 , G03F7/70316 , G03F7/70916 , G21K1/062 , Y10T428/12667
摘要： A reflector structure suitable for extreme ultraviolet lithography (EUVL) is provided. The structure comprises a substrate having a multi-layer reflector. A capping layer is formed over the multi-layer reflector to prevent oxidation. In an embodiment, the capping layer is formed of an inert oxide, such as Al2O3, HfO2, ZrO2, Ta2O5, Y2O3-stabilized ZrO2, or the like. The capping layer may be formed by reactive sputtering in an oxygen environment, by non-reactive sputtering wherein the materials are sputtered directly from the respective oxide targets, by non-reactive sputtering of the metallic layer followed by full or partial oxidation (e.g., by natural oxidation, by oxidation in oxygen-containing plasmas, by oxidation in ozone (O3), or the like), by atomic level deposition (e.g., ALCVD), or the like.

8. 发明授权

US07417736B2 Method for determining a radiation power and an exposure apparatus 失效
公开(公告)号：US07417736B2
公开(公告)日：2008-08-26
申请号：US10599428
申请日：2005-03-31
申请人： Siegfried Schwarzl , Stefan Wurm
发明人： Siegfried Schwarzl , Stefan Wurm
IPC分类号： G01J3/00 , G01J5/46 , G01N21/55 , H01L31/00
CPC分类号： G03F7/70558 , G03F7/7085
摘要： Method for determining a mean radiation power P rad 0 _ of electromagnetic radiation of a radiation source, the radiation being intensity-modulated with modulation frequency ω0, in a predetermined time interval. The method provides a reflector designed to reflect electromagnetic radiation of the radiation source and electromagnetic radiation of a test radiation source, irradiates a predetermined area of the reflector with the source electromagnetic radiation, at least partially irradiates the predetermined area of the reflector with electromagnetic radiation of the test radiation source, measures a ω0-modulated power component Ptest,ω0(t) of a reflected test radiation power Ptest(t) of an electromagnetic radiation of the test radiation source, the radiation being reflected from the area, in the predetermined time interval, determines a mean value P test , ω 0 0 _ of the measured ω0-modulated power component Ptest,ω0(t) of the reflected test radiation power Ptest(t) in the predetermined time interval, and determines the mean radiation power P rad 0 _ from the relationship P rad 0 _ = a · P test , ω 0 0 _ , where a is a predetermined constant.

9. 发明授权

US07316933B2 Method for producing an annular microstructure element 有权
标题翻译：环形微结构元件的制造方法
公开(公告)号：US07316933B2
公开(公告)日：2008-01-08
申请号：US11112743
申请日：2005-04-22
申请人： Alfred Kersch , Wolfgang Raberg , Siegfried Schwarzl
发明人： Alfred Kersch , Wolfgang Raberg , Siegfried Schwarzl
IPC分类号： H01L21/00
CPC分类号： B82Y25/00 , B82Y40/00 , H01F10/265 , H01F41/30 , H01F41/308 , H01F41/34
摘要： An annular microstructure element, in particular an annularly arranged monolayer or multilayer thin film, is formed over a substrate (S), e.g., for use in a magnetoresistive memory. To that end, a masking layer is applied over the substrate. An opening (C) is etched into the masking layer, so that a partial region of the surface is uncovered. The etching operation is performed in such a way that the opening (C) is formed with an overhang (B). The overhang at least partially shades the uncovered surface from an incident particle beam (TS). A particle beam (TS) is directed at the substrate (S) at an oblique angle (α) of incidence. In this case, the substrate (S) is rotated relative to the directed particle beam (TS). From the particle beam, material is thereby deposited annularly on the uncovered surface for the purpose of forming a hole-like microstructure element (R).
摘要翻译：在衬底（S）上形成环形微结构元件，特别是环形布置的单层或多层薄膜，例如用于磁阻存储器。为此，在衬底上施加掩模层。将开口（C）蚀刻到掩模层中，使得表面的部分区域不被覆盖。蚀刻操作以使得开口（C）形成有突出部（B）的方式进行。突出部分至少部分地遮蔽未被覆盖的表面与入射的粒子束（TS）。粒子束（TS）以倾斜角（α）入射到基底（S）。在这种情况下，基板（S）相对于定向粒子束（TS）旋转。为了形成孔状微结构元件（R），从粒子束中，材料环状地沉积在未覆盖的表面上。

10. 发明授权

US07078134B2 Photolithographic mask having a structure region covered by a thin protective coating of only a few atomic layers and methods for the fabrication of the mask including ALCVD to form the thin protective coating 失效
标题翻译：具有仅由几个原子层覆盖的薄保护涂层的结构区域的光刻掩模和用于制造掩模的方法，包括ALCVD以形成薄的保护涂层
公开(公告)号：US07078134B2
公开(公告)日：2006-07-18
申请号：US10442739
申请日：2003-05-21
申请人： Stefan Wurm , Siegfried Schwarzl
发明人： Stefan Wurm , Siegfried Schwarzl
IPC分类号： G03F1/14 , G03F1/08 , G21K5/00
CPC分类号： G21K1/062 , B82Y10/00 , B82Y40/00 , G03F1/24 , G03F1/48 , Y10S430/162
摘要： A photolithographic mask for patterning a photosensitive material, in particular on a wafer, has at least one structure region for imaging a structure on the photosensitive material, and an absorber structure for absorbing incident radiation. At least one structure region is provided and has at least one thin protective coating of only a few atomic layers made of chemically and mechanically resistive material selected from Al2O3, Ta2O5, ZrO2, and HfO2formed by atomic layer chemical vapor deposition (ALCVD) so that the protective coating constitutes a negligible alteration of nominal or critical dimensions for the structure region, and in which additional absorption or reflection losses are negligibly low. In this way, the photolithographic mask can be cleaned chemically and/or mechanically, without the structure regions being attacked and damaged by the chemical and/or mechanical cleaning media. Furthermore, a plurality of methods are possible for fabricating this photolithographic mask.
摘要翻译：用于图案化感光材料，特别是在晶片上的光刻掩模具有用于对感光材料上的结构进行成像的至少一个结构区域和用于吸收入射辐射的吸收体结构。提供至少一个结构区域，并且具有由化学和机械电阻材料制成的仅几个原子层的至少一个薄保护涂层，其选自Al 2 O 3，Ta 通过原子层化学气相沉积（ALCVD）形成的O 2 O 5，ZrO 2 2和HfO 2 2，使得保护涂层构成对于结构区域的标称或临界尺寸的可忽略的变化，并且附加的吸收或反射损失可忽略不计。以这种方式，可以化学和/或机械地清洁光刻掩模，而不会使结构区域被化学和/或机械清洁介质侵蚀和损坏。此外，制造这种光刻掩模的方法是可能的。

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