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    • 1. 发明授权
    • Efficient method to detect process induced defects in the gate stack of flash memory devices
    • 高效的方法来检测闪存器件的栅极堆叠中的工艺引起的缺陷
    • US06717850B1
    • 2004-04-06
    • US10313676
    • 2002-12-05
    • Jiang LiNian YangZhigang WangJohn Jianshi Wang
    • Jiang LiNian YangZhigang WangJohn Jianshi Wang
    • G11C1604
    • G11C29/50G11C16/04G11C2029/0403
    • A method of processing a semiconductor device is disclosed and comprises applying a relatively high voltage across a gate stack of a flash memory cell for a certain period of time. Then, the polarity of the applied voltage is reversed and is again applied across the gate stack for another certain period of time. The voltage applied is greater than a channel erase voltage utilized for the memory cell. This applied voltage causes extrinsic defects to become amplified at interfaces of oxide/insulator layers of the gate stack. Then, the memory cell is tested (e.g., via a battery of tests) in order to determine if the memory cell is defective. If the cell is defective (e.g., fails the test), it can be assumed that substantial extrinsic defects were present in the memory cell and have been amplified resulting in the test failure. If the cell passes the test, it can be assumed that the memory cell is substantially free from extrinsic defects. Defective memory cells/devices can be marked or otherwise indicated as being defective.
    • 公开了一种处理半导体器件的方法,并且包括在闪存单元的栅极堆叠上施加相当高的电压一段时间。 然后,施加的电压的极性反转,并再次施加在栅极堆叠另外一段时间。 施加的电压大于用于存储器单元的通道擦除电压。 该施加的电压导致外部缺陷在栅极堆叠的氧化物/绝缘体层的界面处被放大。 然后,测试存储器单元(例如,通过测试电池),以便确定存储器单元是否有故障。 如果细胞有缺陷(例如,测试失败),则可以认为在存储单元中存在大量的外在缺陷并且被放大,导致测试失败。 如果单元通过测试,则可以认为存储单元基本上没有外在缺陷。 存储器单元/器件不良或可能被标记为有缺陷。
    • 3. 发明授权
    • Method for repairing over-erasure of fast bits on floating gate memory devices
    • 修复浮动栅极存储器件上快速位擦除的方法
    • US06643185B1
    • 2003-11-04
    • US10215140
    • 2002-08-07
    • Zhigang WangNian YangJiang Li
    • Zhigang WangNian YangJiang Li
    • G11C1604
    • G11C16/3404
    • A method for repairing over-erasure of floating gate memory devices. Specifically, one embodiment of the present invention discloses a method for performing a program disturb operation on an array of memory cells for repairing over-erasure of fast bits. The program disturb operation is applied simultaneously to the entire array making it compatible with channel erase schemes. The fast bits are programmed back to a normal state above 0 Volts by applying a substrate voltage to a substrate common to the array of memory cells. A gate voltage is applied to a plurality of word lines coupled to control gates of said array of memory cells. A program pulse time for applying voltages ranges from approximately 10 microseconds to 1 second. A voltage differential between a control gate and the substrate in a memory cell is in the range of approximately 9 Volts to about 20 Volts.
    • 一种用于修复浮动栅极存储器件的过度擦除的方法。 具体地,本发明的一个实施例公开了一种用于对用于修复快速位的擦除的存储器单元阵列执行编程干扰操作的方法。 编程干扰操作同时应用于整个阵列,使其与信道擦除方案兼容。 通过将衬底电压施加到存储器单元阵列共用的衬底上,快速位被编程回0伏以上的正常状态。 栅极电压被施加到耦合到所述存储器单元阵列的控制栅极的多个字线。 用于施加电压的编程脉冲时间范围从大约10微秒到1秒。 存储器单元中的控制栅极和衬底之间的电压差在大约9伏至大约20伏的范围内。
    • 4. 发明授权
    • Hybrid flash memory device
    • 混合闪存设备
    • US08560756B2
    • 2013-10-15
    • US11873810
    • 2007-10-17
    • Nian YangJiang LiFan Wan Lai
    • Nian YangJiang LiFan Wan Lai
    • G06F12/00
    • G06F12/0638G11C11/005G11C16/0408
    • A hybrid memory system is provided that combines the advantages of NAND flash memory devices with the advantages of NOR flashes memory devices. The system includes a NAND flash memory portion to provide mass storage and fast programming/erasure capabilities of conventional NAND flash memory devices. The system further comprises a NOR flash memory portion to provide code storage and fast random reading capabilities of conventional NOR flash memory devices. Accordingly, the hybrid memory system provides both mass storage and code storage along with fast programming/erasure speeds and fast random access speeds.
    • 提供了混合存储器系统,其结合NAND闪存器件的优点与NOR闪存存储器件的优点。 该系统包括NAND闪速存储器部分,用于提供大容量存储和传统NAND闪速存储器件的快速编程/擦除能力。 该系统还包括NOR闪速存储器部分,以提供常规NOR闪存器件的代码存储和快速随机读取能力。 因此,混合存储器系统同时提供大容量存储和代码存储以及快速编程/擦除速度和快速随机存取速度。
    • 5. 发明申请
    • HYBRID FLASH MEMORY DEVICE
    • 混合闪存存储器件
    • US20090106481A1
    • 2009-04-23
    • US11873810
    • 2007-10-17
    • Nian YangJiang LiFan Wan Lai
    • Nian YangJiang LiFan Wan Lai
    • G06F12/00
    • G06F12/0638G11C11/005G11C16/0408
    • A hybrid memory system is provided that combines the advantages of NAND flash memory devices with the advantages of NOR flashes memory devices. The system includes a NAND flash memory portion to provide mass storage and fast programming/erasure capabilities of conventional NAND flash memory devices. The system further comprises a NOR flash memory portion to provide code storage and fast random reading capabilities of conventional NOR flash memory devices. Accordingly, the hybrid memory system provides both mass storage and code storage. along with fast programming/erasure speeds and fast random access speeds.
    • 提供了混合存储器系统,其结合NAND闪存器件的优点与NOR闪存存储器件的优点。 该系统包括NAND闪速存储器部分,用于提供大容量存储和传统NAND闪速存储器件的快速编程/擦除能力。 该系统还包括NOR闪速存储器部分,以提供常规NOR闪存器件的代码存储和快速随机读取能力。 因此,混合存储器系统提供大容量存储和代码存储。 以及快速的编程/擦除速度和快速的随机存取速度。
    • 9. 发明授权
    • Network address translators (NAT) type detection techniques
    • 网络地址转换器(NAT)类型检测技术
    • US09160794B2
    • 2015-10-13
    • US12328296
    • 2008-12-04
    • Qingwei LinJiang LiJian-guang LouYusuo HuFan Li
    • Qingwei LinJiang LiJian-guang LouYusuo HuFan Li
    • G06F15/16H04L29/08H04L12/26H04L29/12H04L12/24H04L29/06
    • H04L67/104H04L29/12339H04L41/12H04L43/50H04L61/2503H04L69/28
    • Techniques described herein enable peers to determine each peer's NAT type much more efficiently and quickly than when compared with existing techniques. To do so, a peer simultaneously sends multiple test messages to a server. The peer then waits to either receive a response for each of the multiple test messages or may store an indication that no response has been received after a predetermined timeout period. The peer then analyzes the received responses and/or the stored timeout indications to determine the peer's NAT type or to determine that the peer is operating free from concealment by a NAT/firewall device. By simultaneously sending the multiple test messages, the peer may determine the NAT type within a maximum time defined by the predetermined timeout period or a roundtrip time period that is required for communication between the peer and the server. As such, the tools allow for efficient NAT-type detection.
    • 本文描述的技术使得对等体能够比与现有技术相比更有效和快速地确定每个对等体的NAT类型。 为此,对等体同时向服务器发送多个测试消息。 然后,对等体等待接收多个测试消息中的每一个的响应,或者可以存储在预定的超时时段之后没有接收到响应的指示。 对等体然后分析接收到的响应和/或存储的超时指示以确定对等体的NAT类型或者确定对等体正在从NAT /防火墙设备的隐藏中运行。 通过同时发送多个测试消息,对等体可以在由对等体和服务器之间的通信所需的预定超时时间段或往返时间周期限定的最大时间内确定NAT类型。 因此,这些工具允许有效的NAT类型检测。