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1. 发明申请

US20050006643A1 Memory device and methods of using and making the device 有权
标题翻译：内存设备和使用和制造设备的方法
公开(公告)号：US20050006643A1
公开(公告)日：2005-01-13
申请号：US10818261
申请日：2004-04-02
申请人： Zhida Lan , Michael Van Buskirk , Colin Bill
发明人： Zhida Lan , Michael Van Buskirk , Colin Bill
IPC分类号： G11C13/02 , H01L27/24 , H01L27/28 , H01L51/00 , H01L51/30 , H01L29/12 , H01L21/00
CPC分类号： G11C13/025 , B82Y10/00 , G11C13/0014 , G11C13/0016 , G11C2213/71 , G11C2213/77 , H01L27/24 , H01L27/28 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0077 , H01L51/0085 , H01L51/0595
摘要： A memory cell made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an active low conductive layer and passive layer. The controllably conductive media changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the memory devices/cells, methods of using the memory devices/cells, and devices such as computers containing the memory devices/cells are also disclosed.
摘要翻译：公开了由在两个电极之间具有可控导电介质的两个电极制成的存储单元。可控导电介质包含有源低导电层和无源层。当施加外部刺激（例如施加的电场）时，可控导电介质改变其阻抗。还公开了制造存储器件/单元的方法，使用存储器件/单元的方法以及诸如包含存储器件/单元的计算机的器件。

2. 发明申请

US20060113524A1 Polymer-based transistor devices, methods, and systems 审中-公开
标题翻译：基于聚合物的晶体管器件，方法和系统
公开(公告)号：US20060113524A1
公开(公告)日：2006-06-01
申请号：US11000685
申请日：2004-12-01
申请人： Colin Bill , Michael Van Buskirk , Zhida Lan , John Ennals , Tzu-Ning Fang
发明人： Colin Bill , Michael Van Buskirk , Zhida Lan , John Ennals , Tzu-Ning Fang
IPC分类号： H01L29/08
CPC分类号： H01L51/102 , H01L51/0525
摘要： One aspect of the present invention relates to a semiconductor transistor device with an annular gate surrounding, at least in part, a channel that conducts current between a first and second source/drain. Another aspect of the present invention relates to a semiconductor transistor device having an annular gate and containing a channel composed of a polymer material. Yet another aspect of the present invention relates to fabrication of a device utilizing a polymer channel surrounded, at least in part, by an annular gate. Still yet another aspect of the present invention relates to a system with a means to control (and/or amplify) current via an annular gate surrounding a channel which conducts current between a first and second source/drain. Still other aspects of the present invention include devices incorporating the present invention's devices, systems and methods such as computers, memory, handhelds and electronic devices.
摘要翻译：本发明的一个方面涉及一种具有环形栅极的半导体晶体管器件，该环形栅极至少部分地包围在第一和第二源极/漏极之间传导电流的沟道。本发明的另一方面涉及一种具有环形栅极并且包含由聚合物材料构成的通道的半导体晶体管器件。本发明的另一方面涉及使用至少部分由环形栅极包围的聚合物通道的装置的制造。本发明的另一方面涉及一种具有通过围绕在第一和第二源极/漏极之间传导电流的沟道的环形栅极来控制（和/或放大）电流的装置的系统。本发明的其它方面包括结合本发明的装置，诸如计算机，存储器，手持设备和电子装置的系统和方法的装置。

3. 发明授权

US07259039B2 Memory device and methods of using and making the device 有权
标题翻译：内存设备和使用和制造设备的方法
公开(公告)号：US07259039B2
公开(公告)日：2007-08-21
申请号：US10818261
申请日：2004-04-02
申请人： Zhida Lan , Michael A. Van Buskirk , Colin Bill
发明人： Zhida Lan , Michael A. Van Buskirk , Colin Bill
IPC分类号： H01L51/40
CPC分类号： G11C13/025 , B82Y10/00 , G11C13/0014 , G11C13/0016 , G11C2213/71 , G11C2213/77 , H01L27/24 , H01L27/28 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0077 , H01L51/0085 , H01L51/0595
摘要： A memory cell made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an active low conductive layer and passive layer. The controllably conductive media changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the memory devices/cells, methods of using the memory devices/cells, and devices such as computers containing the memory devices/cells are also disclosed.
摘要翻译：公开了由在两个电极之间具有可控导电介质的两个电极制成的存储单元。可控导电介质包含有源低导电层和无源层。当施加外部刺激（例如施加的电场）时，可控导电介质改变其阻抗。还公开了制造存储器件/单元的方法，使用存储器件/单元的方法，以及诸如包含存储器件/单元的计算机的器件。

4. 发明授权

US06943370B2 Control of memory arrays utilizing zener diode-like devices 有权
标题翻译：使用齐纳二极管状器件来控制存储器阵列
公开(公告)号：US06943370B2
公开(公告)日：2005-09-13
申请号：US10882538
申请日：2004-06-30
申请人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
发明人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
IPC分类号： G11C11/56 , G11C13/02 , G11C16/02 , H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , G11C13/003 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要： The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
摘要翻译：本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。可以将状态变化电压施加到半导体器件阵列中的单个器件，而不需要晶体管型电压控制。本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。以这种方式，可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。本发明还允许制造这些类型的器件的非常有效的方法，消除了制造昂贵的外部电压控制半导体器件的需要。

5. 发明授权

US06847047B2 Methods that facilitate control of memory arrays utilizing zener diode-like devices 有权
标题翻译：方便使用齐纳二极管状器件来控制存储器阵列
公开(公告)号：US06847047B2
公开(公告)日：2005-01-25
申请号：US10287363
申请日：2002-11-04
申请人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
发明人： Michael A. VanBuskirk , Colin Bill , Tzu-Ning Fang , Zhida Lan
IPC分类号： G11C11/56 , G11C13/02 , G11C16/02 , H01L51/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , G11C13/003 , G11C2213/71 , G11C2213/72 , G11C2213/77
摘要： The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.
摘要翻译：本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。可以将状态变化电压施加到半导体器件阵列中的单个器件，而不需要晶体管型电压控制。本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。以这种方式，可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。本发明还允许制造这些类型的器件的非常有效的方法，消除了制造昂贵的外部电压控制半导体器件的需要。

6. 发明授权

US07273766B1 Variable density and variable persistent organic memory devices, methods, and fabrication 有权
标题翻译：可变密度和可变持久性有机存储器件，方法和制造
公开(公告)号：US07273766B1
公开(公告)日：2007-09-25
申请号：US11034071
申请日：2005-01-12
申请人： Zhida Lan , Michael A. Van Buskirk , Tzu-Ning Fang , Colin Bill , John S. Ennals
发明人： Zhida Lan , Michael A. Van Buskirk , Tzu-Ning Fang , Colin Bill , John S. Ennals
IPC分类号： H01L21/00
CPC分类号： H01L27/285 , G11C11/5664 , G11C13/0014 , G11C13/0016 , G11C13/0035 , G11C13/0061 , G11C13/0069 , G11C14/00 , G11C2213/55 , G11C2213/71
摘要： An organic memory device comprising two electrodes having a selectively conductive decay media between the two electrodes provides a capability to control a persistence level for information stored in an organic memory cell. A resistive state of the cell controls a conductive decay rate of the cell. A high and/or low resistive state can provide a fast and/or slow rate of conductive decay. One aspect of the present invention can have a high resistive state equating to an exponential conductive decay rate. Another aspect of the present invention can have a low resistive state equating to a logarithmic conductive decay rate. Yet another aspect relates to control of an organic memory device by determining a power state and setting a resistive state of an organic memory cell based upon a current power state and/or an imminent power state.
摘要翻译：包括在两个电极之间具有选择性导电衰减介质的两个电极的有机存储器件提供了控制存储在有机存储器单元中的信息的持久性水平的能力。电池的电阻状态控制电池的导电衰减速率。高和/或低电阻状态可以提供快速和/或慢速的导电衰减。本发明的一个方面可以具有等于指数导电衰减速率的高电阻状态。本发明的另一方面可以具有等于对数导电衰减速率的低电阻状态。另一方面涉及通过基于当前功率状态和/或迫在眉睫的功率状态确定有功存储器单元的功率状态和设置电阻状态来控制有机存储器件。

7. 发明申请

US20060221713A1 Write-once read-many times memory 有权
标题翻译：一次写入多次内存
公开(公告)号：US20060221713A1
公开(公告)日：2006-10-05
申请号：US11095849
申请日：2005-03-31
申请人： Michael VanBuskirk , Colin Bill , Zhida Lan , Tzu-Ning Fang
发明人： Michael VanBuskirk , Colin Bill , Zhida Lan , Tzu-Ning Fang
IPC分类号： G11C7/10
CPC分类号： G11C13/0014 , B82Y10/00
摘要： A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.
摘要翻译：一次写入多次存储器件由第一和第二电极，第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。通过从被动层提供带电物质到活性层来对存储器件进行编程。存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

8. 发明授权

US06960783B2 Erasing and programming an organic memory device and method of fabricating 有权
标题翻译：擦除和编程有机存储器件及其制造方法
公开(公告)号：US06960783B2
公开(公告)日：2005-11-01
申请号：US10436786
申请日：2003-05-13
申请人： Zhida Lan , Colin Bill , Michael A. VanBuskirk
发明人： Zhida Lan , Colin Bill , Michael A. VanBuskirk
IPC分类号： G11C11/56 , G11C13/02 , H01L35/24
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0016 , G11C2213/15 , G11C2213/56 , G11C2213/71
摘要： An organic memory cell made of two electrodes with a selectively conductive media between the two electrodes is disclosed. The selectively conductive media contains an organic layer and passive layer. The selectively conductive media is programmed by applying bias voltages that program a desired impedance state for a memory cell. The desired impedance state represents one or more bits of information and the memory cell does not require constant power or refresh cycles to maintain the desired impedance state. Furthermore, the selectively conductive media is read by applying a current and reading the impedance of the media in order to determine the impedance state of the memory cell. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.
摘要翻译：公开了一种由在两个电极之间具有选择性导电介质的两个电极制成的有机存储单元。选择性导电介质包含有机层和无源层。选择性导电介质通过施加偏置电压来编程，该偏置电压为存储器单元编程期望的阻抗状态。期望的阻抗状态表示信息的一个或多个位，并且存储单元不需要恒定的功率或刷新周期来保持所需的阻抗状态。此外，通过施加电流并读取介质的阻抗来读取选择性导电介质，以便确定存储单元的阻抗状态。还公开了制造有机存储器件/单元的方法，使用有机存储器件/单元的方法，以及诸如包含有机存储器件/单元的计算机的器件。

9. 发明申请

US20120195098A1 METHOD AND SYSTEM FOR UTILIZING PEROVSKITE MATERIAL FOR CHARGE STORAGE AND AS A DIELECTRIC 审中-公开
公开(公告)号：US20120195098A1
公开(公告)日：2012-08-02
申请号：US13500301
申请日：2011-03-29
申请人： Zhida Lan
发明人： Zhida Lan
IPC分类号： G11C11/22 , H01L29/51
CPC分类号： G11C11/22 , G11C13/0007 , H01L27/11507 , H01L28/55 , H01L29/40111 , H01L29/51 , H01L29/516 , H01L29/6684 , H01L29/78391
摘要： A memory device is disclosed. In a first aspect the memory comprises a first doped awell; two wells of opposite doping implanted in the first doped well; and two bitlines located on top of the two wells. The memory includes a Perovsite material on top of the first doped well and located between two bitlines; and a wordline located above the Perovskite material. In a second aspect the memory comprises a first doped well; two wells of opposite doping implanted in the first doped well; and two bitlines located on top of the two wells. The memory includes a Perovskite material located within one of the bitlines and a wordline located above the first doped well and located between the two bitlines.

10. 发明申请

US20120127779A1 Re-writable Resistance-Switching Memory With Balanced Series Stack 有权
标题翻译：具有平衡串联堆叠的可重写电阻切换存储器
公开(公告)号：US20120127779A1
公开(公告)日：2012-05-24
申请号：US13363252
申请日：2012-01-31
申请人： Roy E. Scheuerlein , Henry Chien , Zhida Lan , Yung-Tin Chen
发明人： Roy E. Scheuerlein , Henry Chien , Zhida Lan , Yung-Tin Chen
IPC分类号： G11C11/00
CPC分类号： H01L45/146 , G11C5/02 , G11C8/08 , G11C8/12 , G11C13/0007 , G11C13/0023 , G11C13/0069 , G11C2013/0073 , G11C2213/33 , G11C2213/71 , H01L27/2409 , H01L27/249 , H01L45/08 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/145
摘要： A re-writable resistance-switching memory cell includes first and second capacitors in series. The first and second capacitors may have balanced electrical characteristics to allow nearly concurrent, same-direction switching. The first capacitor has a first bipolar resistance switching layer between first and second conductive layers, and the second capacitor has a second bipolar resistance switching layer between third and fourth conductive layers. The first and third conductive layers are made of a common material, and the second and fourth conductive layers are made of a common material. In one approach, the first and second bipolar resistance switching layers are made of a common material and have common thickness. In another approach, the first and second bipolar resistance switching layers are made of materials having different dielectric constants, but their thickness differs in proportion to the difference in the dielectric constants, to provide a common capacitance per unit area.
摘要翻译：可重写电阻切换存储单元包括串联的第一和第二电容器。第一和第二电容器可以具有平衡的电气特性，以允许几乎同时进行相同方向的切换。第一电容器具有在第一和第二导电层之间的第一双极性电阻开关层，并且第二电容器在第三和第四导电层之间具有第二双极性电阻开关层。第一和第三导电层由普通材料制成，第二和第四导电层由普通材料制成。在一种方法中，第一和第二双极性电阻切换层由普通材料制成并且具有共同的厚度。在另一种方法中，第一和第二双极性电阻开关层由具有不同介电常数的材料制成，但它们的厚度与介电常数的差异成比例，以提供每单位面积的公共电容。

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