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1. 发明授权

US08395200B2 Method and system for manufacturing copper-based capacitor 有权
标题翻译：制造铜基电容器的方法和系统
公开(公告)号：US08395200B2
公开(公告)日：2013-03-12
申请号：US12950973
申请日：2010-11-19
申请人： Zhen Chen , Yung Feng Lin , Lin Huang
发明人： Zhen Chen , Yung Feng Lin , Lin Huang
IPC分类号： H01L27/108 , H01L29/94 , H01L21/20
CPC分类号： H01L28/40 , H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing a capacitor on an integrated circuit includes providing an inter-metal dielectric layer on a substrate, a bottom layer having a first and second portions, a first insulating layer having via plug openings on the bottom layer, and via plugs disposed in the via plug openings. The via plugs include a first and second via plugs and are electrically coupled to the first portion of the bottom layer. The method further includes providing a capacitor layer having a first barrier metal layer coupled to the first via plug. The capacitor layer also has a capacitor dielectric layer overlying the first barrier metal layer and a second barrier metal overlying the capacitor dielectric layer. The method further includes defining a first and second capacitor layer portions. The first capacitor layer portion has two opposite sides and spacers disposed on their surface.
摘要翻译：一种在集成电路上制造电容器的方法包括在基片上提供金属间电介质层，底层具有第一和第二部分，在底层上具有通孔插头开口的第一绝缘层，以及设置在通孔插头开口。通孔塞包括第一和第二通孔塞，并且电耦合到底层的第一部分。该方法还包括提供具有耦合到第一通孔插头的第一阻挡金属层的电容器层。电容器层还具有覆盖第一阻挡金属层的电容器电介质层和覆盖电容器介电层的第二阻挡金属。该方法还包括限定第一和第二电容器层部分。第一电容器层部分具有设置在其表面上的两个相对侧和间隔物。

2. 发明授权

US08722475B2 Method and structure for high Q varactor 有权
标题翻译：高Q变容二极管的方法和结构
公开(公告)号：US08722475B2
公开(公告)日：2014-05-13
申请号：US12986123
申请日：2011-01-06
申请人： Zhen Chen , Yung Feng Lin
发明人： Zhen Chen , Yung Feng Lin
IPC分类号： H01L21/338
CPC分类号： H01L29/93 , H01L29/66181 , H01L29/94
摘要： A method for forming a variable capacitor includes providing a semiconductor substrate of a first conductivity type and forming an active region of a second conductivity type within the substrate. The method forms a first dielectric layer overlying the active region. The method provides a conductive gate layer over the first dielectric layer and selectively patterns the conductive gate layer to form a plurality of holes in the conductive gate layer. A perimeter of the holes and a spacing between a first and a second holes are selective to provide a high quality factor (Q) of the capacitor. The method implants impurities of the second conductivity type into the active region through the plurality of holes in the conductive layer. The method also includes providing a second dielectric layer and patterning the second dielectric layer to form contacts to the active region and the gate.
摘要翻译：形成可变电容器的方法包括提供第一导电类型的半导体衬底，并在衬底内形成第二导电类型的有源区。该方法形成覆盖有源区的第一介电层。该方法在第一电介质层之上提供导电栅极层，并且选择性地图案化导电栅极层以在导电栅极层中形成多个孔。孔的周长和第一孔和第二孔之间的间隔是选择性的，以提供电容器的高品质因数（Q）。该方法将第二导电类型的杂质通过导电层中的多个孔埋入有源区。该方法还包括提供第二电介质层和图案化第二电介质层以形成与有源区和栅极的接触。

3. 发明授权

US08324692B2 Integrated inductor 有权
标题翻译：集成电感
公开(公告)号：US08324692B2
公开(公告)日：2012-12-04
申请号：US12953426
申请日：2010-11-23
申请人： Zhen Chen , Yung Feng Lin , Lin Huang
发明人： Zhen Chen , Yung Feng Lin , Lin Huang
IPC分类号： H01L27/11
CPC分类号： H01L27/13 , H01F17/0006 , H01F2017/0046 , H01F2017/0073 , H01F2017/0086 , H01L23/5222 , H01L23/5227 , H01L23/53295 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating an integrated inductor device includes providing a silicon substrate and forming a thickness of an insulating layer overlying the silicon substrate. The insulating layer includes a dummy structure within a portion of the thickness. The method includes forming an inductor having a first portion and a second portion. The first portion includes a spiral coil of conductor lines. The method also includes exposing the dummy structure by forming an opening in the insulating layer and removing the dummy structure to form a cavity underlying the inductor to reduce a dielectric constant and to increase a Q value of the inductor. The method includes using aluminum or copper for the dummy structures. The method includes dry etching the insulator and wet etching the dummy structure. The method also includes forming the inductors using aluminum or copper.
摘要翻译：制造集成电感器件的方法包括提供硅衬底并形成覆盖硅衬底的绝缘层的厚度。绝缘层在厚度的一部分内包括虚拟结构。该方法包括形成具有第一部分和第二部分的电感器。第一部分包括导线的螺旋线圈。该方法还包括通过在绝缘层中形成开口并去除虚拟结构以形成电感器下面的空腔来暴露虚拟结构，以降低介电常数并增加电感器的Q值。该方法包括使用铝或铜作为虚拟结构。该方法包括干法蚀刻绝缘体并湿式蚀刻虚拟结构。该方法还包括使用铝或铜形成电感器。

4. 发明申请

US20120139020A1 METHOD AND STRUCTURE FOR HIGH Q VARACTOR 有权
标题翻译：高Q变压器的方法与结构
公开(公告)号：US20120139020A1
公开(公告)日：2012-06-07
申请号：US12986123
申请日：2011-01-06
申请人： Zhen Chen , Yung Feng Lin
发明人： Zhen Chen , Yung Feng Lin
IPC分类号： H01L27/06 , H01L21/336
CPC分类号： H01L29/93 , H01L29/66181 , H01L29/94
摘要： A method for forming a variable capacitor includes providing a semiconductor substrate of a first conductivity type and forming an active region of a second conductivity type within the substrate. The method forms a first dielectric layer overlying the active region. The method provides a conductive gate layer over the first dielectric layer and selectively patterns the conductive gate layer to form a plurality of holes in the conductive gate layer. A perimeter of the holes and a spacing between a first and a second holes are selective to provide a high quality factor (Q) of the capacitor. The method implants impurities of the second conductivity type into the active region through the plurality of holes in the conductive layer. The method also includes providing a second dielectric layer and patterning the second dielectric layer to form contacts to the active region and the gate.
摘要翻译：形成可变电容器的方法包括提供第一导电类型的半导体衬底，并在衬底内形成第二导电类型的有源区。该方法形成覆盖有源区的第一介电层。该方法在第一电介质层之上提供导电栅极层，并且选择性地图案化导电栅极层以在导电栅极层中形成多个孔。孔的周长和第一孔和第二孔之间的间隔是选择性的，以提供电容器的高品质因数（Q）。该方法将第二导电类型的杂质通过导电层中的多个孔埋入有源区。该方法还包括提供第二电介质层和图案化第二电介质层以形成与有源区和栅极的接触。

5. 发明授权

US09017436B2 Fuel processing systems with thermally integrated componentry 有权
标题翻译：具有热集成组件的燃油处理系统
公开(公告)号：US09017436B2
公开(公告)日：2015-04-28
申请号：US13027584
申请日：2011-02-15
申请人： Zhen Chen , John Karim Kamel Ibrahim , Xun Ouyang , Curtiss Renn , Ryan Thomas Sturko
发明人： Zhen Chen , John Karim Kamel Ibrahim , Xun Ouyang , Curtiss Renn , Ryan Thomas Sturko
IPC分类号： C01B3/00 , C01B3/32 , H01M6/44 , C01B3/38 , H01M8/04 , H01M8/06 , H01M16/00
CPC分类号： H01M6/44 , C01B3/32 , C01B3/38 , C01B2203/0811 , H01M8/04022 , H01M8/0618 , H01M8/0631 , H01M16/003 , Y02E60/50 , Y02P90/40
摘要： Hydrogen-producing assemblies, fuel cell systems including the same, methods of producing hydrogen gas, and methods of powering an energy-consuming device. Hydrogen-producing assemblies may include a monolithic body that defines at least a reforming conduit, and in some embodiments a plurality of reforming conduits, in which a feed stream is catalyzed into a reformate gas stream containing hydrogen gas, and a burner conduit, in which a fuel-air stream is combusted. The monolithic body is constructed to conduct heat generated by the exothermic reaction of the combustion from the burner conduit to the reformer conduit. In some hydrogen-producing assemblies, the monolithic body further defines a vaporizing conduit, in which liquid portions of the feed stream are vaporized prior to being delivered to the reformer conduit, and the monolithic body may be constructed to conduct heat from the burner conduit to the vaporizing conduit.
摘要翻译：制氢组件，包括其的燃料电池系统，生产氢气的方法，以及为消耗能量装置供电的方法。制氢组件可以包括至少限定重整导管的整体式主体，并且在一些实施例中为多个重整导管，其中进料流被催化成含有氢气的重整产品气流和燃烧器导管，其中燃料 - 空气流燃烧。整体式结构被构造成将由燃烧器的燃烧的放热反应产生的热量从燃烧器管道传导到重整器导管。在一些制氢组件中，整体式体还进一步限定了蒸发导管，其中进料流的液体部分在被输送到重整器导管之前被蒸发，并且整体式主体可被构造成将热量从燃烧器导管传导到蒸发管道。

6. 发明授权

US09012939B2 N-type gallium-nitride layer having multiple conductive intervening layers 有权
标题翻译：具有多个导电中间层的N型氮化镓层
公开(公告)号：US09012939B2
公开(公告)日：2015-04-21
申请号：US13196828
申请日：2011-08-02
申请人： Zhen Chen , Yi Fu
发明人： Zhen Chen , Yi Fu
IPC分类号： H01L33/02 , H01L33/12 , H01L33/00 , H01L33/62 , H01L33/32
CPC分类号： H01L33/12 , H01L33/007 , H01L33/0079 , H01L33/32 , H01L33/62 , H01L2224/2929 , H01L2224/29339 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01322 , H01L2924/10253 , H01L2924/0655 , H01L2924/00 , H01L2924/00014
摘要： A vertical GaN-based blue LED has an n-type layer comprising multiple conductive intervening layers. The n-type layer contains a plurality of periods. Each period of the n-type layer includes a gallium-nitride (GaN) sublayer and a thin conductive aluminum-gallium-nitride (AlGaN:Si) intervening sublayer. In one example, each GaN sublayer has a thickness substantially more than 100 nm and less than 1000 nm, and each AlGaN:Si intervening sublayer has a thickness less than 25 nm. The entire n-type layer is at least 2000 nm thick. The AlGaN:Si intervening layer provides compressive strain to the GaN sublayer thereby preventing cracking. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate is then removed. Electrodes are added and the structure is singulated to form a finished LED device. Because the AlGaN:Si sublayers are conductive, the entire n-type layer can remain as part of the finished LED device.
摘要翻译：垂直GaN基蓝色LED具有包括多个导电中间层的n型层。 n型层包含多个周期。 n型层的每个周期包括氮化镓（GaN）子层和薄导电铝 - 氮化镓（AlGaN：Si）介入子层。在一个示例中，每个GaN子层具有基本上大于100nm且小于1000nm的厚度，并且每个AlGaN：Si中间层具有小于25nm的厚度。整个n型层的厚度至少为2000nm。 AlGaN：Si中间层为GaN子层提供压缩应变，从而防止开裂。在形成LED的外延层之后，将导电载体晶片结合到该结构上。然后去除硅衬底。添加电极，并且将结构单个化以形成成品的LED器件。因为AlGaN：Si子层是导电的，所以整个n型层可以保留为最终的LED器件的一部分。

7. 发明授权

US08920732B2 Systems and methods for actively controlling steam-to-carbon ratio in hydrogen-producing fuel processing systems 有权
标题翻译：在制氢燃料处理系统中积极控制蒸汽与碳之比的系统和方法
公开(公告)号：US08920732B2
公开(公告)日：2014-12-30
申请号：US13028044
申请日：2011-02-15
申请人： Zhen Chen , Xun Ouyang
发明人： Zhen Chen , Xun Ouyang
IPC分类号： F01N3/20 , B01J8/00 , B01J7/00 , H01M8/06 , H01M8/04 , C01B3/38
CPC分类号： H01M8/0618 , C01B3/384 , C01B2203/043 , C01B2203/0445 , C01B2203/066 , C01B2203/0811 , C01B2203/085 , C01B2203/146 , C01B2203/1657 , C01B2203/169 , H01M8/0432 , H01M8/04694 , H01M8/04776 , H01M8/04992 , Y02E60/50
摘要： The present disclosure is directed to systems and methods for actively controlling the steam-to-carbon ratio in hydrogen-producing fuel processing systems that include a feedstock delivery system. The feedstock delivery system supplies a combined feedstock stream including steam and carbon-containing feedstock to a hydrogen-producing region, which produces a mixed gas stream including hydrogen gas as a majority component therefrom. The systems and methods may include measuring a thermodynamic property of a steam stream, a carbon-containing feedstock stream, and/or the combined feedstock stream and controlling the flow rate and/or pressure of a water stream, the steam stream, and/or the carbon-containing feedstock stream based on a desired steam-to-carbon ratio in the combined feedstock stream and/or a desired flow rate of the mixed gas stream and may include feedforward and/or feedback control strategies.
摘要翻译：本公开涉及用于在包括原料输送系统的制氢燃料处理系统中主动控制蒸汽与碳之比的系统和方法。原料输送系统将包括蒸汽和含碳原料的组合原料流供应到产氢区，其产生包含氢气作为其主要成分的混合气流。系统和方法可以包括测量蒸汽流，含碳原料流和/或组合的原料流的热力学性质，并控制水流，蒸汽流和/或蒸汽流的流速和/或压力。基于组合的原料流中所需的蒸汽 - 碳比和/或混合气流的期望流速的含碳原料流，并且可以包括前馈和/或反馈控制策略。

8. 发明授权

US08865565B2 LED having a low defect N-type layer that has grown on a silicon substrate 有权
标题翻译： LED具有在硅衬底上生长的低缺陷N型层
公开(公告)号：US08865565B2
公开(公告)日：2014-10-21
申请号：US13196854
申请日：2011-08-02
申请人： Zhen Chen
发明人： Zhen Chen
IPC分类号： H01L21/30 , H01L33/12 , H01L33/00 , H01L33/62
CPC分类号： H01L33/007 , H01L24/73 , H01L33/0079 , H01L33/12 , H01L33/62 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01322 , H01L2924/10253 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A vertical GaN-based blue LED has an n-type GaN layer that was grown directly on Low Resistance Layer (LRL) that in turn was grown over a silicon substrate. In one example, the LRL is a low sheet resistance GaN/AlGaN superlattice having periods that are less than 300 nm thick. Growing the n-type GaN layer on the superlattice reduces lattice defect density in the n-type layer. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate is then removed. Electrodes are added and the structure is singulated to form finished LED devices. In some examples, some or all of the LRL remains in the completed LED device such that the LRL also serves a current spreading function. In other examples, the LRL is entirely removed so that no portion of the LRL is present in the completed LED device.
摘要翻译：垂直的GaN基蓝色LED具有直接在低电阻层（LRL）上生长的n型GaN层，其又在硅衬底上生长。在一个示例中，LRL是具有小于300nm厚的周期的低薄层电阻GaN / AlGaN超晶格。在超晶格上生长n型GaN层减少n型层中的晶格缺陷密度。在形成LED的外延层之后，将导电载体晶片结合到该结构上。然后去除硅衬底。添加电极，并将结构单片化以形成成品的LED器件。在一些示例中，LRL中的一些或全部保持在完成的LED器件中，使得LRL还用于电流扩展功能。在其他示例中，LRL被完全去除，使得在完成的LED装置中不存在LRL的任何部分。

9. 发明授权

US08669585B1 LED that has bounding silicon-doped regions on either side of a strain release layer 有权
标题翻译： LED在应变释放层的任一侧具有界限的硅掺杂区域
公开(公告)号：US08669585B1
公开(公告)日：2014-03-11
申请号：US13602145
申请日：2012-09-01
申请人： Zhen Chen , Yi Fu
发明人： Zhen Chen , Yi Fu
IPC分类号： H01L29/36
CPC分类号： H01L33/325 , H01L33/0025 , H01L33/04 , H01L33/06 , H01L33/12
摘要： A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×102° atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.
摘要翻译：在蓝色LED中邻接有源层的应变释放层在底部由第一相对高的硅掺杂区域界定，并且在顶部由第二相对高的硅掺杂区域界定。第二相对高的硅掺杂区域是LED的有源层的子层。第一相对高的硅掺杂区域是LED的N型层的子层。第一相对高的硅掺杂区域也通过仅轻微掺杂硅的中间子层与N型层的其余部分分离。硅掺杂分布促进电流扩散和高输出功率（流明/瓦特）。 LED具有低反向漏电流和高ESD电压。应变释放层的铟浓度介于5×1019原子/ cm3至5×102°原子/ cm3之间，第一和第二相对高度的硅掺杂区域的硅浓度超过1×1018原子/ cm3 。

10. 发明申请

US20130313627A1 Multi-Level Contact to a 3D Memory Array and Method of Making 有权
标题翻译：与3D内存阵列的多层接触及其制作方法
公开(公告)号：US20130313627A1
公开(公告)日：2013-11-28
申请号：US13478483
申请日：2012-05-23
申请人： Yao-Sheng Lee , Zhen Chen , Syo Fukata
发明人： Yao-Sheng Lee , Zhen Chen , Syo Fukata
IPC分类号： H01L21/768 , H01L29/792 , H01L23/48
CPC分类号： H01L27/11578 , H01L21/76816 , H01L21/76829 , H01L23/481 , H01L27/10802 , H01L27/11 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11548 , H01L27/11556 , H01L27/11565 , H01L27/11568 , H01L27/1157 , H01L27/11575 , H01L27/11582 , H01L29/66 , H01L29/7926 , H01L2924/0002 , H01L2924/00
摘要： A method of making multi-level contacts. The method includes providing an in-process multilevel device including at least one device region and at least one contact region. The contact region includes a plurality of electrically conductive layers configured in a step pattern. The method also includes forming a conformal etch stop layer over the plurality of electrically conductive layers, forming a first electrically insulating layer over the etch stop layer, forming a conformal sacrificial layer over the first electrically insulating layer and forming a second electrically insulating layer over the sacrificial layer. The method also includes etching a plurality of contact openings through the etch stop layer, the first electrically insulating layer, the sacrificial layer and the second electrically insulating layer in the contact region to the plurality of electrically conductive layers.
摘要翻译：制作多层次联系的方法。该方法包括提供包括至少一个设备区域和至少一个接触区域的进程内多电平设备。接触区域包括以台阶图案配置的多个导电层。该方法还包括在多个导电层上形成共形蚀刻停止层，在蚀刻停止层上形成第一电绝缘层，在第一电绝缘层上形成共形牺牲层，并形成第二电绝缘层牺牲层。该方法还包括通过蚀刻停止层，接触区域中的第一电绝缘层，牺牲层和第二电绝缘层蚀刻到多个导电层的多个接触开口。

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