专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08900971B2 Bonded substrate and manufacturing method thereof 有权
标题翻译：粘结基板及其制造方法
公开(公告)号：US08900971B2
公开(公告)日：2014-12-02
申请号：US13978840
申请日：2012-01-06
申请人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kyoko Mitani
发明人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kiyoshi Mitani
IPC分类号： H01L21/30 , H01L23/00 , H01L21/762 , H01L21/84
CPC分类号： H01L24/83 , H01L21/76254 , H01L21/76256 , H01L21/84 , H01L24/26 , H01L2224/83 , H01L2924/1461 , H01L2924/15788 , H01L2924/00
摘要： The invention provides a method for manufacturing a bonded substrate by bonding a base substrate to a bond substrate through an insulator film, including: a porous layer forming step of partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the base substrate; an insulator film forming step of changing the porous layer into the insulator film, and thereby forming the insulator film whose thickness partially varies on the bonding surface of the base substrate; a bonding step of bonding the base substrate to the bond substrate through the insulator film; and a film thickness reducing step of reducing a film thickness of the bonded bond substrate to form a thin-film layer. As a result, there is provided the method for manufacturing a bonded substrate that enables obtaining an insulator film whose thickness partially varies with use of a simple method.
摘要翻译：本发明提供了一种通过绝缘膜将基底与基片接合而制造键合衬底的方法，包括：多孔层形成步骤，部分地形成多孔层或形成厚度在接合表面上部分变化的多孔层的基底; 绝缘膜形成步骤，将多孔层改变为绝缘膜，从而形成厚度在基底基板的接合表面上部分变化的绝缘膜; 键合步骤，通过所述绝缘膜将所述基底衬底接合到所述接合衬底; 以及降低键合键合衬底的膜厚以形成薄膜层的膜厚减小步骤。结果，提供了一种能够通过简单的方法获得其厚度部分变化的绝缘膜的接合基板的制造方法。

2. 发明申请

US20130341763A1 BONDED SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：粘结基材及其制造方法
公开(公告)号：US20130341763A1
公开(公告)日：2013-12-26
申请号：US13978840
申请日：2012-01-06
申请人： Yuuki Ooi , Wei Feng Qu , Tsuyoshi Ohtsuki , Kyoko Mitani , Fumio Tahara
发明人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kiyoshi Mitani
IPC分类号： H01L23/00
CPC分类号： H01L24/83 , H01L21/76254 , H01L21/76256 , H01L21/84 , H01L24/26 , H01L2224/83 , H01L2924/1461 , H01L2924/15788 , H01L2924/00
摘要： The invention provides a method for manufacturing a bonded substrate by bonding a base substrate to a bond substrate through an insulator film, including: a porous layer forming step of partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the base substrate; an insulator film forming step of changing the porous layer into the insulator film, and thereby forming the insulator film whose thickness partially varies on the bonding surface of the base substrate; a bonding step of bonding the base substrate to the bond substrate through the insulator film; and a film thickness reducing step of reducing a film thickness of the bonded bond substrate to form a thin-film layer. As a result, there is provided the method for manufacturing a bonded substrate that enables obtaining an insulator film whose thickness partially varies with use of a simple method.
摘要翻译：本发明提供了一种通过绝缘膜将基底与基片接合而制造键合衬底的方法，包括：多孔层形成步骤，部分地形成多孔层或形成厚度在接合表面上部分变化的多孔层的基底; 绝缘膜形成步骤，将多孔层改变为绝缘膜，从而形成厚度在基底基板的接合表面上部分变化的绝缘膜; 键合步骤，通过所述绝缘膜将所述基底衬底接合到所述接合衬底; 以及降低键合键合衬底的膜厚以形成薄膜层的膜厚减小步骤。结果，提供了一种能够通过简单的方法获得其厚度部分变化的绝缘膜的接合基板的制造方法。

3. 发明授权

US08877609B2 Method for manufacturing bonded substrate having an insulator layer in part of bonded substrate 有权
标题翻译：用于制造在键合衬底的一部分中具有绝缘体层的键合衬底的方法
公开(公告)号：US08877609B2
公开(公告)日：2014-11-04
申请号：US14007584
申请日：2012-04-10
申请人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kyoko Mitani
发明人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kiyoshi Mitani
IPC分类号： H01L21/762 , H01L21/84 , H01L27/12
CPC分类号： H01L21/76251 , H01L21/76256 , H01L21/84 , H01L27/1207
摘要： A method for manufacturing a bonded substrate that has an insulator layer in part of the bonded substrate includes: partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the base substrate; performing a heat treatment to the base substrate having the porous layer formed thereon to change the porous layer into the insulator layer, and thereby forming the insulator layer whose thickness partially varies on the bonding surface of the base substrate; removing the insulator layer whose thickness varies by an amount corresponding to a thickness of a small-thickness portion by etching; bonding the bonding surface of the base substrate on which an unetched remaining insulator layer is exposed to a bond substrate; and reducing a thickness of the bonded bond substrate and thereby forming a thin film layer.
摘要翻译：一种在键合衬底的一部分中具有绝缘体层的接合衬底的制造方法包括：在基底衬底的接合表面上部分地形成多孔层或形成其厚度部分变化的多孔层; 对其上形成有多孔层的基底基板进行热处理以将多孔层改变成绝缘体层，从而在基底基板的接合表面上形成厚度部分变化的绝缘体层; 通过蚀刻去除其厚度变化相应于小厚度部分的厚度的量的绝缘体层; 将未蚀刻剩余绝缘体层的基底基板的接合表面接合到接合基板; 并且减小键合的键合衬底的厚度，从而形成薄膜层。

4. 发明申请

US20140120695A1 METHOD FOR MANUFACTURING BONDED SUBSTRATE HAVING AN INSULATOR LAYER IN PART OF BONDED SUBSTRATE 有权
标题翻译：在粘结基板的一部分制造具有绝缘层的粘合基板的方法
公开(公告)号：US20140120695A1
公开(公告)日：2014-05-01
申请号：US14007584
申请日：2012-04-10
申请人： Yuuki Ooi , Wei Feng Qu , Tsuyoshi Ohtsuki , Kyoko Mitani , Fumio Tahara
发明人： Tsuyoshi Ohtsuki , Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Kiyoshi Mitani
IPC分类号： H01L21/762
CPC分类号： H01L21/76251 , H01L21/76256 , H01L21/84 , H01L27/1207
摘要： A method for manufacturing a bonded substrate that has an insulator layer in part of the bonded substrate includes: partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the base substrate; performing a heat treatment to the base substrate having the porous layer formed thereon to change the porous layer into the insulator layer, and thereby forming the insulator layer whose thickness partially varies on the bonding surface of the base substrate; removing the insulator layer whose thickness varies by an amount corresponding to a thickness of a small-thickness portion by etching; bonding the bonding surface of the base substrate on which an unetched remaining insulator layer is exposed to a bond substrate; and reducing a thickness of the bonded bond substrate and thereby forming a thin film layer.
摘要翻译：一种在键合衬底的一部分中具有绝缘体层的接合衬底的制造方法包括：在基底衬底的接合表面上部分地形成多孔层或形成其厚度部分变化的多孔层; 对其上形成有多孔层的基底基板进行热处理以将多孔层改变成绝缘体层，从而在基底基板的接合表面上形成厚度部分变化的绝缘体层; 通过蚀刻去除其厚度变化相应于小厚度部分的厚度的量的绝缘体层; 将未蚀刻剩余绝缘体层的基底基板的接合表面接合到接合基板; 并且减小键合的键合衬底的厚度，从而形成薄膜层。

5. 发明授权

US08916953B2 Method for manufacturing silicon single crystal wafer and annealed wafer 有权
标题翻译：硅单晶晶片和退火晶片的制造方法
公开(公告)号：US08916953B2
公开(公告)日：2014-12-23
申请号：US13993810
申请日：2012-01-06
申请人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Shu Sugisawa
发明人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Shu Sugisawa
IPC分类号： H01L29/32 , C30B33/02 , C30B29/06
CPC分类号： C30B33/02 , C30B29/06 , H01L29/32
摘要： The present invention provides a method for manufacturing a silicon single crystal wafer, in which a heat treatment is performed with respect to a silicon single crystal wafer having oxygen concentration of less than 7 ppma and nitrogen concentration of 1×1013 to 1×1014 atoms/cm3, which is obtained from a V-region silicon single crystal ingot grown by the Czochralski method, in a non-nitriding atmosphere at 1150 to 1300° C. for 1 to 120 minutes. As a result, a method for manufacturing a low-cost silicon single crystal wafer which is applicable to an IGBT by using a V-region wafer that is manufactured by the CZ method which can cope with an increase in diameter, by making a bulk have no defects and by providing a radial resistivity distribution, which is substantially equal to that when the neutron irradiation is effected, without performing the neutron irradiation is provided.
摘要翻译：本发明提供了一种制造硅单晶晶片的方法，其中对于氧浓度小于7ppma，氮浓度为1×1013至1×1014原子/厘米2的硅单晶晶片进行热处理， cm3，其是通过Czochralski法生长的V型硅单晶锭，在非氮化气氛中在1150〜1300℃下反应1〜120分钟。结果，制造低成本硅单晶晶片的方法可以通过使用通过CZ方法制造的V区晶片适用于IGBT，该V型晶片可以通过制造大量具有直径增加的方式没有缺陷并且通过提供径向电阻率分布，其基本上等于实施中子辐射时的径向电阻率分布，而不执行中子照射。

6. 发明申请

US20130264685A1 METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL WAFER AND ANNEALED WAFER 有权
标题翻译：制造硅单晶和平面波的方法
公开(公告)号：US20130264685A1
公开(公告)日：2013-10-10
申请号：US13993810
申请日：2012-01-06
申请人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Shu Sugisawa
发明人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi , Shu Sugisawa
IPC分类号： C30B33/02 , H01L29/32
CPC分类号： C30B33/02 , C30B29/06 , H01L29/32
摘要： The present invention provides a method for manufacturing a silicon single crystal wafer, in which a heat treatment is performed with respect to a silicon single crystal wafer having oxygen concentration of less than 7 ppma and nitrogen concentration of 1×1013 to 1×1014 atoms/cm3, which is obtained from a V-region silicon single crystal ingot grown by the Czochralski method, in a non-nitriding atmosphere at 1150 to 1300° C. for 1 to 120 minutes. As a result, a method for manufacturing a low-cost silicon single crystal wafer which is applicable to an IGBT by using a V-region wafer that is manufactured by the CZ method which can cope with an increase in diameter, by making a bulk have no defects and by providing a radial resistivity distribution, which is substantially equal to that when the neutron irradiation is effected, without performing the neutron irradiation is provided.
摘要翻译：本发明提供了一种制造硅单晶晶片的方法，其中对于氧浓度小于7ppma，氮浓度为1×1013至1×1014原子/厘米2的硅单晶晶片进行热处理， cm3，其是通过Czochralski法生长的V型硅单晶锭，在非氮化气氛中在1150〜1300℃下反应1〜120分钟。结果，制造低成本硅单晶晶片的方法可以通过使用通过CZ方法制造的V区晶片适用于IGBT，该V型晶片可以通过制造大量具有直径增加的方式没有缺陷并且通过提供径向电阻率分布，其基本上等于实施中子辐射时的径向电阻率分布，而不执行中子照射。

7. 发明申请

US20140119399A1 METHOD FOR DETECTING CRYSTAL DEFECTS 有权
标题翻译：检测晶体缺陷的方法
公开(公告)号：US20140119399A1
公开(公告)日：2014-05-01
申请号：US14124827
申请日：2012-06-18
申请人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi
发明人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi
IPC分类号： G01N1/28
CPC分类号： G01N1/28 , H01L22/12 , H01L22/24
摘要： A method for detecting a crystal defect in a silicon single crystal wafer doped with nitrogen, the silicon single crystal wafer whose initial oxygen concentration is 8 ppma (JEIDA) or lower. The method further includes the steps of: making a crystal defect of defect size of 25 nm or smaller apparent and detectable by implanting oxygen into the crystal defect by performing heat treatment on the silicon single crystal wafer in an oxygen atmosphere; and detecting the crystal defect of the silicon single crystal wafer after the heat treatment temperature is set such that, when the ratio between the oxygen solid solubility and the initial oxygen concentration of the silicon single crystal wafer heat treatment is set at α=the oxygen solid solubility/the initial oxygen concentration, α falls within a range from 1 to 3.
摘要翻译：一种用于检测掺杂有氮的硅单晶晶片中的晶体缺陷的方法，其初始氧浓度为8ppma（JEIDA）或更低的硅单晶晶片。该方法还包括以下步骤：通过在氧气氛中对硅单晶晶片进行热处理，使缺陷尺寸为25nm或更小的晶体缺陷明显并且可通过将氧注入晶体缺陷来检测; 并且在热处理温度被设定为使得当硅固溶度和硅单晶晶片热处理的初始氧浓度之比设定为α=氧固体时，检测硅单晶晶片的晶体缺陷溶解度/初始氧浓度α在1〜3的范围内。

8. 发明授权

US09606030B2 Method for detecting crystal defects 有权
公开(公告)号：US09606030B2
公开(公告)日：2017-03-28
申请号：US14124827
申请日：2012-06-18
申请人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi
发明人： Wei Feng Qu , Fumio Tahara , Yuuki Ooi
IPC分类号： G01N25/72 , G01N1/28 , H01L21/66
CPC分类号： G01N1/28 , H01L22/12 , H01L22/24
摘要： A method for detecting a crystal defect in a silicon single crystal wafer doped with nitrogen, the silicon single crystal wafer whose initial oxygen concentration is 8 ppma (JEIDA) or lower. The method further includes the steps of: making a crystal defect of defect size of 25 nm or smaller apparent and detectable by implanting oxygen into the crystal defect by performing heat treatment on the silicon single crystal wafer in an oxygen atmosphere; and detecting the crystal defect of the silicon single crystal wafer after the heat treatment temperature is set such that, when the ratio between the oxygen solid solubility and the initial oxygen concentration of the silicon single crystal wafer heat treatment is set at α=the oxygen solid solubility/the initial oxygen concentration, α falls within a range from 1 to 3.

9. 发明授权

US08551246B2 Method for evaluating oxide dielectric breakdown voltage of a silicon single crystal wafer 有权
标题翻译：评估硅单晶晶片的氧化物绝缘击穿电压的方法
公开(公告)号：US08551246B2
公开(公告)日：2013-10-08
申请号：US12990038
申请日：2009-05-07
申请人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
发明人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
IPC分类号： C30B15/20
CPC分类号： C30B29/06 , C30B33/02 , H01L21/02008 , H01L22/12 , H01L2924/0002 , Y10T428/24355 , H01L2924/00
摘要： A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
摘要翻译：一种制造硅单晶晶片的方法，至少具有：制备硅单晶锭的步骤; 切割硅单晶锭以制造多个切片基板的步骤; 通过进行研磨，蚀刻和研磨中的至少一种来将多个切片基板加工成多个基板的处理步骤; 从所述多个基板中取样至少一个的步骤; 通过AFM测量在采样步骤中采样的基板的表面粗糙度并获得对应于20nm至50nm的波长的频带的振幅（强度）以判定接受的步骤; 以及如果判断结果为拒绝则判断结果为接受或执行再处理的步骤，将基板发送到下一步骤。

10. 发明申请

US20110045246A1 SILICON SINGLE CRYSTAL WAFER AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL WAFER, AND METHOD FOR EVALUATING SILICON SINGLE CRYSTAL WAFER 有权
标题翻译：硅单晶和制造硅单晶的方法和用于评估硅单晶的方法
公开(公告)号：US20110045246A1
公开(公告)日：2011-02-24
申请号：US12990038
申请日：2009-05-07
申请人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
发明人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
IPC分类号： B32B5/00 , H01L21/66 , G01Q60/24
CPC分类号： C30B29/06 , C30B33/02 , H01L21/02008 , H01L22/12 , H01L2924/0002 , Y10T428/24355 , H01L2924/00
摘要： A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
摘要翻译：一种制造硅单晶晶片的方法，至少具有：制备硅单晶锭的步骤; 切割硅单晶锭以制造多个切片基板的步骤; 通过进行研磨，蚀刻和研磨中的至少一种来将多个切片基板加工成多个基板的处理步骤; 从所述多个基板中取样至少一个的步骤; 通过AFM测量在采样步骤中采样的基板的表面粗糙度并获得对应于20nm至50nm的波长的频带的振幅（强度）以判定接受的步骤; 以及如果判断结果为拒绝则判断结果为接受或执行再处理的步骤，将基板发送到下一步骤。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式