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1. 发明授权

US06297119B1 Semiconductor device and its manufacture 失效
标题翻译：半导体器件及其制造
公开(公告)号：US06297119B1
公开(公告)日：2001-10-02
申请号：US09369267
申请日：1999-08-06
申请人： Yutaka Tsutsui , Masaru Wakabayashi
发明人： Yutaka Tsutsui , Masaru Wakabayashi
IPC分类号： H01L218228
CPC分类号： H01L21/8249 , H01L21/82285 , H01L27/0623
摘要： The present invention discloses a semiconductor device having a PNP bipolar transistor and an NPN bipolar transistor having excellent transistor characteristics formed on the same semiconductor substrate, and a method of manufacturing the semiconductor device. This semiconductor device is provided with a first n-type well and a second n-type well formed at substantially the same depths in a semiconductor substrate, an NPN bipolar transistor formed within the first n-type well which uses the n-type well as its collector, a p-type well formed within the second n-type well, and a PNP bipolar transistor formed within the p-type well which uses the p-type well as its collector.
摘要翻译：本发明公开了一种具有PNP双极型晶体管的半导体器件和在同一半导体衬底上形成的具有优良晶体管特性的NPN双极晶体管，以及制造半导体器件的方法。该半导体器件设置有第一n型阱和在半导体衬底中基本上相同深度形成的第二n型阱，形成在第一n型阱内的NPN双极型晶体管，其使用n型阱作为其集电极，在第二n型阱内形成p型阱以及在p型阱中形成的使用p型阱作为其集电极的PNP双极晶体管。

2. 发明申请

US20050280149A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050280149A1
公开(公告)日：2005-12-22
申请号：US11153619
申请日：2005-06-16
申请人： Yutaka Tsutsui , Norio Okada
发明人： Yutaka Tsutsui , Norio Okada
IPC分类号： H01L23/48 , H01L23/485
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/02166 , H01L2224/05082 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05181 , H01L2224/05187 , H01L2224/05567 , H01L2224/05624 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01078 , H01L2924/01082 , H01L2924/04953 , H01L2924/05042 , H01L2924/04941 , H01L2924/00014 , H01L2224/05552
摘要： A semiconductor device should have a structure that allows locating electronic components in a region under a bonding pad. The semiconductor device includes a bonding pad constituting the external connection terminal; a region under the bonding pad including at least two copper layers and a connection via plug, under said bonding pad, disposed so as to connect copper layers that form a pair out of the at least two copper layers; a seal ring constituted of an annular conductor, disposed so as to surround the region under the bonding pad, and to connect a lower one of the copper layers that form said pair to copper layer to form a pair with the lower copper layer; and an interconnect connected to the bonding pad outside the seal ring.
摘要翻译：半导体器件应当具有允许将电子部件定位在焊盘下方的区域中的结构。半导体器件包括构成外部连接端子的接合焊盘; 在所述接合焊盘下方具有包括至少两个铜层和至少两个铜层的接合焊盘下方的区域，所述接合焊盘设置成将形成所述至少两个铜层的铜层连接; 由环状导体构成的密封环，其设置为围绕接合焊盘下方的区域，并且将形成所述一对的铜层的下部一个铜层与铜层连接，与下部铜层形成一对; 以及连接到密封环外的接合焊盘的互连。

3. 发明授权

US07301244B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07301244B2
公开(公告)日：2007-11-27
申请号：US11153619
申请日：2005-06-16
申请人： Yutaka Tsutsui , Norio Okada
发明人： Yutaka Tsutsui , Norio Okada
IPC分类号： H01L23/48
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/02166 , H01L2224/05082 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05181 , H01L2224/05187 , H01L2224/05567 , H01L2224/05624 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01078 , H01L2924/01082 , H01L2924/04953 , H01L2924/05042 , H01L2924/04941 , H01L2924/00014 , H01L2224/05552
摘要： A semiconductor device should have a structure that allows locating electronic components in a region under a bonding pad. The semiconductor device includes a bonding pad constituting the external connection terminal; a region under the bonding pad including at least two copper layers and a connection via plug, under said bonding pad, disposed so as to connect copper layers that form a pair out of the at least two copper layers; a seal ring constituted of an annular conductor, disposed so as to surround the region under the bonding pad, and to connect a lower one of the copper layers that form said pair to copper layer to form a pair with the lower copper layer; and an interconnect connected to the bonding pad outside the seal ring.
摘要翻译：半导体器件应当具有允许将电子部件定位在焊盘下方的区域中的结构。半导体器件包括构成外部连接端子的接合焊盘; 在所述接合焊盘下方具有包括至少两个铜层和至少两个铜层的接合焊盘下方的区域，所述接合焊盘设置成将形成所述至少两个铜层的铜层连接; 由环状导体构成的密封环，其设置为围绕接合焊盘下方的区域，并且将形成所述一对的铜层的下部一个铜层与铜层连接，与下部铜层形成一对; 以及连接到密封环外的接合焊盘的互连。

4. 外观设计

USD336890S Geared motor 失效
公开(公告)号：USD336890S
公开(公告)日：1993-06-29
申请号：US716600
申请日：1991-06-17
申请人： Hideo Hirose , Yutaka Tsutsui , Hiroshi Hasegawa
设计人： Hideo Hirose , Yutaka Tsutsui , Hiroshi Hasegawa

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