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1. 发明授权

US5031021A Semiconductor device with a high breakdown voltage 失效
标题翻译：具有高击穿电压的半导体器件
公开(公告)号：US5031021A
公开(公告)日：1991-07-09
申请号：US905958
申请日：1986-09-11
申请人： Yoshiro Baba , Kazuo Tsuru , Tatsuo Akiyama , Yutaka Koshino
发明人： Yoshiro Baba , Kazuo Tsuru , Tatsuo Akiyama , Yutaka Koshino
IPC分类号： H01L29/73 , H01L21/331 , H01L29/04 , H01L29/06 , H01L29/40 , H01L29/732
CPC分类号： H01L29/405 , H01L29/04 , H01L29/0619 , H01L29/408
摘要： There is disclosed a power transistor comprising a semiconductor substrate having a PN junction exposed on a major surface of the semiconductor substrate, and a semiinsulative polysilicon film formed on the major surface, the polysilicon film covering the PN junction, the polysilicon film containing at least one of carbon, oxygen, and nitrogen, and the polysilicon film having a thickness of about 3000 .ANG..
摘要翻译：公开了一种功率晶体管，其包括具有在该半导体衬底的主表面上露出的PN结的半导体衬底和形成在该主表面上的半绝缘性多晶硅膜，该多晶硅膜覆盖该PN结，该多晶硅膜含有至少一个的碳，氧和氮，以及多晶硅膜的厚度约为3000纳米。

2. 发明授权

US4710794A Composite semiconductor device 失效
标题翻译：复合半导体器件
公开(公告)号：US4710794A
公开(公告)日：1987-12-01
申请号：US828536
申请日：1986-02-12
申请人： Yutaka Koshino , Tatsuo Akiyama , Yoshiro Baba
发明人： Yutaka Koshino , Tatsuo Akiyama , Yoshiro Baba
IPC分类号： H01L29/06 , H01L21/18 , H01L21/762 , H01L21/764 , H01L21/8222 , H01L21/8249 , H01L27/07 , H01L27/082 , H01L27/12 , H01L25/04
CPC分类号： H01L21/8249 , H01L21/187 , H01L21/76264 , H01L21/76297 , H01L21/764 , H01L21/8222 , H01L27/0716 , H01L27/0825 , H01L21/76286 , H01L21/76289
摘要： Disclosed is a composite semiconductor device, comprising a composite substrate consisting of first and second semiconductor substrates, one surface of each of which is mirror-polished, so that the mirror-polished surfaces are bonded together. The first semiconductor substrate has a space adjacent to the bonding interface, and an annular groove which communicates with the space from a surface of the first semiconductor substrate opposite the bonding interface, the annular groove being formed in a portion of the first semiconductor substrate corresponding to a peripheral edge portion of the space thereof, at least one pillar projecting through the space to the bonding interface from a surface, which is exposed to the space, of a first portion of the first semiconductor substrate which is defined by the space and the annular groove, a first insulating layer, formed in the annular groove, for electrically isolating the first portion from a second portion of the first semiconductor substrate adjacent thereto, a second insulating layer, formed on the pillar or a bonding interface between the pillar and the second semiconductor substrate, for electrically isolating the first portion from the second semiconductor substrate, a first functional element formed in the first portion, and a second functional element formed in the second portion.
摘要翻译：公开了一种复合半导体器件，其包括由第一和第二半导体衬底组成的复合衬底，每个半导体衬底的一个表面被镜面抛光，使得镜面抛光表面被接合在一起。所述第一半导体衬底具有与所述接合界面相邻的空间，以及与所述第一半导体衬底的与所述接合界面相对的表面与所述空间连通的环形槽，所述环形槽形成在所述第一半导体衬底的对应于其空间的外围边缘部分，至少一个从所述空间向所述接合界面突出的第一半导体衬底的第一部分暴露于所述空间的表面的至少一个柱，所述第一部分由所述空间和环形槽，形成在环形槽中的第一绝缘层，用于将第一部分与与其相邻的第一半导体衬底的第二部分电隔离;形成在柱上的第二绝缘层或柱与第二绝缘层之间的接合界面半导体衬底，用于将第一部分与第二半导体衬底电隔离，第一形成在第一部分中的功能元件和形成在第二部分中的第二功能元件。

3. 发明授权

US4700455A Method of fabricating Schottky gate-type GaAs field effect transistor 失效
标题翻译：制造肖特基栅型GaAs场效应晶体管的方法
公开(公告)号：US4700455A
公开(公告)日：1987-10-20
申请号：US792825
申请日：1985-10-30
申请人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
发明人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
IPC分类号： H01L21/338 , H01L29/812 , H01L21/265
CPC分类号： H01L29/66878 , H01L29/812
摘要： A method of manufacturing a semiconductor device wherein an insulating film of silicon dioxide is provided on the sidewalls of a gate electrode. This silicon dioxide film is used to define the length of the gate region during formation of the source and drain regions by ion implantation, and to accurately position the gate electrode relative to the source and drain regions.
摘要翻译：一种制造半导体器件的方法，其中二极管的绝缘膜设置在栅电极的侧壁上。该二氧化硅膜用于通过离子注入来形成源极和漏极区域期间限定栅极区域的长度，并且相对于源极和漏极区域精确地定位栅电极。

4. 发明授权

US5229323A Method for manufacturing a semiconductor device with Schottky electrodes 失效
标题翻译：制造具有肖特基电极的半导体器件的方法
公开(公告)号：US5229323A
公开(公告)日：1993-07-20
申请号：US846985
申请日：1992-03-09
申请人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
发明人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
IPC分类号： H01L21/263 , H01L21/285 , H01L21/338
CPC分类号： H01L29/66863 , H01L21/2633 , H01L21/28581 , Y10S148/139 , Y10S148/14
摘要： A method for manufacturing a semiconductor device with a Schottky electrode includes the steps of subjecting the surface of a GaAs substrate to a sputtering etching process in a sputtering processing chamber of a sputtering device; and depositing Schottky electrode material by sputtering on the surface of the substrate to form a Schottky electrode in the processing chamber without exposing the substrate to the atmosphere.
摘要翻译：制造具有肖特基电极的半导体器件的方法包括以下步骤：在溅射装置的溅射处理室中对GaAs衬底的表面进行溅射蚀刻工艺; 并通过溅射将肖特基电极材料沉积在衬底的表面上以在处理室中形成肖特基电极，而不将衬底暴露于大气中。

5. 发明授权

US4729966A Process for manufacturing a Schottky FET device using metal sidewalls as gates 失效
标题翻译：使用金属侧壁作为栅极制造肖特基FET器件的工艺
公开(公告)号：US4729966A
公开(公告)日：1988-03-08
申请号：US843833
申请日：1986-03-26
申请人： Yutaka Koshino , Tatsuo Akiyama , Shunichi Hiraki
发明人： Yutaka Koshino , Tatsuo Akiyama , Shunichi Hiraki
IPC分类号： H01L29/812 , H01L21/28 , H01L21/285 , H01L21/338 , H01L29/417 , H01L21/225 , H01L29/72 , H01L29/80
CPC分类号： H01L29/66878 , H01L21/2815 , H01L21/28587
摘要： A first insulative film is formed with predetermined height and thickness in a loop shape on the surface of the Schottky-junction semiconductor substrate. A gate electrode metal film is formed with a predetermined height and thickness in a loop shape on the surface of the substrate along the inner surface of the first insulative film. A second insulative film is formed with a predetermined height and thickness in a loop shape on the surface of the substrate along the inner surface of the metal film. A channel consisting of a low concentration impurity layer, is formed in a loop shape inside the substrate directly under the metal film and the first and second insulative films. The source region consists of a high-concentration impurity layer formed such that it surrounds the channel positioned inside the substrate on the outside of the first insulative film. The drain region consists of a high-concentration impurity layer, which is formed such that it is surrounded by the channel positioned inside the substrate on the inside of the second insulative film.
摘要翻译：第一绝缘膜在肖特基结半导体衬底的表面上以环形形成预定的高度和厚度。栅极电极金属膜沿着第一绝缘膜的内表面在基板的表面上以环形形成预定的高度和厚度。第二绝缘膜沿着金属膜的内表面在基板的表面上以环形形成预定的高度和厚度。由低浓度杂质层构成的通道在金属膜正下方的基板内部以及第一绝缘膜和第二绝缘膜之间形成为环状。源极区域由高浓度杂质层构成，其形成为使得其围绕位于第一绝缘膜外侧的衬底内的沟道。漏极区域由高浓度杂质层构成，其形成为被位于第二绝缘膜内侧的位于基板内部的沟道包围。

6. 发明授权

US4532004A Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US4532004A
公开(公告)日：1985-07-30
申请号：US636221
申请日：1984-07-31
申请人： Tatsuo Akiyama , Yutaka Koshino , Shunichi Hiraki
发明人： Tatsuo Akiyama , Yutaka Koshino , Shunichi Hiraki
IPC分类号： H01L21/033 , H01L21/285 , H01L21/338 , H01L29/417 , H01L29/80 , H01L29/812 , H01L21/306 , B44C1/22 , C03C15/00 , C23F1/02
CPC分类号： H01L29/66871 , H01L21/033 , H01L21/28587 , H01L29/80 , H01L29/812
摘要： A method of manufacturing a GaAs FET is disclosed. In this manufacturing method, a protection film is formed on a GaAs substrate and a dummy gate electrode is formed thereon. A channel length setting film is isotropically formed on the dummy gate electrode to have a constant thickness. Then, an impurity is ion-implanted in the channel length setting film. Thereafter, the channel length setting film is removed. An etching preventive film is anisotropically formed along a substantially vertical direction with respect to the GaAs substrate. The dummy gate electrode is etched using the etching preventive film as a mask so as to form a first opening in the etching preventive film. Then, a second opening is formed in the region of the protection film corresponding to the region in which the dummy gate electrode was present. A gate electrode is formed to be in contact with the GaAs substrate through the first and second openings.
摘要翻译：公开了一种制造GaAs FET的方法。在该制造方法中，在GaAs衬底上形成保护膜，在其上形成虚拟栅电极。通道长度设定膜在虚拟栅电极上各向同性地形成，以具有恒定的厚度。然后，在沟道长度设定膜中离子注入杂质。此后，去除通道长度设定膜。蚀刻防止膜相对于GaAs衬底沿大致垂直方向各向异性地形成。使用防蚀膜作为掩模蚀刻伪栅电极，以在防蚀膜中形成第一开口。然后，在保护膜的与存在虚拟栅电极的区域相对应的区域中形成第二开口。栅电极通过第一和第二开口形成为与GaAs衬底接触。

7. 发明授权

US5049954A GaAs field effect semiconductor device having Schottky gate structure 失效
标题翻译：具有肖特基门结构的GaAs场效应半导体器件
公开(公告)号：US5049954A
公开(公告)日：1991-09-17
申请号：US446467
申请日：1989-12-05
申请人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
发明人： Kizashi Shimada , Tatsuo Akiyama , Yutaka Koshino
IPC分类号： H01L21/338 , H01L21/28 , H01L29/417 , H01L29/43 , H01L29/47 , H01L29/812
CPC分类号： H01L29/475
摘要： A Schottky gate electrode structure of a GaAs field effect semiconductor device comprises a Ti film having a thickness of 2 nm to 25 nm and provided adherently on a GaAs substrate including source and drain regions, and a refractory electrode film provided on the Ti film and formed of a material selected from W, Mo, Cr, Ta, Nb, V, Hf, Zr, nitrides of these metals, silicides of these metals, carbides of these metals, Ti-W alloys, WSixNy, TiNx, and TiSix. Adhesion of the refractory electrode film to the GaAs substrate is increased, and heat resisting properties of Schottky characteristics are improved according to the thin Ti film.

8. 发明授权

US5643046A Polishing method and apparatus for detecting a polishing end point of a semiconductor wafer 失效
标题翻译：用于检测半导体晶片的抛光终点的抛光方法和装置
公开(公告)号：US5643046A
公开(公告)日：1997-07-01
申请号：US390529
申请日：1995-02-17
申请人： Ichiro Katakabe , Naoto Miyashita , Tatsuo Akiyama
发明人： Ichiro Katakabe , Naoto Miyashita , Tatsuo Akiyama
IPC分类号： B24B37/013 , B24B49/04 , H01L21/304 , B24B7/22 , B24B49/12
CPC分类号： B24B37/013 , B24B49/04
摘要： A polishing method and apparatus are provided for detecting the polishing end point of a semi-conductor wafer having a polishing film and a stopper film formed thereon. First driving means are provided having a first drive shaft for rotating a polishing plate and a polishing cloth thereon. Second driving means having a second rotatable drive shaft are also provided. Mounting means for mounting the semi-conductor wafer is adapted to be rotated by the second driving means for polishing the wafer. Energy supplying means for supplying prescribed energy to the semi-conductor wafer are also included. Finally, detecting means for detecting a polishing end point of the polishing film is included and detects a variation of the energy supplied to the semi-conductor wafer. Different types of energy can be utilized such as infrared light and a vibration wave.
摘要翻译：提供了一种抛光方法和装置，用于检测在其上形成有抛光膜和阻挡膜的半导体晶片的研磨终点。第一驱动装置设置有用于使研磨板和抛光布旋转的第一驱动轴。还提供具有第二可旋转驱动轴的第二驱动装置。用于安装半导体晶片的安装装置适于通过用于抛光晶片的第二驱动装置旋转。还包括用于向半导体晶片提供规定能量的能量供给装置。最后，包括用于检测抛光膜的抛光终点的检测装置，并且检测提供给半导体晶片的能量的变化。可以使用不同类型的能量，例如红外光和振动波。

9. 发明授权

US5374835A Field effect transistor using compound semiconductor 失效
标题翻译：使用化合物半导体的场效应晶体管
公开(公告)号：US5374835A
公开(公告)日：1994-12-20
申请号：US63654
申请日：1993-05-20
申请人： Kizashi Shimada , Mayumi Kamura , Tatsuo Akiyama
发明人： Kizashi Shimada , Mayumi Kamura , Tatsuo Akiyama
IPC分类号： H01L29/812 , H01L21/338 , H01L29/423 , H01L29/778 , H01L29/80 , H01L31/112
CPC分类号： H01L29/42316
摘要： A compound semiconductor device such as HEMTs (High Electron Mobility Transistors), metal semiconductor field effect transistors, and the like includes a compound semiconductor substrate having an active region, an insulating film provided over the semiconductor substrate, source and drain electrodes provided on the active region, and a gate electrode located between the source and drain electrodes. In the structure, the gate electrode has a lower electrode portion for providing a Schottky barrier contact with the active region through an opening of the insulating film, and an upper electrode portion provided on the insulating film to extend toward only the drain electrode.
摘要翻译：诸如HEMT（高电子迁移率晶体管），金属半导体场效应晶体管等的化合物半导体器件包括具有有源区的化合物半导体衬底，设置在半导体衬底上的绝缘膜，设置在有源区上的源极和漏极以及位于源极和漏极之间的栅电极。在该结构中，栅电极具有用于通过绝缘膜的开口与有源区提供肖特基势垒接触的下电极部分和设置在绝缘膜上以仅向漏电极延伸的上电极部分。

10. 发明申请

US20140044377A1 SHOT IMAGE PROCESSING SYSTEM, SHOT IMAGE PROCESSING METHOD, MOBILE TERMINAL, AND INFORMATION PROCESSING APPARATUS 审中-公开
标题翻译：拍摄图像处理系统，拍摄图像处理方法，移动终端和信息处理设备
公开(公告)号：US20140044377A1
公开(公告)日：2014-02-13
申请号：US14112525
申请日：2012-03-07
申请人： Shoji Yachida , Daisuke Nishiwaki , Tatsuo Akiyama
发明人： Shoji Yachida , Daisuke Nishiwaki , Tatsuo Akiyama
IPC分类号： G06T7/00
CPC分类号： G06T7/00 , H04N1/00244 , H04N1/00408 , H04N1/00973 , H04N5/232 , H04N2201/0039 , H04N2201/0096
摘要： A shot image processing system (100) includes a mobile terminal (1) that shoots an image of a conversion target region containing a character and/or an image, and displays the shot image containing the conversion target region on a display unit; a server that receives the shot image from the mobile terminal (1), wherein the server (2) determines a specifying method for specifying a location of the conversion target region in the received shot image, and transmits the determined specifying method to the mobile terminal, and the mobile terminal (1) specifies the location of the conversion target region in the shot image based on the specifying method received from the server (2), converts the conversion target region specified in the shot image into a prescribed format, and displays a converted image obtained by the conversion on the display unit (16).
摘要翻译：拍摄图像处理系统（100）包括：拍摄包含字符和/或图像的转换目标区域的图像的移动终端（1），并将包含转换对象区域的拍摄图像显示在显示单元上; 从移动终端（1）接收拍摄图像的服务器，其中服务器（2）确定用于指定接收到的镜头图像中的转换目标区域的位置的指定方法，并将所确定的指定方法发送到移动终端，并且移动终端（1）基于从服务器（2）接收的指定方法来指定拍摄图像中的转换目标区域的位置，将拍摄图像中指定的转换目标区域转换为规定格式，并且显示通过在显示单元（16）上的转换获得的转换图像。

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