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1. 发明申请

US20110284854A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110284854A1
公开(公告)日：2011-11-24
申请号：US13109594
申请日：2011-05-17
申请人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO , Mitsuhiro ICHIJO , Toshiya ENDO
发明人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO , Mitsuhiro ICHIJO , Toshiya ENDO
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L29/24 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/78606
摘要： In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which forms a channel region with a gate insulating layer interposed therebetween, when a large amount of hydrogen is contained in the insulating layer, hydrogen is diffused into the oxide semiconductor layer because the insulating layer is in contact with the oxide semiconductor layer; thus, electric characteristics of the transistor are degraded. An object is to provide a semiconductor device having favorable electric characteristics. An insulating layer in which the concentration of hydrogen is less than 6×1020 atoms/cm3 is used for the insulating layer being in contact with oxide semiconductor layer which forms the channel region. Using the insulating layer, diffusion of hydrogen can be prevented and a semiconductor device having favorable electric characteristics can be provided.
摘要翻译：在具有栅极结构的晶体管中，栅电极层与形成沟道区的氧化物半导体层重叠，栅极绝缘层介于其间，当绝缘层中含有大量的氢时，氢扩散由于绝缘层与氧化物半导体层接触，所以进入氧化物半导体层; 因此，晶体管的电特性降低。本发明的目的是提供一种具有良好电特性的半导体器件。与形成沟道区域的氧化物半导体层接触的绝缘层使用其氢浓度小于6×1020原子/ cm3的绝缘层。使用绝缘层，可以防止氢的扩散，并且可以提供具有良好电特性的半导体器件。

2. 发明申请

US20110284846A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110284846A1
公开(公告)日：2011-11-24
申请号：US13110241
申请日：2011-05-18
申请人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
发明人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
IPC分类号： H01L29/786 , H01L21/336 , H01L29/12
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/4908 , H01L29/66969 , H01L29/78606
摘要： Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured.
摘要翻译：氧从绝缘层释放，由此可以减少氧化物半导体层中的氧缺乏和绝缘层与氧化物半导体层之间的界面状态。因此，可以制造可靠性高，电特性变化小的半导体装置。

3. 发明申请

US20110284847A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110284847A1
公开(公告)日：2011-11-24
申请号：US13110245
申请日：2011-05-18
申请人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
发明人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78603 , H01L29/78606
摘要： Disclosed is a semiconductor device with a transistor in which an oxide semiconductor is used. An insulating layer on a back channel side of the oxide semiconductor layer has capacitance of lower than or equal to 1.5×10−10 F/m2. For example, in the case of a top-gate transistor, a base insulating layer has capacitance of lower than or equal to 1.5×10−10 F/m2, whereby the adverse effect of an interface state between the substrate and the base insulating layer can be reduced. Thus, a semiconductor device where fluctuation in electrical characteristics is small and reliability is high can be manufactured.
摘要翻译：公开了具有使用氧化物半导体的晶体管的半导体器件。氧化物半导体层的背面通道侧的绝缘层的电容为小于或等于1.5×10 -10 F / m 2。例如，在顶栅晶体管的情况下，基极绝缘层具有小于或等于1.5×10 -10 F / m 2的电容，由此衬底和基底绝缘层之间的界面态的不利影响可以减少因此，可以制造电特性波动小，可靠性高的半导体装置。

4. 发明申请

US20110284845A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110284845A1
公开(公告)日：2011-11-24
申请号：US13110240
申请日：2011-05-18
申请人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
发明人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
IPC分类号： H01L29/786 , H01L21/336 , H01L29/12
CPC分类号： H01L21/02554 , H01L21/02488 , H01L21/02664 , H01L27/1225 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： An insulating layer containing a silicon peroxide radical is used as an insulating layer in contact with an oxide semiconductor layer for forming a channel. Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured.
摘要翻译：使用含有硅氧化物自由基的绝缘层作为与用于形成沟道的氧化物半导体层接触的绝缘层。氧从绝缘层释放，由此可以减少氧化物半导体层中的氧缺乏和绝缘层与氧化物半导体层之间的界面状态。因此，可以制造可靠性高，电特性变化小的半导体装置。

5. 发明申请

US20110284844A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110284844A1
公开(公告)日：2011-11-24
申请号：US13110236
申请日：2011-05-18
申请人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
发明人： Yuta ENDO , Toshinari SASAKI , Kosei NODA , Mizuho SATO
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/78606 , H01L29/66969 , H01L29/78603 , H01L29/7869
摘要： An object of the present invention is to manufacture a semiconductor device where fluctuation in electrical characteristics is small and reliability is high in a transistor in which an oxide semiconductor is used. An insulating layer from which oxygen is released by heating is used as a base insulating layer of an oxide semiconductor layer which forms a channel. Oxygen is released from the base insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the base insulating layer and the oxide semiconductor layer can be reduced. Thus, a semiconductor device where fluctuation in electrical characteristics is small and reliability is high can be manufactured.
摘要翻译：本发明的目的是制造其中使用氧化物半导体的晶体管的电特性波动小并且可靠性高的半导体器件。使用通过加热而释放氧的绝缘层作为形成沟道的氧化物半导体层的基极绝缘层。氧从基底绝缘层释放出来，由此可以减少氧化物半导体层的缺氧和基底绝缘层与氧化物半导体层之间的界面状态。因此，可以制造电特性波动小，可靠性高的半导体装置。

6. 发明申请

US20110244652A1 METHOD OF MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20110244652A1
公开(公告)日：2011-10-06
申请号：US13070512
申请日：2011-03-24
申请人： Shunpei YAMAZAKI , Toru TAKAYAMA , Mizuho SATO , Noriaki UTO
发明人： Shunpei YAMAZAKI , Toru TAKAYAMA , Mizuho SATO , Noriaki UTO
IPC分类号： H01L21/30
CPC分类号： H01L21/02046 , H01L21/02052 , H01L21/302 , H01L21/76254
摘要： An object of the present invention is to provide an SOI substrate including a semiconductor layer which is efficiently planarized. A method for manufacturing an SOI substrate includes a step of irradiating a bond substrate with an accelerated ion to form an embrittlement region; a step of bonding the bond substrate and the base substrate with an insulating layer positioned therebetween; a step of splitting the bond substrate at the embrittlement region to leave a semiconductor layer bonded to the base substrate; a step of disposing the semiconductor layer in front of a semiconductor target containing the same semiconductor material as the semiconductor layer; and a step of alternately irradiating the surface of the semiconductor layer and the semiconductor target with a rare gas ion, so that the surface of the semiconductor layer is planarized.
摘要翻译：本发明的目的是提供一种SOI衬底，其包括有效平面化的半导体层。 SOI衬底的制造方法包括用加速离子照射接合衬底以形成脆化区域的步骤; 将所述接合基板与所述基板的绝缘层接合的工序; 在所述脆化区域分离所述键合衬底以留下结合到所述基底衬底的半导体层的步骤; 将半导体层设置在包含与半导体层相同的半导体材料的半导体靶的前面的步骤; 以及用稀有气体离子交替地照射半导体层和半导体靶的表面的步骤，使得半导体层的表面被平坦化。

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