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1. 发明授权

US07388411B2 Semiconductor integrated circuit device and semiconductor integrated circuit system 失效
标题翻译：半导体集成电路器件和半导体集成电路系统
公开(公告)号：US07388411B2
公开(公告)日：2008-06-17
申请号：US11797951
申请日：2007-05-09
申请人： Yuta Araki , Isao Tanaka , Masaya Sumita
发明人： Yuta Araki , Isao Tanaka , Masaya Sumita
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K19/0013
摘要： A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.
摘要翻译：根据本发明的半导体集成电路器件包括：采样电路，其中在晶体管之间切换期间待监视的通流电流流过; 用于输出用于在采样电路中切换的输出信号的非重叠电路; 电流检测器，用于检测在切换期间流过的通流; 以及电流比较器，其中已经设置了相对于直流电流的参考电流值，并且将电流检测器检测的电流值与参考电流值进行比较，并将比较结果输出到非重叠电路。

2. 发明授权

US07227391B2 Semiconductor integrated circuit device and semiconductor integrated circuit system 有权
公开(公告)号：US07227391B2
公开(公告)日：2007-06-05
申请号：US11116220
申请日：2005-04-28
申请人： Yuta Araki , Isao Tanaka , Masaya Sumita
发明人： Yuta Araki , Isao Tanaka , Masaya Sumita
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K19/0013
摘要： A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.

3. 发明申请

US20070216450A1 Semiconductor integrated circuit device and semiconductor integrated circuit system 失效
标题翻译：半导体集成电路器件和半导体集成电路系统
公开(公告)号：US20070216450A1
公开(公告)日：2007-09-20
申请号：US11797951
申请日：2007-05-09
申请人： Yuta Araki , Isao Tanaka , Masaya Sumita
发明人： Yuta Araki , Isao Tanaka , Masaya Sumita
IPC分类号： H03B1/00
CPC分类号： H03K19/0013
摘要： A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.
摘要翻译：根据本发明的半导体集成电路器件包括：采样电路，其中在晶体管之间切换期间待监视的通流电流流过; 用于输出用于在采样电路中切换的输出信号的非重叠电路; 电流检测器，用于检测在切换期间流过的通流; 以及电流比较器，其中已经设置了相对于直流电流的参考电流值，并且将电流检测器检测的电流值与参考电流值进行比较，并将比较结果输出到非重叠电路。

4. 发明申请

US20050243490A1 Semiconductor integrated circuit device and semiconductor integrated circuit system 有权
标题翻译：半导体集成电路器件和半导体集成电路系统
公开(公告)号：US20050243490A1
公开(公告)日：2005-11-03
申请号：US11116220
申请日：2005-04-28
申请人： Yuta Araki , Isao Tanaka , Masaya Sumita
发明人： Yuta Araki , Isao Tanaka , Masaya Sumita
IPC分类号： H02H3/08 , H03K19/00
CPC分类号： H03K19/0013
摘要： A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.
摘要翻译：根据本发明的半导体集成电路器件包括：采样电路，其中在晶体管之间切换期间待监视的通流电流流过; 用于输出用于在采样电路中切换的输出信号的非重叠电路; 电流检测器，用于检测在切换期间流过的通流; 以及电流比较器，其中已经设置了相对于直流电流的参考电流值，并且将电流检测器检测的电流值与参考电流值进行比较，并将比较结果输出到非重叠电路。

5. 发明授权

US07501892B2 Amplifier circuit and communication device 失效
标题翻译：放大器电路和通讯装置
公开(公告)号：US07501892B2
公开(公告)日：2009-03-10
申请号：US11755869
申请日：2007-05-31
申请人： Shoji Otaka , Yuta Araki
发明人： Shoji Otaka , Yuta Araki
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/3211 , H03F3/24 , H03F2200/357 , H03F2200/456 , H03F2203/45288 , H03F2203/45362 , H03F2203/45466 , H03G1/0023
摘要： An amplifier circuit according to the present invention comprises: a first differential amplifier circuit including a first transistor having a gate terminal forming a first input node, a second transistor having a gate terminal forming a second input node and having a dimensional ratio with respect to the first transistor of K:M (where K>M), and a first current source that supplies a first current to a source terminal of the first transistor and a source terminal of the second transistor; a second differential amplifier circuit including a third transistor having a gate terminal forming a third input node, a fourth transistor having a gate terminal forming a fourth input node and having a dimensional ratio with respect to the third transistor of M:K, and a second current source that supplies a second current to a source terminal of the third transistor and a source terminal of the fourth transistor, the second differential amplifier circuit having a same gain as the first differential amplifier circuit; and a third differential amplifier circuit including a fifth transistor having a gate terminal forming a fifth input node, a sixth transistor having a gate terminal forming a sixth input node and having a dimensional ratio with respect to the fifth transistor of 1:1, and a variable current source that supplies a third current to a source terminal of the fifth transistor and a source terminal of the sixth transistor, wherein the third differential amplifier circuit combines the third current and the fifth transistor so that a gain of the third differential amplifier circuit is greater than a gain of the first differential amplifier circuit when the third current is a first magnitude, and the gain of the third differential amplifier circuit is lower than the gain of the first differential amplifier circuit when the third current is a second magnitude that differs from the first magnitude.
摘要翻译：根据本发明的放大器电路包括：第一差分放大器电路，包括具有形成第一输入节点的栅极端子的第一晶体管，第二晶体管，具有形成第二输入节点的栅极端子，并且具有相对于第一晶体管K：M（其中K> M）和第一电流源，其向第一晶体管的源极端子和第二晶体管的源极端子提供第一电流; 第二差分放大器电路，包括具有形成第三输入节点的栅极端子的第三晶体管，第四晶体管，具有形成第四输入节点的栅极端子，并且具有相对于M：K的第三晶体管的尺寸比，第二晶体管的第二向第三晶体管的源极端子和第四晶体管的源极端子提供第二电流的电流源，第二差分放大器电路具有与第一差分放大器电路相同的增益; 以及第三差分放大电路，包括具有形成第五输入节点的栅极端子的第五晶体管，第六晶体管，具有形成第六输入节点的栅极端子，并且具有相对于第五晶体管的尺寸比为1:1，以及向第五晶体管的源极端子和第六晶体管的源极端子提供第三电流的可变电流源，其中第三差分放大器电路组合第三电流和第五晶体管，使得第三差分放大器电路的增益为大于第三差分放大器电路的增益，当第三电流是第一幅度时，第三差分放大器电路的增益低于第一差分放大器电路的增益，第一大。

6. 发明授权

US07046085B2 Power amplifier and radio communication device using the amplifier 失效
公开(公告)号：US07046085B2
公开(公告)日：2006-05-16
申请号：US11258266
申请日：2005-10-26
申请人： Yuta Araki , Hiroyuki Kayano , Keiichi Yamaguchi
发明人： Yuta Araki , Hiroyuki Kayano , Keiichi Yamaguchi
IPC分类号： H03F3/68 , H03F3/191
CPC分类号： H03F1/0277 , H03F3/68 , H03F2200/294 , H03F2200/372 , H03F2200/429 , H05K1/0265 , H05K1/165 , H05K2201/09254 , H05K2201/09263
摘要： A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.

7. 发明授权

US08932716B2 Conductive particle, and anisotropic conductive film, bonded structure, and bonding method 有权
标题翻译：导电粒子，各向异性导电膜，接合结构和接合方法
公开(公告)号：US08932716B2
公开(公告)日：2015-01-13
申请号：US13332555
申请日：2011-12-21
申请人： Tomoyuki Ishimatsu , Yuta Araki
发明人： Tomoyuki Ishimatsu , Yuta Araki
IPC分类号： B32B5/16 , H05K3/32 , B22F1/02 , C22C5/02 , C22C19/03 , H01B1/02
CPC分类号： H05K3/323 , B22F1/02 , C22C5/02 , C22C19/03 , H01B1/02 , H05K2201/0218 , Y10T428/12181 , Y10T428/12944 , Y10T428/256 , Y10T428/287 , Y10T428/2991
摘要： To provide a conductive particle, containing: a core particle; and a conductive layer formed on a surface of the core particle, wherein the core particle is a nickel particle, and wherein the conductive layer is a nickel plating layer a surface of which has a phosphorous concentration of 10% by mass or lower, and the conductive layer has an average thickness of 1 nm to 10 nm.
摘要翻译：提供导电颗粒，其包含：核心颗粒; 以及形成在所述芯粒子的表面上的导电层，其中所述芯粒子为镍粒子，所述导电层为表面的磷浓度为10质量％以下的镀镍层，导电层的平均厚度为1nm〜10nm。

8. 发明授权

US07663420B2 MOS resistance controlling device and MOS attenuator 失效
标题翻译： MOS电阻控制装置和MOS衰减器
公开(公告)号：US07663420B2
公开(公告)日：2010-02-16
申请号：US11936214
申请日：2007-11-07
申请人： Yuta Araki , Shoji Otaka , Toru Hashimoto
发明人： Yuta Araki , Shoji Otaka , Toru Hashimoto
IPC分类号： H03L5/00
CPC分类号： H01L27/0802 , H03H11/245
摘要： A MOS resistance controlling device includes: a plurality of MOS transistors having a first MOS transistor to N-th (the integer N is larger than 1) MOS transistor being serially connected, the source of the first MOS transistor being set to a first reference potential, the drain the N-th MOS transistor being set to a second reference potential, and the drain of an I-th MOS transistor being connected to the source of an I+1-th MOS transistor, where I is an integer from 1 to N−1; a current source which is electrically disposed at connection node between the drain of the N-th MOS transistors and the second reference potential; and an operational amplifier having a first input terminal being supplied with a third reference potential, a second input terminal connected with the connection node and an output terminal being connected with gates of the MOS transistors.
摘要翻译： MOS电阻控制装置包括：多个MOS晶体管，其具有串联连接的第一MOS晶体管至第N（整数N大于1）的MOS晶体管，第一MOS晶体管的源极被设置为第一参考电位，第N个MOS晶体管的漏极被设置为第二参考电位，并且第一MOS晶体管的漏极连接到第I + 1个MOS晶体管的源极，其中I是从1到 N-1; 电流源，电流配置在第N个MOS晶体管的漏极与第2基准电位之间的连接节点处; 以及具有被提供有第三参考电位的第一输入端的运算放大器，与所述连接节点连接的第二输入端和与所述MOS晶体管的栅极连接的输出端。

9. 发明申请

US20120090882A1 CONDUCTIVE PARTICLE, AND ANISOTROPIC CONDUCTIVE FILM, BONDED STRUCTURE, AND BONDING METHOD 有权
标题翻译：导电颗粒和各向异性导电膜，粘结结构和粘结方法
公开(公告)号：US20120090882A1
公开(公告)日：2012-04-19
申请号：US13332555
申请日：2011-12-21
申请人： Tomoyuki ISHIMATSU , Yuta Araki
发明人： Tomoyuki ISHIMATSU , Yuta Araki
IPC分类号： H05K1/09 , B32B3/00 , H01B13/00 , B22F1/02
CPC分类号： H05K3/323 , B22F1/02 , C22C5/02 , C22C19/03 , H01B1/02 , H05K2201/0218 , Y10T428/12181 , Y10T428/12944 , Y10T428/256 , Y10T428/287 , Y10T428/2991
摘要： To provide a conductive particle, containing: a core particle; and a conductive layer formed on a surface of the core particle, wherein the core particle is a nickel particle, and wherein the conductive layer is a nickel plating layer a surface of which has a phosphorous concentration of 10% by mass or lower, and the conductive layer has an average thickness of 1 nm to 10 nm.
摘要翻译：提供导电颗粒，其包含：核心颗粒; 以及形成在所述芯粒子的表面上的导电层，其中所述芯粒子为镍粒子，所述导电层为表面的磷浓度为10质量％以下的镀镍层，导电层的平均厚度为1nm〜10nm。

10. 发明授权

US07816974B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US07816974B2
公开(公告)日：2010-10-19
申请号：US12062934
申请日：2008-04-04
申请人： Yuta Araki
发明人： Yuta Araki
IPC分类号： H03K3/01
CPC分类号： G05F3/205
摘要： A control target circuit formed by transistors is provided with a power supply level control circuit for controlling the power supply voltage supplied to the control target circuit, a substrate level control circuit for controlling the substrate voltages of the transistors, and a special substrate level control circuit for controlling the substrate voltages during transition of the power supply voltage through a different system. During transition of the power supply voltage, the special substrate level control circuit positively controls the substrate voltages such that desired substrate voltage levels are reached earlier, whereby the time for the substrate voltages to transfer to the desired substrate voltage levels is shortened. To suppress latch-up and breakdown voltage degradation, the special substrate level control circuit controls supply of voltages and currents so as to comply with the potential difference conditions defined between the power supply voltage and the substrate voltages.
摘要翻译：由晶体管形成的控制目标电路设置有用于控制提供给控制目标电路的电源电压的电源电平控制电路，用于控制晶体管的衬底电压的衬底电平控制电路和专用衬底电平控制电路用于在通过不同系统的电源电压的转变期间控制衬底电压。在电源电压的转变期间，专用基板电平控制电路正向地控制衬底电压，使得期望的衬底电压电平更早地达到，从而缩短衬底电压转移到期望的衬底电压电平的时间。为了抑制闩锁和击穿电压劣化，特殊基板电平控制电路控制电压和电流的供应，以便符合电源电压和基板电压之间限定的电势差异条件。

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