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1. 发明申请

US20070215924A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20070215924A1
公开(公告)日：2007-09-20
申请号：US11684757
申请日：2007-03-12
申请人： Yukie Nishikawa , Akira Takashima , Tatsuo Shimizu
发明人： Yukie Nishikawa , Akira Takashima , Tatsuo Shimizu
IPC分类号： H01L29/94 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L29/42324 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/513 , H01L29/7885
摘要： A memory cell in a nonvolatile semiconductor memory device includes a tunneling insulating film, a floating gate electrode made of a Si containing conductive material, an inter-electrode insulating film made of rare-earth oxide, rare-earth nitride or rare-earth oxynitride, a control gate electrode, and a metal silicide film formed between the floating gate electrode and the inter-electrode insulating film.
摘要翻译：非易失性半导体存储器件中的存储单元包括隧道绝缘膜，由含Si导电材料制成的浮栅，由稀土氧化物制成的电极间绝缘膜，稀土氮化物或稀土氧氮化物，一个控制栅极电极和一个形成在浮置栅电极和电极间绝缘膜之间的金属硅化物膜。

2. 发明授权

US07755136B2 Nonvolatile semiconductor memory device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07755136B2
公开(公告)日：2010-07-13
申请号：US11684757
申请日：2007-03-12
申请人： Yukie Nishikawa , Akira Takashima , Tatsuo Shimizu
发明人： Yukie Nishikawa , Akira Takashima , Tatsuo Shimizu
IPC分类号： H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/513 , H01L29/7885
摘要： A memory cell in a nonvolatile semiconductor memory device includes a tunneling insulating film, a floating gate electrode made of a Si containing conductive material, an inter-electrode insulating film made of rare-earth oxide, rare-earth nitride or rare-earth oxynitride, a control gate electrode, and a metal silicide film formed between the floating gate electrode and the inter-electrode insulating film.
摘要翻译：非易失性半导体存储器件中的存储单元包括隧道绝缘膜，由含Si导电材料制成的浮栅，由稀土氧化物制成的电极间绝缘膜，稀土氮化物或稀土氧氮化物，一个控制栅极电极和一个形成在浮置栅电极和电极间绝缘膜之间的金属硅化物膜。

3. 发明授权

US07902588B2 Nonvolatile semiconductor memory device and method for manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07902588B2
公开(公告)日：2011-03-08
申请号：US11846251
申请日：2007-08-28
申请人： Yukie Nishikawa , Akira Takashima , Koichi Muraoka
发明人： Yukie Nishikawa , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42336 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.
摘要翻译：非易失性半导体存储器件包括：隧道绝缘膜; 浮栅电极; 分别将面对浮置栅极的界面和面对控制栅电极的界面分别定义为第一界面和第二界面的电极间绝缘膜; 和控制栅电极。电极间绝缘膜包括选自稀土元素，选自Al，Ti，Zr，Hf，Ta，Mg，Ca，Sr和Ba中的一种或多种第二元素和氧的一种或多种第一元素。被定义为第一元素的原子数除以第二元素的原子数的第一元素的组成比在第一界面和第二界面之间改变，并且第一界面附近的组成比低于第二界面附近的位置。

4. 发明申请

US20090011537A1 Semiconductor device and method for manufacturing same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090011537A1
公开(公告)日：2009-01-08
申请号：US12213918
申请日：2008-06-26
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L21/8234
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/517 , H01L29/518 , H01L29/66545
摘要： The present invention is to obtain an MIS transistor which allows considerable reduction in threshold fluctuation for each transistor and has a low threshold voltage. First gate electrode material for nMIS and second gate electrode material for pMIS can be mutually converted to each other, so that a process can be simplified. Such a fact that a dependency of a work function on a doping amount is small is first disclosed, so that fluctuation in threshold voltage for each transistor hardly occurs.
摘要翻译：本发明是为了获得允许每个晶体管的阈值波动显着降低并且具有低阈值电压的MIS晶体管。用于nMIS的第一栅电极材料和用于pMIS的第二栅极电极材料可以相互转换，从而可以简化工艺。首先公开了功函数对掺杂量的依赖性小的事实，因此几乎不发生各晶体管的阈值电压的波动。

5. 发明授权

US07405451B2 Semiconductor device including MIS transistors 失效
标题翻译：半导体器件包括MIS晶体管
公开(公告)号：US07405451B2
公开(公告)日：2008-07-29
申请号：US11020275
申请日：2004-12-27
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L21/8234
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/517 , H01L29/518 , H01L29/66545
摘要： The present invention is to obtain an MIS transistor which allows considerable reduction in threshold fluctuation for each transistor and has a low threshold voltage. First gate electrode material for nMIS and second gate electrode material for pMIS can be mutually converted to each other, so that a process can be simplified. Such a fact that a dependency of a work function on a doping amount is small is first disclosed, so that fluctuation in threshold voltage for each transistor hardly occurs.
摘要翻译：本发明是为了获得允许每个晶体管的阈值波动显着降低并且具有低阈值电压的MIS晶体管。用于nMIS的第一栅电极材料和用于pMIS的第二栅极电极材料可以相互转换，从而可以简化工艺。首先公开了功函数对掺杂量的依赖性小的事实，因此几乎不发生各晶体管的阈值电压的波动。

6. 发明授权

US07115953B2 Semiconductor device and method of manufacturing semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07115953B2
公开(公告)日：2006-10-03
申请号：US11049661
申请日：2005-02-04
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L29/72
CPC分类号： H01L29/513 , H01L21/02123 , H01L21/02142 , H01L21/022 , H01L21/28194 , H01L21/31604 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L29/4966 , H01L29/51 , H01L29/517
摘要： A semiconductor device includes a semiconductor substrate containing Si as a main component, and an active element formed on the semiconductor substrate and including an insulating metal silicide thin film formed on the semiconductor substrate, dangling bonds of Si of the semiconductor substrate being terminated by the insulating metal silicide thin film.
摘要翻译：半导体器件包括以Si为主要成分的半导体衬底和形成在半导体衬底上的有源元件，并且包括形成在半导体衬底上的绝缘金属硅化物薄膜，半导体衬底的Si与绝缘体端接的悬挂键金属硅化物薄膜。

7. 发明申请

US20050139926A1 Semiconductor device and method for manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050139926A1
公开(公告)日：2005-06-30
申请号：US11020275
申请日：2004-12-27
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/10
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/517 , H01L29/518 , H01L29/66545
摘要： The present invention is to obtain an MIS transistor which allows considerable reduction in threshold fluctuation for each transistor and has a low threshold voltage. First gate electrode material for nMIS and second gate electrode material for pMIS can be mutually converted to each other, so that a process can be simplified. Such a fact that a dependency of a work function on a doping amount is small is first disclosed, so that fluctuation in threshold voltage for each transistor hardly occurs.
摘要翻译：本发明是为了获得允许每个晶体管的阈值波动显着降低并且具有低阈值电压的MIS晶体管。用于nMIS的第一栅电极材料和用于pMIS的第二栅极电极材料可以相互转换，从而可以简化工艺。首先公开了功函数对掺杂量的依赖性小的事实，因此几乎不发生各晶体管的阈值电压的波动。

8. 发明申请

US20050230759A1 Semiconductor device and method of manufacturing semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050230759A1
公开(公告)日：2005-10-20
申请号：US11049661
申请日：2005-02-04
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L21/322 , H01L21/28 , H01L21/316 , H01L21/336 , H01L29/49 , H01L29/51 , H01L29/76 , H01L29/78
CPC分类号： H01L29/513 , H01L21/02123 , H01L21/02142 , H01L21/022 , H01L21/28194 , H01L21/31604 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L29/4966 , H01L29/51 , H01L29/517
摘要： A semiconductor device includes a semiconductor substrate containing Si as a main component, and an active element formed on the semiconductor substrate and including an insulating metal silicide thin film formed on the semiconductor substrate, dangling bonds of Si of the semiconductor substrate being terminated by the insulating metal silicide thin film.
摘要翻译：半导体器件包括以Si为主要成分的半导体衬底和形成在半导体衬底上的有源元件，并且包括形成在半导体衬底上的绝缘金属硅化物薄膜，半导体衬底的Si与绝缘体端接的悬挂键金属硅化物薄膜。

9. 发明授权

US08618551B2 Semiconductor light emitting device 有权
标题翻译：半导体发光器件
公开(公告)号：US08618551B2
公开(公告)日：2013-12-31
申请号：US13219862
申请日：2011-08-29
申请人： Yukie Nishikawa , Hironori Yamasaki , Katsuyoshi Furuki , Takashi Kataoka
发明人： Yukie Nishikawa , Hironori Yamasaki , Katsuyoshi Furuki , Takashi Kataoka
IPC分类号： H01L31/0256
CPC分类号： H01L33/38 , H01L33/14 , H01L33/405 , H01L33/42 , H01L2933/0016
摘要： According to one embodiment, a semiconductor light emitting device includes a substrate, a first electrode, a first conductivity type layer, a light emitting layer, a second conductivity type layer and a second electrode. The first conductivity type layer includes a first contact layer, a window layer having a lower impurity concentration than the first contact layer and a first cladding layer. The second conductivity type layer includes a second cladding layer, a current spreading layer and a second contact layer. The second electrode includes a narrow-line region on the second contact layer and a pad region electrically connected to the narrow-line region. Band gap energies of the first contact and window layers are larger than that of the light emitting layer. The first contact layer is provided selectively between the window layer and the first electrode and without overlapping the second contact layer as viewed from above.
摘要翻译：根据一个实施例，半导体发光器件包括衬底，第一电极，第一导电类型层，发光层，第二导电类型层和第二电极。第一导电类型层包括第一接触层，具有比第一接触层低的杂质浓度的窗口层和第一包层。第二导电类型层包括第二包覆层，电流扩散层和第二接触层。第二电极包括在第二接触层上的窄线区域和电连接到窄线区域的焊盘区域。第一触点和窗口层的带隙能量大于发光层的带隙能量。选择性地在窗口层和第一电极之间提供第一接触层，并且从上方观察不与第二接触层重叠。

10. 发明申请

US20130221367A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20130221367A1
公开(公告)日：2013-08-29
申请号：US13599853
申请日：2012-08-30
申请人： Katsuyoshi Furuki , Hironori Yamasaki , Yukie Nishikawa
发明人： Katsuyoshi Furuki , Hironori Yamasaki , Yukie Nishikawa
IPC分类号： H01L33/60 , H01L33/02
CPC分类号： H01L33/22 , H01L33/38 , H01L33/387 , H01L33/405 , H01L33/42
摘要： According to one embodiment, a semiconductor light emitting device includes a light emitting layer, a first electrode, a first conductivity type layer, a second conductivity type layer, and a second electrode. The first electrode includes a reflection metal layer. The first conductivity type layer is provided between the light emitting layer and the first electrode. The second conductivity type layer has a first surface on the light emitting layer side and a second surface on an opposite side of the first surface. The second electrode is provided on the second surface of the second conductivity type layer. A plurarity of interfaces, provided between the first conductivity type layer and the reflection metal layer, has at least first concave-convex structures. A region of the second surface of the second conductivity type layer, where the second electrode is not provided, has second concave-convex structures.
摘要翻译：根据一个实施例，半导体发光器件包括发光层，第一电极，第一导电型层，第二导电类型层和第二电极。第一电极包括反射金属层。第一导电类型层设置在发光层和第一电极之间。第二导电类型层在发光层侧具有第一表面和在第一表面的相对侧上的第二表面。第二电极设置在第二导电类型层的第二表面上。提供在第一导电类型层和反射金属层之间的界面的多个具有至少第一凹凸结构。不设置第二电极的第二导电型层的第二表面的区域具有第二凹凸结构。

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