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1. 发明申请

US20080244029A1 DATA PROCESSING SYSTEM 有权
标题翻译：数据处理系统
公开(公告)号：US20080244029A1
公开(公告)日：2008-10-02
申请号：US12058566
申请日：2008-03-28
申请人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
发明人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
IPC分类号： G06F15/16
CPC分类号： H04L12/403 , G06F11/0742 , G06F11/0745 , G06F11/0793
摘要： A transmission cancellation section is provided on a bus connecting a master and a slave. During a reset of the master, the transmission cancellation section blocks the bus so that an invalid command flowing on the bus does not reach the slave and executes, instead of the master stopped by the reset operation, generation of data which corresponds to an access request command already output to the slave and is to be sent to the slave and receiving of data from the slave.
摘要翻译：在连接主机和从机的总线上设置传输消除部分。在主机的复位期间，传输消除部分阻塞总线，使得在总线上流动的无效命令不到达从机，并且执行，而不是通过复位操作停止主机，产生对应于访问请求的数据命令已经输出到从站，并将被发送到从站并从从站接收数据。

2. 发明授权

US07860940B2 System and method for bus transmission cancellation 有权
标题翻译：总线传输取消系统及方法
公开(公告)号：US07860940B2
公开(公告)日：2010-12-28
申请号：US12058566
申请日：2008-03-28
申请人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
发明人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
IPC分类号： G06F13/00
CPC分类号： H04L12/403 , G06F11/0742 , G06F11/0745 , G06F11/0793
摘要： A transmission cancellation section is provided on a bus connecting a master and a slave. During a reset of the master, the transmission cancellation section blocks the bus so that an invalid command flowing on the bus does not reach the slave and executes, instead of the master stopped by the reset operation, generation of data which corresponds to an access request command already output to the slave and is to be sent to the slave and receiving of data from the slave.
摘要翻译：在连接主机和从机的总线上设置传输消除部分。在主机的复位期间，传输消除部分阻塞总线，使得在总线上流动的无效命令不到达从机，并且执行，而不是通过复位操作停止主机，产生对应于访问请求的数据命令已经输出到从站，并将被发送到从站并从从站接收数据。

3. 发明申请

US20060155903A1 Resource management device 审中-公开
标题翻译：资源管理设备
公开(公告)号：US20060155903A1
公开(公告)日：2006-07-13
申请号：US11285021
申请日：2005-11-23
申请人： Yuki Soga , Takahide Baba , Yuji Takai , Daisuke Murakami
发明人： Yuki Soga , Takahide Baba , Yuji Takai , Daisuke Murakami
IPC分类号： G06F13/14
CPC分类号： G06F13/362 , G06F13/1605
摘要： A bus arbitration part for arbitrating access requests from bus masters includes an arbitration history management section that records absence of an access request from any bus master at a given basic arbitration timing. Based on this record, an access request arbitration section issues access permission for an access request issued after the given basic arbitration timing without a wait for the next basic arbitration timing.
摘要翻译：用于仲裁来自总线主机的访问请求的总线仲裁部分包括仲裁历史管理部分，其在给定的基本仲裁定时记录来自任何总线主控器的访问请求的缺失。基于该记录，访问请求仲裁部分发出在给定的基本仲裁定时之后发出的访问请求的访问许可，而不等待下一个基本仲裁定时。

4. 发明申请

US20080158248A1 Rendering device and rendering method 审中-公开
标题翻译：渲染设备和渲染方法
公开(公告)号：US20080158248A1
公开(公告)日：2008-07-03
申请号：US12071941
申请日：2008-02-28
申请人： Yasuo Nishioka , Tetsuji Kishi , Seiji Horii , Yuji Takai , Daisuke Murakami , Yuki Soga
发明人： Yasuo Nishioka , Tetsuji Kishi , Seiji Horii , Yuji Takai , Daisuke Murakami , Yuki Soga
IPC分类号： G09G5/00 , G06T11/20
CPC分类号： G06T15/00 , G06T11/40
摘要： A rendering device according to the present invention comprises an information acquiring unit for acquiring system information or rendering object information, a control point generating section for setting a curved surface interpolating level serving to determine number of control points for creating a curved surface or a curved line based on the acquired information and thereby generating the control point in accordance with the curved surface interpolating level, and a curved surface creating section for creating the curved surface based on the control point, wherein an operation quantity for rendering the curved surface of a display object is dynamically changed based on the acquired information.
摘要翻译：根据本发明的再现装置包括：用于获取系统信息或呈现对象信息的信息获取单元;控制点生成部分，用于设置用于确定用于创建曲面或曲线的控制点数量的曲面内插级别基于所获取的信息，从而根据曲面内插水平生成控制点，以及用于基于控制点创建曲面的曲面生成部，其中，用于使显示对象的曲面成形的操作量基于获取的信息动态地改变。

5. 发明申请

US20050156930A1 Rendering device and rendering method 审中-公开
标题翻译：渲染设备和渲染方法
公开(公告)号：US20050156930A1
公开(公告)日：2005-07-21
申请号：US11037244
申请日：2005-01-19
申请人： Yasuo Nishioka , Tetsuji Kishi , Seiji Horii , Yuji Takai , Daisuke Murakami , Yuki Soga
发明人： Yasuo Nishioka , Tetsuji Kishi , Seiji Horii , Yuji Takai , Daisuke Murakami , Yuki Soga
IPC分类号： G06T11/40 , G06T15/00
CPC分类号： G06T15/00 , G06T11/40
摘要： A rendering device according to the present invention comprises an information acquiring unit for acquiring system information or rendering object information, a control point generating section for setting a curved surface interpolating level serving to determine number of control points for creating a curved surface or a curved line based on the acquired information and thereby generating the control point in accordance with the curved surface interpolating level, and a curved surface creating section for creating the curved surface based on the control point, wherein an operation quantity for rendering the curved surface of a display object is dynamically changed based on the acquired information.
摘要翻译：根据本发明的再现装置包括：用于获取系统信息或呈现对象信息的信息获取单元;控制点生成部分，用于设置用于确定用于创建曲面或曲线的控制点数量的曲面内插级别基于所获取的信息，从而根据曲面内插水平生成控制点，以及用于基于控制点创建曲面的曲面生成部，其中，用于使显示对象的曲面成形的操作量基于所获取的信息动态地改变。

6. 发明申请

US20060047874A1 Resource management apparatus 审中-公开
标题翻译：资源管理装置
公开(公告)号：US20060047874A1
公开(公告)日：2006-03-02
申请号：US11197302
申请日：2005-08-05
申请人： Yoshiharu Watanabe , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Toshihiro Fukuyama
发明人： Yoshiharu Watanabe , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Toshihiro Fukuyama
IPC分类号： G06F13/14
CPC分类号： G06F13/1642 , G06F13/1663 , Y02D10/14
摘要： To manage accesses from a plurality of masters to a shared resource, a plurality of command registers of each holding an access command received from any of the masters and a plurality of address registers of each holding a register number identifying a command register holding a valid access command, are provided. To rearrange the issuing order of access commands, register numbers held in the address registers are rearranged.
摘要翻译：为了管理从多个主机到共享资源的访问，多个命令寄存器保存从任何一个主机接收的访问命令，以及多个地址寄存器，每个地址寄存器保存一个寄存器编号，该寄存器编号标识一个保存有效访问的命令寄存器命令。要重新排列访问命令的发出顺序，重新排列地址寄存器中保存的寄存器号。

7. 发明申请

US20090282270A1 MEMORY CONTROL DEVICE 有权
标题翻译：存储控制装置
公开(公告)号：US20090282270A1
公开(公告)日：2009-11-12
申请号：US12090397
申请日：2006-10-19
申请人： Daisuke Murakami , Yuji Takai , Takahide Baba
发明人： Daisuke Murakami , Yuji Takai , Takahide Baba
IPC分类号： G06F1/26 , G06F12/00
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3275 , Y02D10/128 , Y02D10/14
摘要： A clock enable (CKE) control circuit (112) is provided between a memory control circuit (111) and a SDRAM (120). When a system is in, e.g., a sleep state, the CKE control circuit (112) controls a CKE signal outputted to the SDRAM (120) such that it is fixed to a Low level. As a result, it is possible to halt a power supply provided to the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120), so that power consumption resulting from a leakage current is suppressed. In addition, it becomes also possible to reset the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120).
摘要翻译：在存储器控制电路（111）和SDRAM（120）之间提供时钟使能（CKE）控制电路（112）。当系统处于例如休眠状态时，CKE控制电路（112）控制输出到SDRAM（120）的CKE信号，使其被固定为低电平。结果，可以在保持SDRAM（120）的低功耗模式的同时停止提供给存储器控制电路（111）的电源，从而抑制由漏电流引起的功耗。此外，还可以在保持SDRAM（120）的低功耗模式的同时，重置存储器控制电路（111）。

8. 发明授权

US07472213B2 Resource management device 有权
公开(公告)号：US07472213B2
公开(公告)日：2008-12-30
申请号：US11979121
申请日：2007-10-31
申请人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
发明人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
IPC分类号： G06F12/00 , G06F13/14
CPC分类号： G06F13/161
摘要： Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.

9. 发明申请

US20050066097A1 Resource management apparatus 审中-公开
标题翻译：资源管理装置
公开(公告)号：US20050066097A1
公开(公告)日：2005-03-24
申请号：US10928367
申请日：2004-08-30
申请人： Isao Kawamoto , Seiji Horii , Yuji Takai , Tetsuji Kishi , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe , Toshihiro Fukuyama
发明人： Isao Kawamoto , Seiji Horii , Yuji Takai , Tetsuji Kishi , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe , Toshihiro Fukuyama
IPC分类号： G06F9/06 , G06F12/00 , G06F13/00 , G06F13/14 , G06F13/16 , G06F13/36 , G06F13/38 , G06F13/42 , H04B1/44
CPC分类号： G06F13/4243 , G06F13/1689
摘要： A resource management apparatus comprises an information selection unit having an operation speed different to an operation speed of a common resource and selecting from information transferred from a plurality of bus masters, a buffer unit for storing the information selected by the information selection unit, and a timing adjustment unit for controlling timings of the information selections in the information selection unit. The information selection unit selects the information comprised of a command and data transferred from any of the plurality of bus masters to the common resource. The timing adjustment unit controls the timings of the information selections in the information selection unit so that the sum of time required for selecting a plurality of predetermined volumes of information in the information selection unit and the sum of processing time in the common resource are substantially equal to each other.
摘要翻译：资源管理装置包括信息选择单元，其具有与公共资源的操作速度不同的操作速度，并且从从多个总线主机传送的信息中进行选择，用于存储由信息选择单元选择的信息的缓冲单元，以及定时调整单元，用于控制信息选择单元中的信息选择的定时。信息选择单元选择包括从多个总线主机中的任一个传送到公共资源的命令和数据的信息。定时调整单元控制信息选择单元中的信息选择的定时，使得在信息选择单元中选择多个预定量的信息所需的时间和在公共资源中的处理时间之和基本相等对彼此。

10. 发明授权

US07885133B2 Memory control device 有权
标题翻译：内存控制装置
公开(公告)号：US07885133B2
公开(公告)日：2011-02-08
申请号：US12090397
申请日：2006-10-19
申请人： Daisuke Murakami , Yuji Takai , Takahide Baba
发明人： Daisuke Murakami , Yuji Takai , Takahide Baba
IPC分类号： G11C7/00
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3275 , Y02D10/128 , Y02D10/14
摘要： A clock enable (CKE) control circuit (112) is provided between a memory control circuit (111) and a SDRAM (120). When a system is in, e.g., a sleep state, the CKE control circuit (112) controls a CKE signal outputted to the SDRAM (120) such that it is fixed to a Low level. As a result, it is possible to halt a power supply provided to the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120), so that power consumption resulting from a leakage current is suppressed. In addition, it becomes also possible to reset the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120).
摘要翻译：在存储器控制电路（111）和SDRAM（120）之间提供时钟使能（CKE）控制电路（112）。当系统处于例如休眠状态时，CKE控制电路（112）控制输出到SDRAM（120）的CKE信号，使其被固定为低电平。结果，可以在保持SDRAM（120）的低功耗模式的同时停止提供给存储器控制电路（111）的电源，从而抑制由漏电流引起的功耗。此外，还可以在保持SDRAM（120）的低功耗模式的同时，重置存储器控制电路（111）。

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