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1. 发明申请

US20050066097A1 Resource management apparatus 审中-公开
标题翻译：资源管理装置
公开(公告)号：US20050066097A1
公开(公告)日：2005-03-24
申请号：US10928367
申请日：2004-08-30
申请人： Isao Kawamoto , Seiji Horii , Yuji Takai , Tetsuji Kishi , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe , Toshihiro Fukuyama
发明人： Isao Kawamoto , Seiji Horii , Yuji Takai , Tetsuji Kishi , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe , Toshihiro Fukuyama
IPC分类号： G06F9/06 , G06F12/00 , G06F13/00 , G06F13/14 , G06F13/16 , G06F13/36 , G06F13/38 , G06F13/42 , H04B1/44
CPC分类号： G06F13/4243 , G06F13/1689
摘要： A resource management apparatus comprises an information selection unit having an operation speed different to an operation speed of a common resource and selecting from information transferred from a plurality of bus masters, a buffer unit for storing the information selected by the information selection unit, and a timing adjustment unit for controlling timings of the information selections in the information selection unit. The information selection unit selects the information comprised of a command and data transferred from any of the plurality of bus masters to the common resource. The timing adjustment unit controls the timings of the information selections in the information selection unit so that the sum of time required for selecting a plurality of predetermined volumes of information in the information selection unit and the sum of processing time in the common resource are substantially equal to each other.
摘要翻译：资源管理装置包括信息选择单元，其具有与公共资源的操作速度不同的操作速度，并且从从多个总线主机传送的信息中进行选择，用于存储由信息选择单元选择的信息的缓冲单元，以及定时调整单元，用于控制信息选择单元中的信息选择的定时。信息选择单元选择包括从多个总线主机中的任一个传送到公共资源的命令和数据的信息。定时调整单元控制信息选择单元中的信息选择的定时，使得在信息选择单元中选择多个预定量的信息所需的时间和在公共资源中的处理时间之和基本相等对彼此。

2. 发明授权

US07032046B2 Resource management device for managing access from bus masters to shared resources 有权
标题翻译：用于管理从总线主机访问共享资源的资源管理设备
公开(公告)号：US07032046B2
公开(公告)日：2006-04-18
申请号：US10673191
申请日：2003-09-30
申请人： Seiji Horii , Yuji Takai , Takahide Baba , Yoshiharu Watanabe , Daisuke Murakami , Tetsuji Kishi
发明人： Seiji Horii , Yuji Takai , Takahide Baba , Yoshiharu Watanabe , Daisuke Murakami , Tetsuji Kishi
IPC分类号： G06F13/36
CPC分类号： G06F13/1663
摘要： A resource management device of the present invention, used in a system where at least one bus master is connected to each of a plurality of buses, includes: a bus arbitration section for arbitrating an amount of access to be made from the buses to a shared resource; an arbitration information management section for managing, as bus arbitration information, a bus priority order and a highest access priority pattern for ensuring a predetermined access bandwidth to the shared resource for each bus for an arbitration operation by the bus arbitration section; and a resource control section for controlling, based on characteristics of the shared resource, an access to the shared resource from the bus whose access request has been granted by the bus arbitration section. Thus, it is possible to guarantee a minimum bandwidth for access to the shared resource for each of the plurality of bus masters.
摘要翻译：本发明的资源管理装置用于至少一个总线主机连接到多个总线中的每一个的系统中，包括：总线仲裁部，用于将从总线进行的访问量仲裁为共享资源; 仲裁信息管理部分，用于作为总线仲裁信息，用于总线优先权顺序和最高访问优先级模式，用于确保每个总线的共享资源的预定访问带宽用于总线仲裁部分的仲裁操作; 以及资源控制部分，用于基于所述共享资源的特性，从总线仲裁部分已经授权其访问请求的总线访问共享资源。因此，可以保证用于访问多个总线主机中的每一个的共享资源的最小带宽。

3. 发明申请

US20060047874A1 Resource management apparatus 审中-公开
标题翻译：资源管理装置
公开(公告)号：US20060047874A1
公开(公告)日：2006-03-02
申请号：US11197302
申请日：2005-08-05
申请人： Yoshiharu Watanabe , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Toshihiro Fukuyama
发明人： Yoshiharu Watanabe , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Toshihiro Fukuyama
IPC分类号： G06F13/14
CPC分类号： G06F13/1642 , G06F13/1663 , Y02D10/14
摘要： To manage accesses from a plurality of masters to a shared resource, a plurality of command registers of each holding an access command received from any of the masters and a plurality of address registers of each holding a register number identifying a command register holding a valid access command, are provided. To rearrange the issuing order of access commands, register numbers held in the address registers are rearranged.
摘要翻译：为了管理从多个主机到共享资源的访问，多个命令寄存器保存从任何一个主机接收的访问命令，以及多个地址寄存器，每个地址寄存器保存一个寄存器编号，该寄存器编号标识一个保存有效访问的命令寄存器命令。要重新排列访问命令的发出顺序，重新排列地址寄存器中保存的寄存器号。

4. 发明授权

US07472213B2 Resource management device 有权
公开(公告)号：US07472213B2
公开(公告)日：2008-12-30
申请号：US11979121
申请日：2007-10-31
申请人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
发明人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
IPC分类号： G06F12/00 , G06F13/14
CPC分类号： G06F13/161
摘要： Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.

5. 发明授权

US07350004B2 Resource management device 有权
公开(公告)号：US07350004B2
公开(公告)日：2008-03-25
申请号：US11057521
申请日：2005-02-15
申请人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
发明人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
IPC分类号： G06F12/00 , G06F13/14
CPC分类号： G06F13/161
摘要： Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.

6. 发明申请

US20080065801A1 Resource management device 有权
标题翻译：资源管理设备
公开(公告)号：US20080065801A1
公开(公告)日：2008-03-13
申请号：US11979121
申请日：2007-10-31
申请人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
发明人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
IPC分类号： G06F13/372
CPC分类号： G06F13/161
摘要： Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.
摘要翻译：包括多个时隙的带宽信息，每个时隙各自具有用于仲裁访问冲突的最高优先级顺序信息;以及优先级主信息，用于指定访问用作共享资源的存储器的等待时间的多个主机中的一个或多个作为优先级主机希望被减少为仲裁信息。当仲裁部分在每个预定仲裁定时切换带宽信息中的时隙时仲裁访问冲突，如果存在来自优先级主机信息中指定的优先级主机的访问请求，则仲裁部分改变在带宽信息，以便优先级主机优先访问存储器。

7. 发明申请

US20050204085A1 Resource management device 有权
标题翻译：资源管理设备
公开(公告)号：US20050204085A1
公开(公告)日：2005-09-15
申请号：US11057521
申请日：2005-02-15
申请人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
发明人： Toshihiro Fukuyama , Yuji Takai , Isao Kawamoto , Takahide Baba , Daisuke Murakami , Yoshiharu Watanabe
IPC分类号： G06F15/177 , G06F9/46 , G06F9/52 , G06F13/00 , G06F13/36 , G06F13/362
CPC分类号： G06F13/161
摘要： Bandwidth information including a plurality of slots each having highest priority order information for arbitrating access conflict, and priority master information for specifying, as a priority master, one or more of a plurality of masters whose latency in accessing a memory serving as a shared resource is desired to be reduced are included as arbitration information. When an arbitration section arbitrates access conflict while switching the slots in the bandwidth information at each of predetermined arbitration timings, if there is an access request from the priority master specified in the priority master information, the arbitration section changes the sequence of the slots in the bandwidth information so as to allow the priority master to access the memory with priority.
摘要翻译：包括多个时隙的带宽信息，每个时隙各自具有用于仲裁访问冲突的最高优先级顺序信息;以及优先级主信息，用于指定访问用作共享资源的存储器的等待时间的多个主机中的一个或多个作为优先级主机希望被减少为仲裁信息。当仲裁部分在每个预定仲裁定时切换带宽信息中的时隙时仲裁访问冲突，如果存在来自优先级主机信息中指定的优先级主机的访问请求，则仲裁部分改变在带宽信息，以便优先级主机优先访问存储器。

8. 发明申请

US20080098153A1 Memory access controller 审中-公开
标题翻译：内存访问控制器
公开(公告)号：US20080098153A1
公开(公告)日：2008-04-24
申请号：US11892334
申请日：2007-08-22
申请人： Yasuo Nishioka , Takahide Baba , Seiji Horii , Yoshiharu Watanabe
发明人： Yasuo Nishioka , Takahide Baba , Seiji Horii , Yoshiharu Watanabe
IPC分类号： G06F12/06
CPC分类号： G06F13/1631
摘要： A memory access controller includes: an access request bank analyzer which generates access request bank information indicative of a bank of a memory to be accessed according to a memory access request signal; a bank use state information holder for holding the access request bank information for a predetermined period to use the held information as bank use state information; and an access permission signal generator for generating, based on the access request bank information and the bank use state information, an access permission signal which is to be used for controlling whether or not to accept a subsequent memory bank access. The bank use state information regarding an access-permitted memory bank is updated according to the access information, such as transfer direction information, access unit information, memory initialization information, etc.
摘要翻译：存储器访问控制器包括：访问请求库分析器，其根据存储器访问请求信号产生指示要访问的存储器的存储体的访问请求库信息; 银行使用状态信息保持器，用于将预定时段的访问请求银行信息保持为使用所保持的信息作为银行使用状态信息; 以及访问许可信号发生器，用于基于访问请求库信息和存储体使用状态信息生成要用于控制是否接受后续存储体访问的访问许可信号。根据诸如传送方向信息，访问单元信息，存储器初始化信息等的访问信息来更新关于访问许可的存储体的存储体的状态信息。

9. 发明申请

US20080244029A1 DATA PROCESSING SYSTEM 有权
标题翻译：数据处理系统
公开(公告)号：US20080244029A1
公开(公告)日：2008-10-02
申请号：US12058566
申请日：2008-03-28
申请人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
发明人： Yuki Soga , Daisuke Murakami , Takahide Baba , Yuji Takai , Yasuo Nishioka
IPC分类号： G06F15/16
CPC分类号： H04L12/403 , G06F11/0742 , G06F11/0745 , G06F11/0793
摘要： A transmission cancellation section is provided on a bus connecting a master and a slave. During a reset of the master, the transmission cancellation section blocks the bus so that an invalid command flowing on the bus does not reach the slave and executes, instead of the master stopped by the reset operation, generation of data which corresponds to an access request command already output to the slave and is to be sent to the slave and receiving of data from the slave.
摘要翻译：在连接主机和从机的总线上设置传输消除部分。在主机的复位期间，传输消除部分阻塞总线，使得在总线上流动的无效命令不到达从机，并且执行，而不是通过复位操作停止主机，产生对应于访问请求的数据命令已经输出到从站，并将被发送到从站并从从站接收数据。

10. 发明申请

US20090282270A1 MEMORY CONTROL DEVICE 有权
标题翻译：存储控制装置
公开(公告)号：US20090282270A1
公开(公告)日：2009-11-12
申请号：US12090397
申请日：2006-10-19
申请人： Daisuke Murakami , Yuji Takai , Takahide Baba
发明人： Daisuke Murakami , Yuji Takai , Takahide Baba
IPC分类号： G06F1/26 , G06F12/00
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3275 , Y02D10/128 , Y02D10/14
摘要： A clock enable (CKE) control circuit (112) is provided between a memory control circuit (111) and a SDRAM (120). When a system is in, e.g., a sleep state, the CKE control circuit (112) controls a CKE signal outputted to the SDRAM (120) such that it is fixed to a Low level. As a result, it is possible to halt a power supply provided to the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120), so that power consumption resulting from a leakage current is suppressed. In addition, it becomes also possible to reset the memory control circuit (111), while maintaining the low-power-consumption mode of the SDRAM (120).
摘要翻译：在存储器控制电路（111）和SDRAM（120）之间提供时钟使能（CKE）控制电路（112）。当系统处于例如休眠状态时，CKE控制电路（112）控制输出到SDRAM（120）的CKE信号，使其被固定为低电平。结果，可以在保持SDRAM（120）的低功耗模式的同时停止提供给存储器控制电路（111）的电源，从而抑制由漏电流引起的功耗。此外，还可以在保持SDRAM（120）的低功耗模式的同时，重置存储器控制电路（111）。

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