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1. 发明申请

US20080065920A1 Microcontroller and arts related thereto 有权
标题翻译：微控制器及相关艺术
公开(公告)号：US20080065920A1
公开(公告)日：2008-03-13
申请号：US11898145
申请日：2007-09-10
申请人： Yukari Suginaka , Toshifumi Hamaguchi , Yoshitaka Kitao , Shinya Muramatsu
发明人： Yukari Suginaka , Toshifumi Hamaguchi , Yoshitaka Kitao , Shinya Muramatsu
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3243 , G06F1/3296 , Y02D10/128 , Y02D10/152 , Y02D10/172 , Y02D50/20
摘要： A power supply unit is arranged between a CPU and a power supply device for supplying power to the CPU. Information necessary in proceeding with a program is evacuated from the CPU to an information holding unit. When a power shutdown factor is generated, a power supply control unit outputs a shutdown request signal to the CPU. The CPU, upon receiving the shutdown request signal, activates a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after the evacuation is completed. Upon receiving the evacuation completed signal, the power supply control unit outputs a power shutdown control signal to the power supply unit. Upon receiving the power shutdown control signal from the power supply control unit, the power supply unit shuts down power supply to the CPU.
摘要翻译：在CPU和供电装置之间设置电源单元，用于向CPU供电。执行程序所需的信息从CPU撤出到信息保存单元。当产生电源关闭因素时，电源控制单元向CPU输出关闭请求信号。 CPU在接收到关闭请求信号后，激活电源关闭微程序，将执行程序所必需的信息撤出到信息保持单元，并且在完成撤离之后将撤离完成信号输出到电源控制单元。在接收到撤离完成信号时，电源控制单元向电源单元输出停电控制信号。在从电源控制单元接收到电源关闭控制信号时，电源单元关闭CPU的电源。

2. 发明授权

US07930575B2 Microcontroller for controlling power shutdown process 有权
标题翻译：用于控制电源关闭过程的微控制器
公开(公告)号：US07930575B2
公开(公告)日：2011-04-19
申请号：US11898145
申请日：2007-09-10
申请人： Yukari Suginaka , Toshifumi Hamaguchi , Yoshitaka Kitao , Shinya Muramatsu
发明人： Yukari Suginaka , Toshifumi Hamaguchi , Yoshitaka Kitao , Shinya Muramatsu
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3243 , G06F1/3296 , Y02D10/128 , Y02D10/152 , Y02D10/172 , Y02D50/20
摘要： A power supply unit is arranged between a CPU and a power supply device for supplying power to the CPU. Information necessary in proceeding with a program is evacuated from the CPU to an information holding unit. When a power shutdown factor is generated, a power supply control unit outputs a shutdown request signal to the CPU. The CPU, upon receiving the shutdown request signal, activates a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after the evacuation is completed. Upon receiving the evacuation completed signal, the power supply control unit outputs a power shutdown control signal to the power supply unit. Upon receiving the power shutdown control signal from the power supply control unit, the power supply unit shuts down power supply to the CPU.
摘要翻译：在CPU和供电装置之间设置电源单元，用于向CPU供电。执行程序所必需的信息从CPU撤出到信息保存单元。当产生电源关闭因素时，电源控制单元向CPU输出关闭请求信号。 CPU在接收到关闭请求信号后，激活电源关闭微程序，将执行程序所必需的信息撤出到信息保持单元，并且在完成撤离之后将撤离完成信号输出到电源控制单元。在接收到撤离完成信号时，电源控制单元向电源单元输出停电控制信号。在从电源控制单元接收到电源关闭控制信号时，电源单元关闭CPU的电源。

3. 发明申请

US20080082802A1 Microcomputer debugging system 审中-公开
标题翻译：微机调试系统
公开(公告)号：US20080082802A1
公开(公告)日：2008-04-03
申请号：US11905228
申请日：2007-09-28
申请人： Shinya Muramatsu , Toshifumi Hamaguchi
发明人： Shinya Muramatsu , Toshifumi Hamaguchi
IPC分类号： G06F9/00
CPC分类号： G06F11/3652
摘要： A microcomputer debugging system capable of executing a plurality of debug modes, wherein processing is not allowed to shift to an interruption program during a debugging operation in one of the plurality of debug modes, and is allowed to shift to the interruption program during the debugging operation in another debug mode.
摘要翻译：一种能够执行多个调试模式的微型计算机调试系统，其中在所述多个调试模式之一中的调试操作期间不允许处理转换到中断程序，并且在调试操作期间被允许切换到中断程序在另一个调试模式。

4. 发明申请

US20070101101A1 Microprocessor 审中-公开
标题翻译：微处理器
公开(公告)号：US20070101101A1
公开(公告)日：2007-05-03
申请号：US11584515
申请日：2006-10-23
申请人： Hiroyuki Odahara , Toshifumi Hamaguchi , Shinya Muramatsu
发明人： Hiroyuki Odahara , Toshifumi Hamaguchi , Shinya Muramatsu
IPC分类号： G06F9/30
CPC分类号： G06F9/30149 , G06F9/30152 , G06F9/30167 , G06F9/30181
摘要： In a microprocessor that interprets instructions where a same instruction code can be interpreted as separate instructions with respectively different data lengths, a data length storage circuit that stores data length selection-use information is provided in a decoding unit. Instructions instructing storage to a general-purpose register, such storage of 8-bit immediate data to register R1, are set in advance as first-type instructions. Instructions that do not explicitly specify a data length, in other words, instructions whose processing targets are various lengths of data stored in the general-purpose register are set in advance as second-type instructions. When decoding a first-type instruction, the decoding unit updates the data length selection-use information in accordance with the first-type instruction. When decoding a second-type instruction, the decoding unit specifies the data length by referring to the data length selection-use information, and decodes the second-type instruction based on the specified data length.
摘要翻译：在解码指令的微处理器中，相同的指令代码可被解释为分别具有不同数据长度的单独指令，在解码单元中提供存储数据长度选择使用信息的数据长度存储电路。指令存储到通用寄存器的指令，将8位立即数据存储到寄存器R 1，作为第一类型指令被预先设置。没有明确指定数据长度的指令，换句话说，其处理目标是存储在通用寄存器中的各种长度的数据的指令被预先设置为第二类型指令。当解码第一类型指令时，解码单元根据第一类型指令来更新数据长度选择使用信息。当解码第二类型指令时，解码单元通过参考数据长度选择使用信息来指定数据长度，并且基于指定的数据长度对第二类型指令进行解码。

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