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1. 发明授权

US06239694B1 Warning device for filter-changing time 失效
标题翻译：过滤器更换时间的警告装置
公开(公告)号：US06239694B1
公开(公告)日：2001-05-29
申请号：US09553806
申请日：2000-04-21
申请人： Yuji Honda , Hirokazu Imai , Hitoshi Ninomiya
发明人： Yuji Honda , Hirokazu Imai , Hitoshi Ninomiya
IPC分类号： B60Q100
CPC分类号： B01D46/0086 , B01D46/46 , B60H3/0608 , B60H2003/0683
摘要： A warning device for warning change time of a filter for cleaning air includes an indication lamp which indicates a warning of the change time of the filter, and a control unit for controlling operation of the indication lamp. The control unit sets a next timer setting value for the next filter change to a filter-using time until a change of the filter, and operates the indication lamp when the filter-using time passes the next timer setting value after the change of the filter. Thus, the warning of the change time of the filter is performed at a suitable moment reflecting a variation of a clogging degree of the filter. As a result, the warning device accurately performs the warning of the change time of the filer without using a sensor for detecting the clogging degree of the filter.
摘要翻译：用于清洁空气的过滤器的警告更换时间的警告装置包括指示灯，其指示过滤器的改变时间的警告;以及控制单元，用于控制指示灯的操作。控制单元将下一个滤波器改变的下一个定时器设置值设置为滤波器使用时间直到滤波器的改变，并且在滤波器改变之后滤波器使用时间经过下一个定时器设置值时操作指示灯。因此，过滤器的变更时间的警告在反映过滤器的堵塞程度的变化的适当时刻进行。结果，警告装置在不使用用于检测过滤器的堵塞程度的传感器的情况下，准确地执行纸张更换时间的警告。

2. 发明授权

US07919374B2 Method for manufacturing a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07919374B2
公开(公告)日：2011-04-05
申请号：US12503297
申请日：2009-07-15
申请人： Hitoshi Ninomiya , Yoshinao Miura
发明人： Hitoshi Ninomiya , Yoshinao Miura
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/1095 , H01L29/41766 , H01L29/4236 , H01L29/4238 , H01L29/456 , H01L29/7808 , H01L29/7813
摘要： A conventional power MOSFET structure is difficult to improve a breakdown voltage of an element even using a super-junction structure. A power MOSFET according to an embodiment of the invention is a semiconductor device of a super-junction structure, including: a gate electrode filled in a trench formed on a semiconductor substrate; a gate wiring metal forming a surface layer; and a gate electrode plug connecting between the gate electrode and the gate wiring metal. Thus, a polysilicon layer necessary for the conventional typical power MOSFET is unnecessary. That is, column regions of an element active portion and an outer peripheral portion can be formed under the same conditions. As a result, it is possible to improve an element breakdown voltage as compared with the conventional one.
摘要翻译：常规的功率MOSFET结构即使使用超结结构也难以提高元件的击穿电压。根据本发明的实施例的功率MOSFET是超结结构的半导体器件，包括：填充在形成在半导体衬底上的沟槽中的栅电极; 形成表面层的栅极布线金属; 以及连接在栅极电极和栅极配线金属之间的栅电极插头。因此，传统典型功率MOSFET所需的多晶硅层是不必要的。也就是说，可以在相同条件下形成元件活性部分和外周部分的列区域。结果，与现有技术相比，可以提高元件击穿电压。

3. 发明申请

US20060076614A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060076614A1
公开(公告)日：2006-04-13
申请号：US11220678
申请日：2005-09-08
申请人： Hitoshi Ninomiya
发明人： Hitoshi Ninomiya
IPC分类号： H01L29/94
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/1095 , H01L29/4238 , H01L29/66734
摘要： A semiconductor device well balanced between high voltage applicability and low ON resistance, includes an n+-type semiconductor substrate; an n-type drift region formed thereon; a p-type base region formed on the n-type drift region; a plurality of p-type column regions in the n-type drift region so as to contact with the p-type base region and having a predetermined depth in a direction perpendicular to the p-type base region; a plurality of gate electrodes spaced by a regular distance from the centers, as viewed in the depth-wise direction, of each p-type column region, and penetrating the p-type base region, and partly buried in the n-type drift region; n-type source regions provided in the surficial region of the p-type base region around each of the gate electrodes; a drain electrode connected to the back surface of the n+-type semiconductor substrate; and a source electrode connected to the n-type source regions.
摘要翻译：在高电压适用性和低导通电阻之间良好平衡的半导体器件包括n + +型半导体衬底; 形成在其上的n型漂移区; 形成在n型漂移区上的p型基区; 在n型漂移区域内的多个p型列区域，以与p型基极区域接触并且在垂直于p型基极区域的方向上具有预定的深度; 多个栅电极，每个p型列区域沿深度方向与中心间隔开一定距离，并且穿透p型基极区域，部分地埋在n型漂移区域中 ; 设置在每个栅电极周围的p型基极区域的表面区域中的n型源极区域; 连接到n + +型半导体衬底的背面的漏电极; 以及与n型源极区域连接的源电极。

4. 发明授权

US06639275B2 Semiconductor device with vertical MOSFET 有权
标题翻译：具有垂直MOSFET的半导体器件
公开(公告)号：US06639275B2
公开(公告)日：2003-10-28
申请号：US10164640
申请日：2002-06-10
申请人： Hitoshi Ninomiya
发明人： Hitoshi Ninomiya
IPC分类号： H01L29792
CPC分类号： H01L29/7813 , H01L21/823487 , H01L27/088 , H01L29/4238 , H01L29/7811
摘要： A semiconductor device improves the gate withstand voltage of vertical MOSFETs and raises their operation speed. The gate electrode is formed in the trench of the second semiconductor layer. The interlayer dielectric layer has the contact hole that exposes the connection portion of the gate electrode, where the connection portion is located in the trench. The conductive plug is filled in the contact hole of the interlayer dielectric layer in such a way as to contact the connection portion of the gate electrode. The wiring layer is formed on the interlayer dielectric layer in such a way as to contact the plug, resulting in the wiring layer electrically connected to the connection portion by way of the plug. There is no need to form a connection portion for the gate electrode outside of the trench, which means that the gate dielectric does not include a weak or thinner portion where dielectric breakdown is likely to occur.
摘要翻译：半导体器件提高了垂直MOSFET的栅极耐受电压，提高了其工作速度。栅电极形成在第二半导体层的沟槽中。层间绝缘层具有暴露栅电极的连接部分的接触孔，其中连接部分位于沟槽中。导电插塞以与栅电极的连接部分接触的方式填充在层间电介质层的接触孔中。布线层以与接触插塞的方式形成在层间电介质层上，导致布线层通过插头与连接部分电连接。不需要在沟槽的外部形成用于栅电极的连接部分，这意味着栅极电介质不包括可能发生电介质击穿的弱或更薄的部分。

5. 发明授权

US5792229A Filter and filtering apparatus 失效
标题翻译：过滤装置
公开(公告)号：US5792229A
公开(公告)日：1998-08-11
申请号：US877197
申请日：1997-06-17
申请人： Yukiya Sassa , Toshiaki Fukuta , Kenichi Kato , Hitoshi Ninomiya
发明人： Yukiya Sassa , Toshiaki Fukuta , Kenichi Kato , Hitoshi Ninomiya
IPC分类号： B01D46/00 , B01D46/10 , B01D46/12 , B01D46/52 , F24F13/28
CPC分类号： B01D46/523 , B01D46/0001 , B01D46/0005 , B01D46/103 , B01D46/12 , B60H3/0616 , F24F13/28 , B01D2271/02 , B01D2279/50 , B60H2003/065
摘要： A filter corrugated in wave shape along a first axis has an end filter material piece positioning at an end of the first axis and adjacent filter material piece positioning adjoining to said end filter material piece. The end filter material piece and said adjacent end filter material piece are adhered to each other by an adhesive. In another embodiment, a filter element has a cushion material disposed between the end filter material piece and the adjacent end filter material piece. A filter material has convex and concave crease portions alternately disposed along a first axis thereof and extending along a second axis thereof. The convex and concave crease portions define alternating convex and concave spaces therein. An elastic material fills at least a portion of at least one of said concave and convex spaces.
摘要翻译：沿着第一轴波纹状波形的滤波器具有定位在第一轴线的端部处的端部过滤材料片和与所述端部过滤材料片相邻的邻近的过滤材料片。末端过滤材料片和相邻的端部过滤材料片通过粘合剂彼此粘合。在另一个实施例中，过滤器元件具有设置在端部过滤材料件和相邻的端部过滤材料件之间的衬垫材料。过滤材料具有沿其第一轴线交替设置并沿其第二轴线延伸的凸形和凹形折痕部分。凸起和凹陷的折痕部分在其中限定交替的凸和凹空间。弹性材料填充至少一个所述凹形和凸形空间的至少一部分。

6. 发明授权

US07829417B2 Semiconductor apparatus and method of manufacturing semiconductor apparatus 失效
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US07829417B2
公开(公告)日：2010-11-09
申请号：US12128865
申请日：2008-05-29
申请人： Hitoshi Ninomiya , Yoshinao Miura , Yoshiya Kawashima
发明人： Hitoshi Ninomiya , Yoshinao Miura , Yoshiya Kawashima
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/266 , H01L29/0634 , H01L29/1095 , H01L29/66734
摘要： A semiconductor apparatus with a superjunction structure includes a gate electrode which fills a trench that is formed in an epitaxial layer, and a column region which is surrounded by the gate electrode in a plane view. A photomask for forming the column region is elaborated. The photomask has a compensation pattern that compensates a deformation of a photo resist pattern caused by photo interference and a deformation of the ion implantation region diffused by heat treatment. Therefore extending direction of the gate electrode and the outer edge of the column region are substantially parallel.
摘要翻译：具有超结构结构的半导体装置包括填充形成在外延层中的沟槽的栅极电极和在平面图中被栅电极包围的列区域。阐述了用于形成柱区域的光掩模。光掩模具有补偿图案，其补偿由光干涉引起的光致抗蚀剂图案的变形和通过热处理扩散的离子注入区域的变形。因此，栅电极和列区域的外边缘的延伸方向基本上平行。

7. 发明申请

US20080197381A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080197381A1
公开(公告)日：2008-08-21
申请号：US12029478
申请日：2008-02-12
申请人： Yoshiya Kawashima , Yoshinao Miura , Hitoshi Ninomiya
发明人： Yoshiya Kawashima , Yoshinao Miura , Hitoshi Ninomiya
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/7397 , H01L29/66348
摘要： A semiconductor device is provided with a vertical MOSFET including an N-type drift region that has a {110} crystal plane serving as the main surface thereof, a trench gate structure formed in a trench that has a {100} crystal plane serving as a sidewall surface thereof, and plural P-type column region structures provided in the N-type drift region 3, making up the super-junction structure. The P-type column region structures are disposed so as to be separated from each other in a plan view, and each of the plurality of column structures includes a plurality of column regions of the second conductivity type separated from each other in a cross-sectional view. By applying ion implantation of a P-type dopant to the main surface from a direction vertical to the main surface, the P-type column regions are formed down to sufficiently deeper positions in the drift region due to channeling. By so doing, it is possible to obtain a semiconductor device with an enhanced breakdown voltage. Further, since it is possible that a crystal plane of a channel is the {100} crystal plane, enabling a maximum electron mobility to be obtained, it is possible to increase on-current, so that on-resistance can be reduced.
摘要翻译：半导体器件设置有包括具有{110}晶面用作其主表面的N型漂移区的垂直MOSFET，在具有{100}晶面的沟槽中形成的沟槽栅结构，作为以及设置在N型漂移区域3中的多个P型列区域结构，构成超结结构。 P型列区域结构被布置成在平面图中彼此分离，并且多个列结构中的每一个都包括在横截面中彼此分离的多个第二导电类型的列区域视图。通过从垂直于主表面的方向向主表面施加P型掺杂剂的离子注入，P型列区域由于引导而形成在漂移区域中的足够深的位置。通过这样做，可以获得具有增强的击穿电压的半导体器件。此外，由于通道的晶面可以是{100}晶面，因此能够获得最大的电子迁移率，可以增加导通电流，从而可以降低导通电阻。

8. 发明授权

US07335949B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07335949B2
公开(公告)日：2008-02-26
申请号：US11320950
申请日：2005-12-30
申请人： Hitoshi Ninomiya , Yoshinao Miura
发明人： Hitoshi Ninomiya , Yoshinao Miura
IPC分类号： H10L29/94
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/4236 , H01L29/42372 , H01L29/4238 , H01L29/7813
摘要： A semiconductor device 100 includes an element-forming region having gate electrode 108 formed therein, and a circumferential region formed in the outer circumference of the element-forming region and having an element-isolating region 118 formed therein. On the main surface of the semiconductor substrate 101, there is formed a parallel pn layer having an N-type drift region 104 and P-type column regions 106 alternately arranged therein. In the circumferential region, there is formed a field electrode 120, but the field electrode 120 is not formed on the P-type column regions 106. The P-type column regions 106 in the circumferential region are formed with a depth larger than or equal to that of the P-type column regions 106 in the element-forming region.
摘要翻译：半导体器件100包括其中形成有栅极电极108的元件形成区域和形成在元件形成区域的外周中并具有形成在其中的元件隔离区域118的周向区域。在半导体衬底101的主表面上形成有交替布置在其中的N型漂移区104和P型列区106的平行pn层。在圆周区域中形成有场电极120，但是在P型列区域106上不形成场电极120。圆周区域中的P型列区域106形成为具有大于或等于元件形成区域中的P型列区域106的深度的深度。

9. 发明授权

US07279747B2 Semiconductor device, and production method for manufacturing such semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07279747B2
公开(公告)日：2007-10-09
申请号：US10833055
申请日：2004-04-28
申请人： Hitoshi Ninomiya
发明人： Hitoshi Ninomiya
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0649 , H01L29/1095 , H01L29/66712 , H01L29/7813
摘要： A semiconductor device includes a first conductivity type semiconductor substrate. A first conductivity type drift layer is formed on a surface of the first conductivity type semiconductor substrate, and a second conductivity type base region is produced in the first conductivity type drift layer. The second conductivity type base region has a trench formed in a surface thereof. A trench-stuffed layer is formed by stuffing the trench with a suitable material, and a second conductivity type column region formed in the first conductivity type drift layer and sited beneath the trench-stuffed layer. A first conductivity type source region is produced in the second conductivity type base region, and both a gate insulating layer and a gate electrode layer are produced so as to be associated with the first conductivity type source region and the first conductivity type drift layer such that an inversion region is defined in the second conductivity type base region in the vicinity of both the gate insulating layer and the gate electrode layer.
摘要翻译：半导体器件包括第一导电型半导体衬底。在第一导电型半导体衬底的表面上形成第一导电型漂移层，并且在第一导电型漂移层中产生第二导电型基极区。第二导电型基极区域在其表面形成沟槽。通过用合适的材料填充沟槽和形成在第一导电型漂移层中并位于沟槽填充层下方的第二导电型列区形成沟槽填充层。在第二导电型基极区域中产生第一导电型源极区域，并且制造栅极绝缘层和栅极电极层，以便与第一导电型源极区域和第一导电型漂移层相关联，使得在栅极绝缘层和栅极电极层附近的第二导电型基极区域中限定反转区域。

10. 发明授权

US5512075A Folded filter element for filtering fluid 失效
标题翻译：用于过滤流体的折叠过滤元件
公开(公告)号：US5512075A
公开(公告)日：1996-04-30
申请号：US222818
申请日：1994-04-05
申请人： Hitoshi Ninomiya , Kenichi Katoh , Toshiaki Fukuta
发明人： Hitoshi Ninomiya , Kenichi Katoh , Toshiaki Fukuta
IPC分类号： B01D39/14 , B01D46/10 , B01D46/52 , B01D53/34 , B01D53/38 , B01D53/81
CPC分类号： B01D46/521 , B01D46/0038 , B01D46/10 , B01D2265/04 , B01D2279/50
摘要： A deodorizing air filter is capable of improving the strength and deodorizing ability while suppressing an increase of ventilation resistance and pressure loss. A filter body has a series of filter pieces which are formed into a zigzagged shape by folding along multiple folds of parallel lines of the filter element. The filter body is made of the deodorizing section and the filtering section formed alternatively, the filtering section of the air serves as a filter and deodorizer for the air, and the deodorizing section serves as a deodorizer for the air. As the deodorizing section does not serve as a filter, it is not necessary to make the pitch of each piece of the filtering section smaller. As a result, it is possible to suppress the increase of ventilation resistance and pressure loss.
摘要翻译：除臭空气过滤器能够在抑制通气阻力和压力损失增加的同时提高强度和除臭能力。过滤器主体具有一系列通过沿着过滤元件的平行线的折叠折叠而形成为锯齿形状的过滤件。过滤体由除臭部分和过滤部分交替形成，空气的过滤部分用作空气的过滤器和除臭剂，除臭部分用作空气的除臭剂。由于除臭部不用作过滤器，因此不需要使过滤部的每个部分的间距变小。结果，可以抑制通气阻力和压力损失的增加。

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