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1. 发明授权

US06258713B1 Method for forming dual damascene structure 有权
标题翻译：形成双镶嵌结构的方法
公开(公告)号：US06258713B1
公开(公告)日：2001-07-10
申请号：US09454005
申请日：1999-12-03
申请人： Chia-Chieh Yu , Yueh-Feng Ho
发明人： Chia-Chieh Yu , Yueh-Feng Ho
IPC分类号： H01L2144
CPC分类号： H01L21/76849 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a dual damascene structure. A first dielectric layer is formed over a substrate, and then the first dielectric layer is planarized. The first dielectric layer is etched to form a dual damascene opening that includes a via opening and a trench. The via opening exposes a conductive layer in the substrate. A metallic is formed in the via openings and the trenches so that a metallic interconnect and a via are formed at the same time. A cap layer is formed on the metallic layer. An additional etching stop layer may form on the cap layer and the substrate. A second dielectric layer is formed over the substrate. The second dielectric layer is etched to form a via opening that exposes a portion of the cap layer.
摘要翻译：形成双镶嵌结构的方法。第一介电层形成在衬底上，然后第一介电层被平坦化。蚀刻第一电介质层以形成包括通孔开口和沟槽的双镶嵌开口。通孔开口在衬底中暴露导电层。在通路开口和沟槽中形成金属，从而同时形成金属互连和通孔。在金属层上形成盖层。在盖层和衬底上可形成附加的蚀刻停止层。第二介质层形成在衬底上。蚀刻第二电介质层以形成露出帽层的一部分的通孔。

2. 发明授权

US5882537A Metallic precipitate monitoring method 失效
标题翻译：金属沉淀物监测方法
公开(公告)号：US5882537A
公开(公告)日：1999-03-16
申请号：US755905
申请日：1996-11-25
申请人： Yueh-Feng Ho , Chia-Chieh Yu
发明人： Yueh-Feng Ho , Chia-Chieh Yu
IPC分类号： H01L21/3213 , H01L21/00 , H01L21/306
CPC分类号： H01L21/32136
摘要： Disclosed is a method of etching which makes the quantitative analysis possible and easier. In the prior art, chemical plasma etching is mainly by ion bombardment, and the tool used to observe the metal bulk is transmission electron microscopy (TEM), so it is very difficult and complicated to execute quantitative analysis. By using chemical plasma etching, the metal precipitate will be left almost all at the end of etching. Scanning electron microscopy (SEM) is used instead of TEM to perform the quantitative analysis.
摘要翻译：公开了一种使得定量分析成为可能和更容易的蚀刻方法。在现有技术中，化学等离子体蚀刻主要是通过离子轰击，用于观察金属体的工具是透射电子显微镜（TEM），因此执行定量分析是非常困难和复杂的。通过使用化学等离子体蚀刻，在蚀刻结束时金属沉淀将几乎全部残留。使用扫描电子显微镜（SEM）代替TEM进行定量分析。

3. 发明授权

US6133143A Method of manufacturing interconnect 有权
标题翻译：制造互连的方法
公开(公告)号：US6133143A
公开(公告)日：2000-10-17
申请号：US340928
申请日：1999-06-28
申请人： Jy-Hwang Lin , Ching-Hsing Hsieh , Yueh-Feng Ho , Chia-Chieh Yu
发明人： Jy-Hwang Lin , Ching-Hsing Hsieh , Yueh-Feng Ho , Chia-Chieh Yu
IPC分类号： H01L21/311 , H01L21/60 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76897 , H01L21/31133 , H01L21/76802 , H01L21/76814 , H01L21/76877
摘要： The invention provides a method of manufacturing a metal interconnect. A substrate having a metal line formed thereon is provided. An anti-reflection layer is formed on the metal line. A dielectric layer with a relatively low dielectric constant is formed over the substrate. A patterned photoresist layer is formed on the dielectric layer. The patterned photoresist layer has an opening exposing a portion of the dielectric layer. The portion of the dielectric layer exposed by the opening is removed to form a via hole. The patterned photoresist layer is removed by an O.sub.2 --H.sub.2 O--CF.sub.4 plasma. The pressure of the O.sub.2 --H.sub.2 O--CF.sub.4 plasma is about 800-1000 torr. A cleaning process is performed by a post-stripper rinse solution and de-ionized water without using an acetone solution. A barrier layer is formed over the substrate by chemical vapor deposition. A metal nucleation is performed for a long time by chemical vapor deposition to form metal nuclei on the barrier layer. A metal layer is formed to fill the via hole by chemical vapor deposition.
摘要翻译：本发明提供一种制造金属互连的方法。提供其上形成有金属线的基板。在金属线上形成防反射层。在衬底上形成介电常数较低的电介质层。在电介质层上形成图案化的光致抗蚀剂层。图案化的光致抗蚀剂层具有露出电介质层的一部分的开口。通过开口暴露的电介质层的部分被去除以形成通孔。通过O 2 -H 2 O-CF 4等离子体去除图案化的光致抗蚀剂层。 O2-H2O-CF4等离子体的压力约为800-1000乇。在不使用丙酮溶液的情况下，通过脱胶器冲洗溶液和去离子水进行清洁处理。通过化学气相沉积在衬底上形成阻挡层。通过化学气相沉积长时间进行金属成核，以在阻挡层上形成金属核。形成金属层以通过化学气相沉积填充通孔。

4. 发明授权

US6107205A Method for removing photoresist 有权
标题翻译：去除光刻胶的方法
公开(公告)号：US6107205A
公开(公告)日：2000-08-22
申请号：US246737
申请日：1999-02-08
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： H01L21/3105 , H01L21/311
CPC分类号： H01L21/31138 , H01L21/31055
摘要： A method for removing a photoresist. A substrate having a wire on the substrate and a flowable oxide layer over the substrate and a patterned photoresist over the flowable oxide layer is provided. A plasma etching step is performed by using an additional gas mixed with oxygen as a source to remove the photoresist layer.
摘要翻译：一种去除光致抗蚀剂的方法。提供了在衬底上具有导线的衬底和衬底上的可流动的氧化物层以及可流动的氧化物层上的图案化的光刻胶。通过使用与氧气混合的附加气体作为源来进行等离子体蚀刻步骤以除去光致抗蚀剂层。

5. 发明授权

US6143652A Method for forming metallic layer using inspected mask 失效
标题翻译：使用检查掩模形成金属层的方法
公开(公告)号：US6143652A
公开(公告)日：2000-11-07
申请号：US063672
申请日：1998-04-21
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： H01L21/02 , H01L21/3213 , H01L21/768 , H01L21/44 , B44C1/22 , G03C5/00 , H01L21/4763
CPC分类号： H01L21/02071 , H01L21/32136 , H01L21/32139 , H01L21/76886
摘要： A method for forming a high-quality aluminum-copper alloy pattern over a semiconductor substrate. The method first forms an aluminum-copper alloy layer over a semiconductor substrate, and then performs a rapid thermal processing operation to remelt copper extracts into the alloy bulk. Subsequently, a photoresist layer is formed over the alloy layer. Finally, the alloy layer is etched to transfer the pattern from the photoresist layer to the metallic alloy layer. Unlike a conventional method that can lead to abnormal conduction due to the presence of extracts that are difficult to etch, this invention uses a thermal operation to remove the extracts before etching is conducted. Hence, the masking effect due to etching is mostly prevented.
摘要翻译：一种在半导体衬底上形成高质量的铝 - 铜合金图案的方法。该方法首先在半导体衬底上形成铝 - 铜合金层，然后进行快速热处理操作，以将铜提取物重熔为合金块体。随后，在合金层上形成光致抗蚀剂层。最后，蚀刻合金层以将图案从光致抗蚀剂层转移到金属合金层。与由于难以蚀刻的提取物的存在而导致异常传导的常规方法不同，本发明使用热操作来在进行蚀刻之前除去提取物。因此，大部分防止了蚀刻引起的掩蔽效应。

6. 发明授权

US06197678B1 Damascene process 失效
标题翻译：镶嵌过程
公开(公告)号：US06197678B1
公开(公告)日：2001-03-06
申请号：US09241742
申请日：1999-02-01
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： H01L214763
CPC分类号： H01L21/02282 , H01L21/0212 , H01L21/312 , H01L21/76802 , H01L21/76808 , H01L2221/1026
摘要： A damascene process, applicable to a semiconductor substrate, with a patterned first mask layer formed thereon. A part of the substrate not covered by the first mask layer is exposed, while a first dielectric layer is formed on the exposed part of the substrate. The first mask is then removed to form a first opening in the first dielectric layer. A conformal barrier layer is formed on the substrate and the first dielectric layer, followed by filling the first opening with a metal plug. Alternatively, a dual damascene process is disclosed where a second patterned mask layer is formed in first opening and covers a part of the first dielectric layer, while a part of the first dielectric layer is exposed. A second dielectric layer is formed on the exposed part of the first dielectric layer. The second patterned mask layer is removed to form a second opening and to expose the first opening. Consequently, the conformal barrier layer is formed on the substrate and the dielectric layers, before filling the openings with the metal plug.
摘要翻译：可应用于其上形成图案化的第一掩模层的半导体衬底的镶嵌工艺。未被第一掩模层覆盖的衬底的一部分被暴露，而在衬底的暴露部分上形成第一电介质层。然后移除第一掩模以在第一介电层中形成第一开口。在基板和第一介电层上形成保形阻挡层，然后用金属塞填充第一开口。或者，公开了一种双镶嵌工艺，其中第一图案化掩模层形成在第一开口中并且覆盖第一介电层的一部分，同时暴露第一介电层的一部分。第二电介质层形成在第一电介质层的暴露部分上。去除第二图案化掩模层以形成第二开口并露出第一开口。因此，在用金属插塞填充开口之前，在基板和电介质层上形成保形阻挡层。

7. 发明授权

US6063207A Surface treatment for bonding pad 有权
标题翻译：焊接表面处理
公开(公告)号：US6063207A
公开(公告)日：2000-05-16
申请号：US241525
申请日：1999-02-01
申请人： Chia-Chieh Yu , Ta-Cheng Chou
发明人： Chia-Chieh Yu , Ta-Cheng Chou
IPC分类号： H01L21/60 , H01L21/00 , C23F1/00
CPC分类号： H01L24/05 , H01L21/76897 , H01L24/03 , H01L2224/05624 , H01L23/3192 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01039 , H01L2924/05042 , H01L2924/14 , Y10S438/906
摘要： A surface treatment method for bonding pad is described, in which a passivation layer is formed on a bonding pad and an opening is formed within the passivation by a plasma etching process. The bonding pad is corroded by the etching plasma containing fluorine during the etching process. The bonding pad is rinsed with deionized water comprising carbon dioxide to reduce the effects of the corrosion phenomenon.
摘要翻译：描述了用于焊盘的表面处理方法，其中在焊盘上形成钝化层，并且通过等离子体蚀刻工艺在钝化中形成开口。在蚀刻过程中，焊盘被含有氟的蚀刻等离子体腐蚀。用包含二氧化碳的去离子水冲洗粘合垫以减少腐蚀现象的影响。

8. 发明授权

US06475707B2 Method of reworking photoresist layer 有权
标题翻译：光刻胶层的再加工方法
公开(公告)号：US06475707B2
公开(公告)日：2002-11-05
申请号：US09746516
申请日：2000-12-22
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： G03F738
CPC分类号： G03F7/427 , H01L21/0276
摘要： A method of reworking a photoresist layer. A silicon chip having an insulation layer, a bottom anti-reflection coating and a photoresist layer thereon is provided. The photoresist layer has already been light-exposed and developed. A wet etching operation is carried out to remove a large portion of the photoresist layer. A low-temperature plasma treatment incapable of transforming the anti-reflection coating structure is conducted to remove the hardened residual photoresist material. A new photoresist layer is formed over the bottom anti-reflection coating.
摘要翻译：一种对光致抗蚀剂层进行再加工的方法。提供了具有绝缘层，底部抗反射涂层和其上的光致抗蚀剂层的硅芯片。光致抗蚀剂层已经被曝光和显影。进行湿蚀刻操作以去除大部分光致抗蚀剂层。进行不能转换抗反射涂层结构的低温等离子体处理以去除硬化的残留光致抗蚀剂材料。在底部抗反射涂层上形成新的光致抗蚀剂层。

9. 发明授权

US6033588A Method for improving differential etching rate of a metallic layer 失效
标题翻译：提高金属层差蚀刻率的方法
公开(公告)号：US6033588A
公开(公告)日：2000-03-07
申请号：US966
申请日：1997-12-30
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： H01L21/3213 , B44C1/22 , C03C25/68
CPC分类号： H01L21/32136
摘要： A method for improving the differential etching rate of forming vias in a metallic layer by the addition of a nitrogen plasma processing operation into the conventional metal etching operation. The nitrogen plasma processing operation facilitates the formation of aggregates through a chemical reaction between gaseous nitrogen and metal. The aggregates are able to lower the etching rate of metal in such a way that its effect on a wide-open via is more than on a narrow-dense via. Hence, microloading effect on the etching rate is greatly improved.
摘要翻译：一种用于通过在常规金属蚀刻操作中添加氮等离子体处理操作来改善在金属层中形成通孔的差分蚀刻速率的方法。氮等离子体处理操作有助于通过气态氮和金属之间的化学反应形成聚集体。聚集体能够以这样的方式降低金属的蚀刻速率，使得其对宽开通孔的影响大于窄致密通孔。因此，微载荷对蚀刻速率的影响大大提高。

10. 发明授权

US06274493B1 Method for forming a via 有权
标题翻译：形成通孔的方法
公开(公告)号：US06274493B1
公开(公告)日：2001-08-14
申请号：US09227975
申请日：1999-01-08
申请人： Chia-Chieh Yu
发明人： Chia-Chieh Yu
IPC分类号： H01L2144
CPC分类号： H01L21/76814 , H01L21/31133 , H01L21/31138
摘要： An improved method of forming a via on a semiconductor substrate forms a conductive line thereon and then forms an inter-metal dielectric layer over the conductive line. A patterned photoresist layer is formed on the inter-metal dielectric layer. A portion of the inter-metal dielectric layer is removed to expose the conductive line using the photoresist layer as a mask to form a via hole, wherein the via hole is subsequently used to form a via. A high density plasma process is performed to remove the photoresist layer. The photoresist layer remaining on the substrate is removed with a solvent.
摘要翻译：在半导体衬底上形成通孔的改进方法在其上形成导电线，然后在导电线上形成金属间介电层。在金属间介电层上形成图案化的光致抗蚀剂层。去除金属间电介质层的一部分以使用光致抗蚀剂层作为掩模露出导线，以形成通孔，其中通孔随后用于形成通孔。执行高密度等离子体处理以除去光致抗蚀剂层。用溶剂除去残留在基板上的光致抗蚀剂层。

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