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1. 发明申请

US20130019230A1 Program Generating Apparatus, Method of Generating Program, and Medium 审中-公开
标题翻译：程序生成装置，程序生成方法和介质
公开(公告)号：US20130019230A1
公开(公告)日：2013-01-17
申请号：US13423641
申请日：2012-03-19
申请人： Yu Nakanishi , Toshiki Kizu , Shunsuke Sasaki , Takahiro Tokuyoshi
发明人： Yu Nakanishi , Toshiki Kizu , Shunsuke Sasaki , Takahiro Tokuyoshi
IPC分类号： G06F9/45
CPC分类号： G06F11/3419 , G06F8/47 , G06F11/3447 , G06F11/3466 , G06F2201/865
摘要： According to an embodiment, a program generating apparatus includes a cross-compiling unit, a processing time calculating unit, a source code converting unit, and a self-compiling unit. The cross-compiling unit generates sin instruction string for each basic block based on a source code and specifies instructions performing a memory access. The processing time calculating unit calculates a processing time of the instruction string for each basic block. The source code converting unit inserts a first code, which adds the processing time of the basic block to an accumulated processing time variable of an executed thread of the basic block, and a second code, which calculates the processing time for the specified memory access and adds the calculated processing time to the accumulated processing time variable, into the source code. The self-compiling unit generates a performance estimating program outputting the accumulated processing time variable of the thread executed.
摘要翻译：根据实施例，程序生成装置包括交叉编译单元，处理时间计算单元，源代码转换单元和自编译单元。交叉编译单元基于源代码为每个基本块生成sin指令串，并指定执行存储器访问的指令。处理时间计算单元计算每个基本块的指令串的处理时间。源代码转换单元插入将基本块的处理时间添加到基本块的执行线程的累积处理时间变量的第一代码和计算指定存储器访问的处理时间的第二代码，将计算出的处理时间添加到累积处理时间变量中，加入到源代码中。自编译单元生成输出执行的线程的累积处理时间变量的性能估计程序。

2. 发明授权

US08159251B2 Probe card for semiconductor wafer 有权
标题翻译：半导体晶圆探头卡
公开(公告)号：US08159251B2
公开(公告)日：2012-04-17
申请号：US12801790
申请日：2010-06-25
申请人： Shunsuke Sasaki , Hiroshi Nakayama
发明人： Shunsuke Sasaki , Hiroshi Nakayama
IPC分类号： G01R31/00
CPC分类号： G01R1/07314 , G01R1/44
摘要： A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring.
摘要翻译：探针卡包括接触设置在半导体晶片中的多个电极并且在电极内或从电极输入或输出电信号的多个探针，保持探针的探针头，具有接近设置的布线的基板所述基板的表面面向所述探针头，以便能够与所述探针头接触，并且与所述探针相连接，所述芯层由掩埋在所述基板中的材料形成，并且具有低于所述探针的热膨胀系数基板和连接构件，其通过布线将至少一些探针与外部装置电连接。

3. 发明授权

US07898272B2 Probe card 有权
标题翻译：探针卡
公开(公告)号：US07898272B2
公开(公告)日：2011-03-01
申请号：US12308110
申请日：2007-06-04
申请人： Shunsuke Sasaki , Tsuyoshi Inuma , Yoshio Yamada , Mitsuhiro Nagaya , Takashi Akao , Hiroshi Nakayama
发明人： Shunsuke Sasaki , Tsuyoshi Inuma , Yoshio Yamada , Mitsuhiro Nagaya , Takashi Akao , Hiroshi Nakayama
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , G01R1/06722 , G01R1/07378
摘要： A probe card includes a flat wiring board having a wiring pattern corresponding to a circuit structure for generating a signal for a test, an interposer that is stacked on the wiring board and relays wirings of the wiring board, a space transformer that is stacked on the interposer and fastened thereto by an adhesive, transforms a space between the wirings relayed by the interposer, and leads the wirings out to a surface opposite a surface facing the interposer, and a probe head that is stacked on the space transformer and houses and holds a plurality of probes.
摘要翻译：探针卡包括具有对应于用于产生测试信号的电路结构的布线图案的平面布线板，堆叠在布线板上并且中继布线板的布线的插入件，堆叠在布线板上的空间变压器插入器并通过粘合剂固定到其上，转换由插入器中继的布线之间的空间，并将布线引导到与面向插入件的表面相对的表面;以及探针头，堆叠在空间变压器上并容纳并保持多个探针。

4. 发明申请

US20100226000A1 OPTICAL PROPERTY ALTERING APPARATUS 失效
标题翻译：光学性能改装器
公开(公告)号：US20100226000A1
公开(公告)日：2010-09-09
申请号：US12714870
申请日：2010-03-01
申请人： Shunsuke Sasaki , Kazuki Nishizawa
发明人： Shunsuke Sasaki , Kazuki Nishizawa
IPC分类号： G02F1/29
CPC分类号： G02B27/0068 , G02F1/29 , G02F2001/294
摘要： An optical property altering apparatus includes an optical property altering element formed by inductors that are smaller than a wavelength of visible light, mutually connected by connecting lines, and arranged in a single plane; a photoconductor that is excited by incident light and generates alternating current of a frequency identical to that of the incident light; and an amplifying circuit that amplifies the alternating current generated by the photoconductor and supplies the amplified alternating current to the optical property altering element, where the optical property altering element, through supply of the alternating current from the amplifying circuit, arbitrarily alters a refractive index of the incident light.
摘要翻译：光学特性改变装置包括由电感器形成的光学特性改变元件，其小于可见光的波长，通过连接线相互连接并且布置在单个平面中; 由入射光激发的光电导体产生与入射光的频率相同的频率的交流电; 以及放大电路，其放大由感光体产生的交流电流，并将放大的交流电流提供给光学特性改变元件，其中光学特性改变元件通过来自放大电路的交流电的供给任意改变折射率事件光。

5. 发明申请

US20090219042A1 Probe card 有权
标题翻译：探针卡
公开(公告)号：US20090219042A1
公开(公告)日：2009-09-03
申请号：US11991296
申请日：2006-08-30
申请人： Shunsuke Sasaki , Hiroshi Nakayama
发明人： Shunsuke Sasaki , Hiroshi Nakayama
IPC分类号： G01R31/02 , G01R1/067
CPC分类号： G01R1/07314 , G01R1/44
摘要： A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring.
摘要翻译：探针卡包括接触设置在半导体晶片中的多个电极并且在电极内或从电极输入或输出电信号的多个探针，保持探针的探针头，具有接近设置的布线的基板所述基板的表面面向所述探针头，以便能够与所述探针头接触，并且与所述探针相连接，所述芯层由掩埋在所述基板中的材料形成，并且具有低于所述探针的热膨胀系数基板和连接构件，其通过布线将至少一些探针与外部装置电连接。

6. 发明授权

US08120834B2 Optical property altering apparatus 失效
标题翻译：光学性能改变设备
公开(公告)号：US08120834B2
公开(公告)日：2012-02-21
申请号：US12714870
申请日：2010-03-01
申请人： Shunsuke Sasaki , Kazuki Nishizawa
发明人： Shunsuke Sasaki , Kazuki Nishizawa
IPC分类号： G02F1/03 , G02F1/09
CPC分类号： G02B27/0068 , G02F1/29 , G02F2001/294
摘要： An optical property altering apparatus includes an optical property altering element formed by inductors that are smaller than a wavelength of visible light, mutually connected by connecting lines, and arranged in a single plane; a photoconductor that is excited by incident light and generates alternating current of a frequency identical to that of the incident light; and an amplifying circuit that amplifies the alternating current generated by the photoconductor and supplies the amplified alternating current to the optical property altering element, where the optical property altering element, through supply of the alternating current from the amplifying circuit, arbitrarily alters its refractive index.
摘要翻译：光学特性改变装置包括由电感器形成的光学特性改变元件，其小于可见光的波长，通过连接线相互连接并且布置在单个平面中; 由入射光激发的光电导体产生与入射光的频率相同的频率的交流电; 以及放大电路，其放大由感光体产生的交流电流，并将放大的交流电流提供给光学特性改变元件，其中光学特性改变元件通过来自放大电路的交流电的供给任意地改变其折射率。

7. 发明申请

US20110050266A1 Probe card 有权
标题翻译：探针卡
公开(公告)号：US20110050266A1
公开(公告)日：2011-03-03
申请号：US12801790
申请日：2010-06-25
申请人： Shunsuke Sasaki , Hiroshi Nakayama
发明人： Shunsuke Sasaki , Hiroshi Nakayama
IPC分类号： G01R31/00
CPC分类号： G01R1/07314 , G01R1/44
摘要： A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring.
摘要翻译：探针卡包括接触设置在半导体晶片中的多个电极并且在电极内或从电极输入或输出电信号的多个探针，保持探针的探针头，具有接近设置的布线的基板所述基板的表面面向所述探针头，以便能够与所述探针头接触，并且与所述探针相连接，所述芯层由掩埋在所述基板中的材料形成，并且具有低于所述探针的热膨胀系数基板和连接构件，其通过布线将至少一些探针与外部装置电连接。

8. 发明授权

US4288840A Printed circuit board 失效
标题翻译：印刷电路板
公开(公告)号：US4288840A
公开(公告)日：1981-09-08
申请号：US77760
申请日：1979-09-21
申请人： Kaoru Konishikawa , Shunsuke Sasaki , Kouichi Higuchi , Fuminori Hirose
发明人： Kaoru Konishikawa , Shunsuke Sasaki , Kouichi Higuchi , Fuminori Hirose
IPC分类号： H05K1/11 , H01R12/51 , H01R31/08 , H05K1/00 , H05K1/14 , H05K3/22 , H05K3/34 , H05K3/36 , H05K1/18
CPC分类号： H05K3/222 , H05K1/0289 , H05K1/141 , H05K2201/09181 , H05K2201/10212 , H05K2201/10363 , H05K2201/10666 , H05K3/3442 , H05K3/368
摘要： An improved printed circuit board for use in electrical and electronic appliances includes an electronic part for a jumper having crossover wiring and disposed on an electrically insulative substrate or base plate for the printed circuit board provided with a cross pattern of conductors in which sets of separated or cut-off conductive layers are arranged to confront each other on X-Y cross coordinates for connecting the cross pattern portions on the substrate to each other by the jumper electronic part.
摘要翻译：用于电气和电子设备的改进的印刷电路板包括用于具有交叉布线的跳线的电子部件，并且设置在用于印刷电路板的电绝缘基板或基板上，该印刷电路板设置有导体的交叉图案，其中分离的或切断导电层被布置为在XY十字坐标上彼此面对，以通过跳线电子部件将基板上的交叉图案部分彼此连接。

9. 发明申请

US20100325360A1 MULTI-CORE PROCESSOR AND MULTI-CORE PROCESSOR SYSTEM 审中-公开
标题翻译：多核处理器和多核处理器系统
公开(公告)号：US20100325360A1
公开(公告)日：2010-12-23
申请号：US12813567
申请日：2010-06-11
申请人： Yumi Yoshitake , Shunsuke Sasaki
发明人： Yumi Yoshitake , Shunsuke Sasaki
IPC分类号： G06F12/08
CPC分类号： G06F12/0223 , G06F12/0817
摘要： In one embodiment, a multi-core processor includes a plurality of processor cores that each includes a cache and that uses a management target area allocated as a main memory in a memory area. The multi-core processor includes a state managing unit and a management-target-area. The state managing unit manages a first state in which the small area is not allocated to the processor core and a second state in which the small area is allocated to the processor core for each small area included in the management target area. The management-target-area increasing and decreasing unit increases and decreases the management target area by increasing and decreasing the small area in the first state in the management target area.
摘要翻译：在一个实施例中，多核处理器包括多个处理器核，每个处理器核包括高速缓存，并且使用在存储器区域中分配为主存储器的管理目标区域。多核处理器包括状态管理单元和管理目标区域。状态管理单元管理小区域未分配给处理器核心的第一状态以及其中小区域被分配给管理目标区域中包括的每个小区域的处理器核心的第二状态。管理目标区域增减单位通过增加和减少管理对象区域的第一状态的小区域来增加和减少管理目标区域。

10. 发明申请

US20100299672A1 MEMORY MANAGEMENT DEVICE, COMPUTER SYSTEM, AND MEMORY MANAGEMENT METHOD 审中-公开
标题翻译：存储器管理设备，计算机系统和存储器管理方法
公开(公告)号：US20100299672A1
公开(公告)日：2010-11-25
申请号：US12692076
申请日：2010-01-22
申请人： Hiroki TAGAWA , Shunsuke Sasaki
发明人： Hiroki TAGAWA , Shunsuke Sasaki
IPC分类号： G06F9/46 , G06F12/00 , G06F12/02
CPC分类号： G06F9/5016 , G06F12/0223
摘要： A memory management device includes a memory area, an allocator generating unit that generates a plurality of allocators, which allocates a memory resource of the memory area to a task, for respective rules of allocation/deallocation of the memory resource, and a task correlating unit that selects one of generated allocators based on an allocator specification that is different for each task by the task and sets such that the task is capable of using selected allocator.
摘要翻译：存储器管理装置包括存储区域，分配器生成单元，其生成分配存储器区域的存储器资源到任务的多个分配器，用于存储资源的分配/解除分配的规则，以及任务相关单元其基于由任务对于每个任务不同的分配器规范来选择生成的分配器中的一个，并且设置为使得任务能够使用所选择的分配器。

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