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1. 发明授权

US09178137B2 Magnetoresistive element and magnetic memory 有权
标题翻译：磁阻元件和磁记忆体
公开(公告)号：US09178137B2
公开(公告)日：2015-11-03
申请号：US13963682
申请日：2013-08-09
申请人： Youngmin Eeh , Katsuya Nishiyama , Daisuke Ikeno , Toshihiko Nagase , Tadashi Kai , Daisuke Watanabe
发明人： Youngmin Eeh , Katsuya Nishiyama , Daisuke Ikeno , Toshihiko Nagase , Tadashi Kai , Daisuke Watanabe
IPC分类号： H01L43/08 , H01L43/12 , H01L27/22
CPC分类号： H01L43/12 , H01L27/226 , H01L43/08
摘要： A magnetoresistive element includes first and magnetic layers, first and second non-magnetic layers and a W layer. Each of the first and second magnetic layers includes an axis of easy magnetization in a direction perpendicular to a film plane. The first magnetic layer has a variable magnetization direction. The second magnetic layer has an invariable magnetization direction. The first non-magnetic layer is provided between the first and second magnetic layers. The second non-magnetic layer is arranged on a surface of the first magnetic layer opposite to a surface on which the first non-magnetic layer is arranged and contains MgO. The W layer is arranged on a surface of the second non-magnetic layer opposite to a surface on which the first magnetic layer is arranged, and is in contact with the surface of the second non-magnetic layer.
摘要翻译：磁阻元件包括第一和第二磁性层，第一和第二非磁性层以及W层。第一和第二磁性层中的每一个包括在垂直于膜平面的方向上易磁化的轴。第一磁性层具有可变的磁化方向。第二磁性层具有不变的磁化方向。第一非磁性层设置在第一和第二磁性层之间。第二非磁性层布置在第一磁性层的与布置第一非磁性层的表面相对的表面上并且包含MgO。 W层布置在第二非磁性层的与布置第一磁性层的表面相对的表面上，并与第二非磁性层的表面接触。

2. 发明授权

US08710604B2 Magnetoresistive element and manufacturing method of the same 有权
标题翻译：磁阻元件及其制造方法
公开(公告)号：US08710604B2
公开(公告)日：2014-04-29
申请号：US13425309
申请日：2012-03-20
申请人： Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno , Tadashi Kai
发明人： Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno , Tadashi Kai
IPC分类号： H01L29/82 , G11C11/02
CPC分类号： H01L27/228 , H01L43/08 , H01L43/12
摘要： In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer.
摘要翻译：根据实施例，磁阻元件包括下电极，下电极上的第一磁性层，第一磁性层上的第一扩散防止层，第一金属层上的第一界面磁性层，第一金属层上的非磁性层第一界面磁性层，非磁性层上的第二界面磁性层，第二界面磁性层上的第二扩散防止层，第二扩散防止层上的第二磁性层和第二磁性层上的上部电极层。第二界面磁性层中的晶体取向部分与另一部分的比例高于第一界面磁性层中晶体取向部分与其它部分的比例。

3. 发明申请

US20130001716A1 MAGNETORESISTIVE ELEMENT AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：磁性元件及其制造方法
公开(公告)号：US20130001716A1
公开(公告)日：2013-01-03
申请号：US13425309
申请日：2012-03-20
申请人： Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno , Tadashi Kai
发明人： Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno , Tadashi Kai
IPC分类号： H01L29/82 , H01L43/12
CPC分类号： H01L27/228 , H01L43/08 , H01L43/12
摘要： In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer.
摘要翻译：根据实施例，磁阻元件包括下电极，下电极上的第一磁性层，第一磁性层上的第一扩散防止层，第一金属层上的第一界面磁性层，第一金属层上的非磁性层第一界面磁性层，非磁性层上的第二界面磁性层，第二界面磁性层上的第二扩散防止层，第二扩散防止层上的第二磁性层和第二磁性层上的上部电极层。第二界面磁性层中的晶体取向部分与另一部分的比例高于第一界面磁性层中晶体取向部分与其它部分的比例。

4. 发明申请

US20100065918A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100065918A1
公开(公告)日：2010-03-18
申请号：US12561862
申请日：2009-09-17
申请人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
发明人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823828
摘要： A semiconductor device includes a semiconductor substrate containing a p-type diffusion layer and an n-type diffusion layer which are separated by an element separation film; a gate insulating film formed on or above the p-type diffusion layer and the n-type diffusion layer of the semiconductor substrate, respectively; a gate electrode containing a metallic film and formed on the gate insulating film; a Ge inclusion formed at an interface between the gate insulating film and the metallic film; and a silicon-containing layer formed on the metallic film.
摘要翻译：半导体器件包括由元件分离膜分离的包含p型扩散层和n型扩散层的半导体衬底; 分别形成在所述p型扩散层和所述半导体衬底的n型扩散层上或之上的栅绝缘膜; 含有金属膜并形成在栅极绝缘膜上的栅电极; 形成在栅极绝缘膜和金属膜之间的界面处的Ge夹杂物; 以及形成在金属膜上的含硅层。

5. 发明授权

US08653614B2 Semiconductor memory device and method for manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08653614B2
公开(公告)日：2014-02-18
申请号：US13407630
申请日：2012-02-28
申请人： Daisuke Ikeno , Koji Yamakawa , Katsuaki Natori , Yasuyuki Sonoda
发明人： Daisuke Ikeno , Koji Yamakawa , Katsuaki Natori , Yasuyuki Sonoda
IPC分类号： H01L21/76
CPC分类号： H01L43/02 , G11C11/161 , H01L27/226 , H01L27/228 , H01L43/08 , H01L43/12
摘要： According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film.
摘要翻译：根据一个实施例，公开了一种具有磁阻效应元件的存储器件。该元件包括具有非磁性元素的第一金属磁性膜（MMF）和易磁化垂直轴（EMP），第一绝缘膜，第一MMF和第一绝缘膜之间的第一中间磁性膜，第一绝缘膜上的第二MMF，非磁性元件，具有EMP轴的第二MMF，第一绝缘膜和第二MMF之间的第二中间磁性膜，以及包括具有阻挡性的金属氮化物的扩散防止膜，其具有防止非磁性元件在第一MMF与第一中间磁体之间的扩散电影。

6. 发明申请

US20130005148A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130005148A1
公开(公告)日：2013-01-03
申请号：US13428535
申请日：2012-03-23
申请人： Yasuyuki Sonoda , Kyoichi Suguro , Masatoshi Yoshikawa , Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno
发明人： Yasuyuki Sonoda , Kyoichi Suguro , Masatoshi Yoshikawa , Koji Yamakawa , Katsuaki Natori , Daisuke Ikeno
IPC分类号： H01L21/306
CPC分类号： H01L21/31053 , H01L27/228 , H01L43/12
摘要： According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.
摘要翻译：根据一个实施方案，一种制造半导体器件的方法，该方法包括在基底层上形成柱，在基底层上形成绝缘层以通过GCIB法覆盖柱，其中上表面的最下部分绝缘层低于柱的上表面，并且通过使用CMP方法研磨绝缘层和柱以露出柱的头部，其中抛光的终点是上表面的最下部绝缘层。

7. 发明授权

US08410529B2 Magnetic random access memory and method of fabricating the same 有权
标题翻译：磁性随机存取存储器及其制造方法
公开(公告)号：US08410529B2
公开(公告)日：2013-04-02
申请号：US13234608
申请日：2011-09-16
申请人： Daisuke Ikeno , Koji Yamakawa , Katsuaki Natori , Yasuyuki Sonoda
发明人： Daisuke Ikeno , Koji Yamakawa , Katsuaki Natori , Yasuyuki Sonoda
IPC分类号： H01L29/66
CPC分类号： H01L27/228 , B82Y40/00 , H01F10/3254 , H01F10/3286 , H01F10/3295 , H01F41/307 , H01L43/08 , H01L43/10 , H01L43/12
摘要： According to one embodiment, a semiconductor device, includes a magneto resistive element including a first magnetic layer, a first interface magnetic layer, a nonmagnetic layer, a second interface magnetic layer and a second magnetic layer as a stacked structure in order; and a metal layer including first metal atoms, second metal atoms and boron atoms, the metal layer being provided at least one region selected from under the first magnetic, between the first magnetic layer and the first interface magnetic layer, between the second interface magnetic layer and the second magnetic layer, and upper the second magnetic layer.
摘要翻译：根据一个实施例，半导体器件依次包括第一磁性层，第一界面磁性层，非磁性层，第二界面磁性层和第二磁性层作为堆叠结构的磁阻元件; 以及金属层，其包括第一金属原子，第二金属原子和硼原子，所述金属层设置在所述第一磁性层和所述第一界面磁性层之间的所述第一磁性体的下方的至少一个区域之间，所述第二界面磁性层和第二磁性层，并且在第二磁性层上方。

8. 发明授权

US08188547B2 Semiconductor device with complementary transistors that include hafnium-containing gate insulators and metal gate electrodes 失效
标题翻译：具有互补晶体管的半导体器件包括含铪栅极绝缘体和金属栅电极
公开(公告)号：US08188547B2
公开(公告)日：2012-05-29
申请号：US12819662
申请日：2010-06-21
申请人： Kenzo Manabe , Toshihiro Iizuka , Daisuke Ikeno
发明人： Kenzo Manabe , Toshihiro Iizuka , Daisuke Ikeno
IPC分类号： H01L29/78
CPC分类号： H01L21/823842
摘要： A first adjusting metal, capable of varying the threshold voltage of a first-conductivity-type transistor of a complementary transistor, is added to the first-conductivity-type transistor and a second-conductivity-type transistor at the same time, and a diffusion suppressive element, capable of suppressing diffusion of the first adjusting metal, is added from above a metal gate electrode of the second-conductivity-type transistor.
摘要翻译：能够改变互补晶体管的第一导电型晶体管的阈值电压的第一调整金属同时被添加到第一导电型晶体管和第二导电型晶体管，并且扩散从第二导电型晶体管的金属栅电极的上方添加能够抑制第一调整金属的扩散的抑制元件。

9. 发明申请

US20100176456A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100176456A1
公开(公告)日：2010-07-15
申请号：US12683050
申请日：2010-01-06
申请人： Daisuke Ikeno , Kazuaki Nakajima , Toshihiro Iizuka , Kenzo Manabe , Ichiro Yamamoto
发明人： Daisuke Ikeno , Kazuaki Nakajima , Toshihiro Iizuka , Kenzo Manabe , Ichiro Yamamoto
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823864 , H01L29/518
摘要： A semiconductor device includes a semiconductor substrate including a P-type semiconductor region, and an N channel MOSFET formed in the P-type semiconductor region, the N channel MOSFET including an insulating film of silicon oxide film or silicon oxynitride film formed on the semiconductor substrate, a gate insulating film including hafnium and formed on the insulating film, a lanthanum oxide film having a film thickness not larger than a predetermined value and formed between the gate insulating film and insulating film, and a gate electrode including a titanium nitride film having a N/Ti atomic ratio less than 1.
摘要翻译：半导体器件包括包括P型半导体区域的半导体衬底和形成在P型半导体区域中的N沟道MOSFET，N沟道MOSFET包括形成在半导体衬底上的氧化硅膜或氧氮化硅膜的绝缘膜包括铪并形成在所述绝缘膜上的栅极绝缘膜，形成在所述栅极绝缘膜和绝缘膜之间的膜厚度不大于预定值的氧化镧膜，以及包括氮化钛膜的栅电极，所述氮化钛膜具有 N / Ti原子比小于1。

10. 发明授权

US08878320B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08878320B2
公开(公告)日：2014-11-04
申请号：US13425328
申请日：2012-03-20
申请人： Koji Yamakawa , Daisuke Ikeno , Yasuki Sonoda
发明人： Koji Yamakawa , Daisuke Ikeno , Yasuki Sonoda
IPC分类号： H01L29/82 , H01L43/08 , H01L27/22
CPC分类号： H01L43/08 , H01L27/222
摘要： According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements being two-dimensionally arrayed on a semiconductor substrate. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on the semiconductor substrate; a non-magnetic layer formed on the first magnetic layer; and a second magnetic layer formed on the non-magnetic layer, and an insulating film buried between the magneto-resistance elements adjacent to each other, a powder made of a metallic material or a magnetic material being dispersed in the insulating film.
摘要翻译：根据一个实施例，半导体存储器件包括二维排列在半导体衬底上的多个磁阻元件。在半导体存储器件中，每个磁阻元件包括：形成在半导体衬底上的第一磁性层; 形成在所述第一磁性层上的非磁性层; 以及形成在非磁性层上的第二磁性层和埋在彼此相邻的磁阻元件之间的绝缘膜，由金属材料或磁性材料制成的粉末分散在绝缘膜中。

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