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1. 发明授权

US06979604B2 Method for forming pattern on substrate and method for fabricating liquid crystal display using the same 失效
标题翻译：在基板上形成图案的方法及使用该方法制造液晶显示器的方法
公开(公告)号：US06979604B2
公开(公告)日：2005-12-27
申请号：US10469495
申请日：2002-03-05
申请人： Young-Mi Tak , Woon-Yong Park , Jung-Ho Lee , Mun-Pyo Hong , Kyuha Chung
发明人： Young-Mi Tak , Woon-Yong Park , Jung-Ho Lee , Mun-Pyo Hong , Kyuha Chung
IPC分类号： G02F1/1368 , G02F1/1333 , G02F1/1362 , G03F7/00 , G03F7/20 , H01L21/475 , G03C5/56
CPC分类号： G03F7/0007 , G02F1/1362 , G02F2001/13625 , G03F7/0035 , Y10S438/946
摘要： The present invention relates to a method of forming a pattern on a substrate and a method of manufacturing a liquid crystal display panel using the same. In order to decrease stitch defect, the shot boundary lines for respective layers of patterns do not overlap each other to be dispersed. Specifically, according to a method of forming patterns of the present invention, after a first material layer is first formed on a substrate, a first pattern is formed by performing a first photo etching including divisional light exposure with at least two areas across at least one shot boundary line on the first material layer. Subsequently, after a second material layer is formed on the first pattern, a second pattern is formed by performing a second photo etching including divisional light exposure with at least two areas across at least one shot boundary line on the second material layer. The shot boundary line in the second photo etching is spaced apart from the shot boundary line in the first photo etching. A liquid crystal display panel is manufactured by using this forming method.
摘要翻译：本发明涉及在基板上形成图案的方法以及使用该图案的液晶显示面板的制造方法。为了减少针迹缺陷，各层图案的拍摄边界线彼此不重叠以分散。具体而言，根据本发明的图案的形成方法，首先在基板上形成第一材料层后，通过进行第一光蚀刻而形成第一图案，所述第一图案蚀刻包括具有至少两个区域的分光曝光在第一材料层上拍摄边界线。随后，在第一图案上形成第二材料层之后，通过在第二材料层上进行至少两个区域的至少两个区域的至少两个区域进行包括分光照射的第二光蚀刻来形成第二图案。在第一光刻蚀中，第二光蚀刻中的照射边界线与第一光蚀刻中的照射边界线隔开。通过使用该形成方法制造液晶显示面板。

2. 发明授权

US06819399B2 Exposure mask for fabricating liquid crystal display and method for exposing substrate in fabricating liquid crystal display using the mask 有权
标题翻译：用于制造液晶显示器的曝光掩模和使用该掩模在制造液晶显示器中曝光基板的方法
公开(公告)号：US06819399B2
公开(公告)日：2004-11-16
申请号：US10399799
申请日：2003-04-22
申请人： Young-Mi Tak , Woon-Yong Park , Mun-Pyo Hong , Jung-Ho Lee
发明人： Young-Mi Tak , Woon-Yong Park , Mun-Pyo Hong , Jung-Ho Lee
IPC分类号： G03B2742
CPC分类号： G03F9/7084 , G02F2001/13625 , G03F1/50 , G03F7/70475 , G03F7/70791
摘要： A mask for fabricating a liquid crystal display with a substrate includes a first mask pattern placed at the center of the substrate with the center line to expose the center of the substrate to light. A second mask pattern is placed to the left of the first mask pattern to expose the left side of the substrate to light. The second mask pattern is spaced apart from the first mask pattern with a first distance. A third mask pattern is placed to the right of the first mask pattern to expose the right side of the substrate to light. The third mask pattern is spaced apart from the first mask pattern with a second distance.
摘要翻译：用于制造具有基板的液晶显示器的掩模包括放置在基板的中心处的中心线的第一掩模图案，以将基板的中心曝光。将第二掩模图案放置在第一掩模图案的左侧以将基板的左侧暴露于光。第二掩模图案与第一掩模图案间隔开第一距离。将第三掩模图案放置在第一掩模图案的右侧以将基板的右侧暴露于光。第三掩模图案与第一掩模图案间隔开第二距离。

3. 发明授权

US07504290B2 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07504290B2
公开(公告)日：2009-03-17
申请号：US11750630
申请日：2007-05-18
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

4. 发明申请

US20060228821A1 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 审中-公开
公开(公告)号：US20060228821A1
公开(公告)日：2006-10-12
申请号：US11451686
申请日：2006-06-13
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.

5. 发明授权

US07075601B2 Thin film transistor array for a liquid crystal display having a data line cross-connection 有权
标题翻译：用于具有数据线交叉连接的液晶显示器的薄膜晶体管阵列
公开(公告)号：US07075601B2
公开(公告)日：2006-07-11
申请号：US10470116
申请日：2002-02-26
申请人： Mun-Pyo Hong , Wan-Shick Hong , Nam-Seok Roh , Kyuha Chung , Chong-Chul Chai
发明人： Mun-Pyo Hong , Wan-Shick Hong , Nam-Seok Roh , Kyuha Chung , Chong-Chul Chai
IPC分类号： G02F1/1335
CPC分类号： G02F1/133514 , G02F2201/52
摘要： Pixels of red, blue and green are sequentially arranged in the row direction. The red and green pixels are alternately arranged in the column while the blue pixels being arranged between the neighboring red and each blue pixel is surrounded by the four red and green pixels. Gate lines are arranged at respective pixel rows. Data lines cross over the gate lines in an insulating manner and are arranged at the respective pixel columns. Pixel electrodes and thin film transistor are arranged at the respective pixels. At a predetermined pixel unit, the data lines to the two blue pixel are connected to each other. The pixel electrodes are overlapped with the gate lines or data lines via a passivation layer of low dielectric organic material or insulating material such as SiOC, SiOF.
摘要翻译：红色，蓝色和绿色的像素依次排列在行方向。红色和绿色像素交替排列在列中，而布置在相邻红色和每个蓝色像素之间的蓝色像素被四个红色和绿色像素包围。栅极线被布置在各个像素行。数据线以绝缘方式跨越栅极线并且布置在各个像素列处。像素电极和薄膜晶体管布置在各个像素处。在预定像素单元处，到两个蓝色像素的数据线彼此连接。像素电极经由低介电有机材料的钝化层或绝缘材料如SiOC，SiOF与栅极线或数据线重叠。

6. 发明授权

US07078255B2 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
公开(公告)号：US07078255B2
公开(公告)日：2006-07-18
申请号：US10933545
申请日：2004-09-03
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.

7. 发明申请

US20050023534A1 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050023534A1
公开(公告)日：2005-02-03
申请号：US10933545
申请日：2004-09-03
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： G09F9/30 , G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L29/417 , H01L29/786 , H01L29/04 , H01L31/036
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

8. 发明授权

US06787809B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US06787809B2
公开(公告)日：2004-09-07
申请号：US10644917
申请日：2003-08-21
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2904
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

9. 发明授权

US06642074B2 Method for manufacturing thin film transistor array panel for LCD having a quadruple layer by a second photolithography process 有权
标题翻译：用于通过第二光刻工艺制造具有四重层的用于LCD的薄膜晶体管阵列面板的方法
公开(公告)号：US06642074B2
公开(公告)日：2003-11-04
申请号：US10172982
申请日：2002-06-18
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2100
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

10. 发明授权

US06429057B1 Method for manufacturing thin film transistor array panel for liquid crystal display 有权
标题翻译：制造液晶显示器用薄膜晶体管阵列面板的方法
公开(公告)号：US06429057B1
公开(公告)日：2002-08-06
申请号：US09410760
申请日：1999-10-01
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2100
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

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